Infineon Technologies IPLK60R1K0PFD7ATMA1

Overview

IPLK60R1K0PFD7ATMA1 from Infineon Technologies is a 600 V, 1.0 Ω (max) superjunction MOSFET in ThinPAK 5x6 package with Kelvin source configuration, optimized for ZVS topologies in high-density chargers and adapters. It features 6.0 nC total gate charge, 0.7 µJ E_oss at 400 V, and 1300 A/µs diode commutation speed, enabling efficient operation above 100 kHz in slim form-factor power supplies.

For engineers reviewing the IPLK60R1K0PFD7ATMA1 datasheet, IPLK60R1K0PFD7ATMA1 pinout, IPLK60R1K0PFD7ATMA1 application, or IPLK60R1K0PFD7ATMA1 equivalent, key selection criteria include R_DS(on) temperature stability, fast body diode recovery (t_rr = 44–66 ns), low ESD sensitivity (HBM Class 2), and thermal resistance (R_thJC = 4.0 °C/W) for thermally constrained SMD layouts.

Technical Context

This CoolMOS™ PFD7 device implements a superjunction structure with integrated zener-protected gate and fast-recovery body diode. Its Kelvin source pin (Pin 3) separates sensing and power return paths to minimize gate drive loop inductance and suppress oscillation during hard switching.

The MOSFET delivers 8.8 A pulsed drain current and supports 120 V/ns dv/dt ruggedness in low-side configurations. Its Co(er) = 9 pF and Q_gd = 2.2 nC enable predictable ZVS turn-on timing in resonant half-bridge and LLC converters operating up to 300 kHz.

Key Specifications

Pinout & Package

ThinPAK 5x6 surface-mount package with exposed drain pad (Pins 5–8), single gate terminal (Pin 4), Kelvin source (Pin 3), and dual-source power terminals (Pins 1–2). Internal body and ESD diodes are integrated.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage superjunction MOSFET applications.

Compared with IPAK60R1K0PFD7 and IPP60R1K0PFD7, IPLK60R1K0PFD7ATMA1 provides superior high-frequency ZVS performance via Kelvin source and lower R_thJA on optimized PCBs, making it the only option among the three qualified for sub-30 mm adapter height targets.

Availability

IPLK60R1K0PFD7ATMA1 is available at Aetrix Electronics and suitable for USB-C PD chargers, dimmable LED drivers, BLDC motor inverters, and industrial AC-DC adapters requiring stable component supply across multi-year production cycles.

Supply support for IPLK60R1K0PFD7ATMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies is a German semiconductor manufacturer specializing in power management, automotive, and industrial control ICs and discrete devices, with global manufacturing and quality certification to ISO/TS 16949 and IECQ QC 080000.

This part belongs to the CoolMOS™ PFD7 superjunction MOSFET product line, engineered specifically for cost-sensitive, high-efficiency consumer power supplies where slim mechanical profiles and ZVS operation are mandatory design constraints.

FAQ

What is the maximum recommended gate resistor value for IPLK60R1K0PFD7ATMA1 in a 200 kHz LLC design?

The datasheet specifies gate resistance R_G = 10.2 Ω for dynamic characterization at 200 kHz. For stable ZVS operation, a series gate resistor of 8–12 Ω is recommended to balance switching speed against ringing suppression. Values above 15 Ω increase turn-on delay beyond optimal dead-time windows, risking hard-switching loss.

Does IPLK60R1K0PFD7ATMA1 require external gate protection diodes?

No. The device integrates a bidirectional zener diode between gate and source, rated for ±20 V static and ±30 V dynamic voltage. This eliminates the need for external TVS or clamping diodes in standard gate drive circuits using 12 V or 15 V supplies with proper layout practices.

Can IPLK60R1K0PFD7ATMA1 be paralleled with identical units?

Yes, but only with gate ferrite beads (≥100 Ω impedance at 100 MHz) on each unit's gate line or separate totem-pole drivers per device. The Kelvin source configuration improves current sharing accuracy, but mismatched PCB trace inductance can still cause imbalance above 3 A per device without individual gate damping.

What is the minimum copper area required on PCB for thermal compliance at full 31.3 W dissipation?

To achieve the specified R_thJA = 35 °C/W, a 6 cm² (e.g., 40 mm × 40 mm) single-layer 70 µm copper area connected to the exposed drain pad is mandatory. Reducing copper below 4 cm² increases R_thJA to >50 °C/W, limiting safe continuous power to ≤20 W at 85°C ambient.