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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Power Management - Specialized

Renesas ISL6443AIRZ

Name: ISL6443AIRZ
Brand: Renesas
SKU: ISL6443AIRZ
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ISL6443AIRZ

Manufacturer:: Renesas

Category:: Power Management - Specialized

Package:: 28-VFQFN Exposed Pad

Datasheet:: ISL6443AIRZ.pdf

Description:: IC CTRLR SGL/STEP DOWN PWM 28QFN

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Product details

Overview

ISL6443AIRZ from Renesas Electronics (formerly Intersil) is a triple-output DC/DC controller integrating two 300kHz out-of-phase synchronous buck PWM controllers and one linear regulator controller. It supports input voltages from 5.6V to 24V or 4.5V to 5.6V, delivers adjustable outputs down to 0.8V, and is used in xDSL modems, FPGA/DSP power supplies, and set-top boxes.

For engineers reviewing the ISL6443AIRZ datasheet, ISL6443AIRZ pinout, ISL6443AIRZ application, or ISL6443AIRZ equivalent, key selection considerations include its 180° out-of-phase dual PWM operation for reduced input ripple, no external current sense resistor requirement (uses r_DS(ON)), integrated 5V LDO (VCC_5V), PGOOD monitoring across all three outputs, and thermal shutdown at +150°C.

Technical Context

The ISL6443AIRZ employs voltage feed-forward current-mode control with adaptive dead-time gate drivers for both upper and lower MOSFETs. Its dual PWM channels operate at a fixed 300kHz switching frequency with 180° phase offset, reducing RMS input current and enabling smaller input capacitance.

Overcurrent protection uses ISEN1/ISEN2 pins to monitor the lower MOSFET's r_DS(ON) voltage drop, with hiccup-mode response triggered after two consecutive clock-cycle faults. The linear regulator (GATE3 output) features 0.8V reference threshold, 75% undervoltage detection, and supports PNP/PFET configurations for ultra-low dropout.

Key Specifications

Parameter	Value and Actual Design Meaning
Switching frequency	300 kHz ±13.3% - sets timing for input capacitor sizing and EMI filter design
Input voltage range	5.6 V to 24 V or 4.5 V to 5.6 V - supports wall adapter, battery, and intermediate bus inputs
Output voltage range	Adjustable down to 0.8 V - enables core supply generation for modern DSPs, FPGAs, and ASICs
Phase relationship	180° out-of-phase dual PWM - reduces input ripple current by ~30%, lowering required input capacitance
Reference voltage	0.8 V ±1% - defines regulation point for all three outputs; used directly in FB divider calculations
Thermal shutdown	+150°C junction temperature - disables all controllers until die cools to +130°C, preventing permanent damage
PGOOD assertion condition	Both PWM outputs within ±10% of setpoint AND linear output >75% of setpoint - ensures system-level power sequencing integrity

Pinout & Package

ISL6443AIRZ is housed in a 28-lead, 5 mm × 5 mm, 0.5 mm pitch QFN package (JEDEC MO-220 compliant) with exposed thermal pad. Pin 1 is marked by a dot; top-side silkscreen reads "6443A IRZ".

Pin/Terminal	Circuit Role	Design Meaning
PHASE1, PHASE2	Switch node connection	Drives buck converter inductors; connects to source of upper MOSFET, drain of lower MOSFET, and inductor
UGATE1, UGATE2	High-side gate driver output	Sources/sinks 400 mA to drive N-channel upper MOSFET gates via boot circuit
LGATE1, LGATE2	Low-side gate driver output	Drives lower MOSFET gates directly from VCC_5V; 400 mA peak sink/source capability
ISEN1, ISEN2	Current sense input	Monitors voltage drop across lower MOSFET r_DS(ON) for overcurrent protection and current-mode control
FB1, FB2, FB3	Voltage feedback input	Connects to resistor divider; sets output voltage per V_OUT = 0.8V × (1 + R1/R2)
GATE3	Linear regulator output	Open-drain output driving external PNP transistor or PFET for low-dropout linear regulation
PGOOD	Power-good status indicator	Open-drain logic output pulled low if any regulated output falls outside tolerance window
SD1, SD2	PWM enable/disable control	Logic-high enables respective PWM; logic-low disables it independently for sequencing or fault isolation
SS1, SS2	Soft-start timing control	5 µA internal current charges external capacitor; ramps reference from 0 V to 0.8 V for controlled startup
VIN, VCC_5V	Main supply / internal LDO output	VIN powers IC when ≥5.6 V; VCC_5V provides 5 V ±10% bias for gate drivers and logic (60 mA min)
SYNC	Frequency synchronization input	Accepts external clock (4.16–5.44 MHz) to synchronize multiple ISL6443AIRZ devices
PGND, SGND	Power ground / signal ground	PGND carries high-current return paths; SGND is isolated analog reference for FB/ISEN/OCSET circuits

Key Features

Feature	Design Value
No external current sense resistor	Uses lower MOSFET r_DS(ON) for current sensing - eliminates sense resistor power loss and board space
180° out-of-phase dual PWM	Reduces input RMS ripple current by ~30% - allows smaller, lower-cost input capacitors and improves EMI profile
Bidirectional SYNC capability	Enables master/slave synchronization between multiple ISL6443AIRZ units - essential for multi-rail systems requiring coherent switching
Independent soft-start and shutdown	SS1/SS2 and SD1/SD2 pins allow precise power sequencing and dynamic rail disable - critical for FPGA and processor core/I/O voltage sequencing
Integrated 5V LDO (VCC_5V)	Supplies 60 mA minimum at 5 V - powers gate drivers, logic, and external bootstrap circuitry without auxiliary supply

Applications

xDSL Modem Power Supply	FPGA Core & I/O Supply
Use Scenario: Powers ADSL/VDSL line card with separate 3.3V analog, 1.2V digital core, and 2.5V I/O rails from single 12V intermediate bus. IC Role / Device Role / Timing Role: ISL6443AIRZ acts as primary triple-output controller managing buck conversion for core/I/O and linear regulation for precision analog rails. Use Value: 180° phase shift cuts input ripple current by 30%, allowing use of fewer 10µF X5R ceramics instead of larger tantalums - saving 22 mm² PCB area.	Use Scenario: Supplies Xilinx Spartan-7 FPGA requiring tightly sequenced 1.0V core, 1.8V transceiver, and 3.3V configuration rails. IC Role / Device Role / Timing Role: ISL6443AIRZ coordinates independent soft-start (SS1/SS2) and shutdown (SD1/SD2) to enforce FPGA power-up sequence per manufacturer spec. Use Value: Programmable soft-start times (via CSS1/CSS2 ratio) ensure VCCINT ramps before VCCAUX - preventing latch-up and guaranteeing JTAG access at power-on.
DSP-Based Telecom System	Set-Top Box Mainboard
Use Scenario: Delivers 1.2V/2A for TI C66x DSP core, 3.3V/2A for DDR3 memory interface, and 5V/500mA for analog audio codec in base station unit. IC Role / Device Role / Timing Role: ISL6443AIRZ provides dual synchronous buck for DSP/memory and linear regulator for noise-sensitive audio supply. Use Value: GATE3-driven PNP linear stage achieves <10 µV_RMS output noise - meeting codec PSRR requirements without additional LDO post-regulation.	Use Scenario: Powers Broadcom BCM7271 SoC with 1.1V core, 1.5V memory, and 3.3V peripherals from 12V wall adapter in consumer STB. IC Role / Device Role / Timing Role: ISL6443AIRZ serves as main PMIC delivering all three rails with PGOOD monitoring across all outputs. Use Value: Single PGOOD signal simplifies system reset logic - asserts only when all three rails are stable within tolerance, eliminating need for discrete OR-gating.

xDSL Modem Power Supply

FPGA Core & I/O Supply

Use Scenario: Powers ADSL/VDSL line card with separate 3.3V analog, 1.2V digital core, and 2.5V I/O rails from single 12V intermediate bus.

IC Role / Device Role / Timing Role: ISL6443AIRZ acts as primary triple-output controller managing buck conversion for core/I/O and linear regulation for precision analog rails.

Use Value: 180° phase shift cuts input ripple current by 30%, allowing use of fewer 10µF X5R ceramics instead of larger tantalums - saving 22 mm² PCB area.

Use Scenario: Supplies Xilinx Spartan-7 FPGA requiring tightly sequenced 1.0V core, 1.8V transceiver, and 3.3V configuration rails.

IC Role / Device Role / Timing Role: ISL6443AIRZ coordinates independent soft-start (SS1/SS2) and shutdown (SD1/SD2) to enforce FPGA power-up sequence per manufacturer spec.

Use Value: Programmable soft-start times (via CSS1/CSS2 ratio) ensure VCCINT ramps before VCCAUX - preventing latch-up and guaranteeing JTAG access at power-on.

DSP-Based Telecom System

Set-Top Box Mainboard

Use Scenario: Delivers 1.2V/2A for TI C66x DSP core, 3.3V/2A for DDR3 memory interface, and 5V/500mA for analog audio codec in base station unit.

IC Role / Device Role / Timing Role: ISL6443AIRZ provides dual synchronous buck for DSP/memory and linear regulator for noise-sensitive audio supply.

Use Value: GATE3-driven PNP linear stage achieves <10 µV_RMS output noise - meeting codec PSRR requirements without additional LDO post-regulation.

Use Scenario: Powers Broadcom BCM7271 SoC with 1.1V core, 1.5V memory, and 3.3V peripherals from 12V wall adapter in consumer STB.

IC Role / Device Role / Timing Role: ISL6443AIRZ serves as main PMIC delivering all three rails with PGOOD monitoring across all outputs.

Use Value: Single PGOOD signal simplifies system reset logic - asserts only when all three rails are stable within tolerance, eliminating need for discrete OR-gating.

Equivalent & Alternatives

The following parts are listed as comparable options for similar triple-output controller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ISL6443AIVZ	TSSOP-28 package (7.6 mm × 4.4 mm); higher θ_JA (75°C/W vs. 36°C/W); no exposed thermal pad	Limited thermal performance in high-power density layouts; unsuitable for >1.5A per buck channel without forced air	Select ISL6443AIVZ only when TSSOP footprint compatibility is mandatory and power dissipation remains below 1.2W.
RT8209MZQW	Single 3A buck + dual 1.5A bucks; 500kHz switching; no linear regulator; different pinout and control logic	Cannot replace ISL6443AIRZ in linear-regulated analog rail applications; requires redesign of feedback and sequencing networks	Consider RT8209MZQW only for new designs where all three rails are switched and higher frequency allows smaller inductors.

Compared with ISL6443AIVZ and RT8209MZQW, the ISL6443AIRZ uniquely combines QFN thermal performance, integrated linear regulation, and true independent dual-buck sequencing - making it irreplaceable in noise-sensitive, thermally constrained, or analog-rail-dependent applications.

Availability

ISL6443AIRZ is available at Aetrix Electronics and suitable for xDSL modems, FPGA power supplies, telecom systems, set-top boxes, and DSP-based embedded platforms requiring stable component supply and long-term production continuity.

Supply support for ISL6443AIRZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics acquired Intersil in 2017 and maintains full product support, documentation, and manufacturing continuity for the ISL6443AIRZ.

The ISL6443AIRZ belongs to Renesas' high-density multi-rail PMIC portfolio, designed specifically for space-constrained, multi-voltage embedded systems requiring precise sequencing, low noise, and robust protection.

FAQ

What is the maximum input voltage supported by the ISL6443AIRZ?

The ISL6443AIRZ supports two input ranges: 5.6V to 24V when powered from VIN, or 4.5V to 5.6V when powered from the VCC_5V pin. Absolute maximum rating for VIN is +27V, but sustained operation above 24V risks exceeding thermal limits. For reliable 24V operation, ensure adequate PCB copper pour on the exposed thermal pad and maintain ambient temperature below +70°C. The ISL6443AIRZ internal LDO dropout is ~600mV, so VCC_5V remains stable at 5V across the full 5.6–24V range.

How does the ISL6443AIRZ implement overcurrent protection without an external sense resistor?

The ISL6443AIRZ monitors the voltage drop across the lower MOSFET's r_DS(ON) using the ISEN1 and ISEN2 pins. An internal comparator compares this sensed voltage against a 1.7V threshold set by OCSET1/OCSET2 resistors. When the drop exceeds the threshold for two consecutive clock cycles, the device enters hiccup mode-disabling gate drivers, resetting soft-start, and attempting automatic recovery. This method eliminates sense resistor losses but requires careful MOSFET selection: typical r_DS(ON) values between 5 mΩ and 20 mΩ yield optimal accuracy. The ISL6443AIRZ datasheet provides Equation 6 for calculating the recommended OCSET resistor based on target current limit and MOSFET r_DS(ON).

Can the ISL6443AIRZ linear regulator (GATE3) drive a P-channel MOSFET directly?

Yes, the ISL6443AIRZ GATE3 output is an open-drain driver capable of sinking up to 50 mA, making it suitable for driving the gate of a P-channel MOSFET in low-dropout linear regulator configurations. To implement this, connect the P-FET source to the input voltage (e.g., 5V), drain to the output rail, and gate to GATE3 through a pull-up resistor (typically 10 kΩ to V_IN). The ISL6443AIRZ's FB3 pin monitors the output and adjusts GATE3 conduction to maintain regulation at 0.8V × (1 + R1/R2). This topology achieves dropout voltages under 200 mV at 500 mA, and the ISL6443AIRZ's 75% undervoltage detection on FB3 ensures fail-safe behavior during load transients.

What is the purpose of the SYNC pin on the ISL6443AIRZ, and what frequency range does it accept?

The SYNC pin on the ISL6443AIRZ enables synchronization of multiple controllers to eliminate beat frequencies and reduce EMI peaks. It accepts an external clock signal in the 4.16 MHz to 5.44 MHz range - exactly 16× the nominal 300 kHz switching frequency - and automatically locks the internal oscillator to the incoming edge. A 1 kΩ pull-down resistor is required on the SYNC line for proper operation. When unused, SYNC must be tied directly to VCC_5V. Synchronization is bidirectional: any ISL6443AIRZ can act as master or slave. This capability is critical in multi-phase or multi-rail systems where coherent switching prevents input capacitor overstress and simplifies EMI filter design.

How does the ISL6443AIRZ handle power sequencing between its three outputs?

The ISL6443AIRZ supports flexible power sequencing via independent SD1/SD2 (enable) and SS1/SS2 (soft-start) pins. Each PWM output can be enabled/disabled separately, while soft-start timing is controlled by external capacitors on SS1 and SS2 - allowing ramp times to be scaled proportionally to output voltage (e.g., CSS1/CSS2 = VOUT1/VOUT2). The linear regulator (GATE3/FB3) starts immediately upon VCC_5V stabilization but remains unmonitored by PGOOD until both PWMs complete soft-start. This architecture enables strict sequencing such as: linear rail first → core rail → I/O rail. All sequencing behavior is confirmed in the ISL6443AIRZ datasheet Table 1 (PGOOD status matrix) and Figure 14 (tracking waveforms).

ISL6443AIRZ Specifications

Product attributes: Attribute value

Manufacturer:: Renesas

Series:: -

Package/Case:: 28-VFQFN Exposed Pad

Packaging:: Tube

Product Status:: Obsolete

Applications:: Power Supplies

Current - Supply:: 2mA

Voltage - Supply:: 5.6V ~ 24V

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 28-QFN (5x5)

ISL6443AIRZ FAQ

1.How can I place an order for ISL6443AIRZ through Aetrix?

Please submit a Request for Quotation (RFQ) for ISL6443AIRZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ISL6443AIRZ reliable?

The price and inventory of ISL6443AIRZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6443AIRZ is usually 5 days.

3.What payment methods are accepted for ISL6443AIRZ?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6443AIRZ transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ISL6443AIRZ?

ISL6443AIRZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ISL6443AIRZ order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ISL6443AIRZ?

For technical support, including ISL6443AIRZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6443AIRZ requirements.

6.How does Aetrix verify that ISL6443AIRZ is sourced from the original manufacturer or authorized distributors?

All ISL6443AIRZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6443AIRZ meets industry standards.

7.What is the process for return or replacement of ISL6443AIRZ?

All ISL6443AIRZ units undergo pre-shipment inspection (PSI). If there is an issue with ISL6443AIRZ, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ISL6443AIRZ part is unused and in its original packaging.

Return procedure for ISL6443AIRZ:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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