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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Power Management - Specialized

Renesas ISL6443AIVZ-TK

Name: ISL6443AIVZ-TK
Brand: Renesas
SKU: ISL6443AIVZ-TK
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ISL6443AIVZ-TK

Manufacturer:: Renesas

Category:: Power Management - Specialized

Package:: 28-TSSOP (0.173", 4.40mm Width)

Datasheet:: ISL6443AIVZ-TK.pdf

Description:: IC CTRLR SGL/STP DWN PWM 28TSSOP

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Product details

Overview

ISL6443AIVZ-TK from Renesas (formerly Intersil) is a triple-output DC/DC controller integrating two 300kHz out-of-phase synchronous buck PWM controllers and one linear regulator controller, supporting input voltages from 4.5V to 24V and output voltages adjustable down to 0.8V. It delivers precise voltage sequencing for DSP, FPGA, and memory power rails in xDSL modems and set-top boxes.

For engineers reviewing the ISL6443AIVZ-TK datasheet, ISL6443AIVZ-TK pinout, ISL6443AIVZ-TK application, or ISL6443AIVZ-TK equivalent, key selection criteria include its 180° out-of-phase PWM operation for reduced input ripple, no external current-sense resistor requirement (using r_DS(ON) sensing), hiccup-mode overcurrent protection, independent shutdown inputs (SD1/SD2), and single PGOOD monitoring all three outputs.

Technical Context

The ISL6443AIVZ-TK implements current-mode PWM control with input voltage feed-forward to maintain stable loop gain across wide VIN ranges. Its dual PWM channels operate at fixed 300kHz with adaptive dead-time gate drivers and synchronized 180° phase offset to minimize RMS input current and EMI.

Each PWM uses lower-MOSFET r_DS(ON) for current sensing via ISEN1/ISEN2 pins, with OCSET1/OCSET2 resistors setting overcurrent thresholds at 1.7V reference. The linear controller (GATE3) supports PNP/PFET configurations for ultra-low-dropout regulation, while internal 5V LDO (VCC_5V) powers bias circuitry and boot capacitors.

Key Specifications

Parameter	Value and Actual Design Meaning
Switching frequency	300kHz ±13% - fixed-frequency operation enables predictable EMI filtering and simplifies output inductor selection.
PWM phase relationship	180° out-of-phase - reduces input capacitor RMS ripple current by up to 30%, lowering required capacitance and ESR.
Output voltage range	0.8V to VIN − V_d1 - supports core logic (1.2V), I/O (3.3V), and analog (2.5V) rails with resistor-divider feedback (FB1–FB3).
Current sensing method	r_DS(ON)-based, no external resistor - eliminates sense-resistor power loss and PCB area; OCSET pins set threshold at 1.7V.
Protection features	Hiccup-mode OCP, thermal shutdown at +150°C, UVLO on VCC_5V (4.25V rise), independent SD1/SD2 shutdown - ensures robust fault recovery without latch-up.
PGOOD logic	Open-drain output active HIGH only when both PWM outputs are within ±10% of setpoint AND linear output >75% of setpoint - provides system-level power-good validation.
Package	28-lead TSSOP (M28.173), RoHS-compliant, Pb-free - surface-mount package with exposed pad not present; compatible with standard reflow profiles.

Pinout & Package

ISL6443AIVZ-TK is housed in a 28-lead TSSOP package (JEDEC MO-153 compliant, 9.7mm × 4.4mm × 1.2mm height), with SGND (Pin 20) as small-signal ground and PGND (Pin 9) as high-current power ground-requiring separate PCB routing to avoid noise coupling.

Pin/Terminal	Circuit Role	Design Meaning
FB1, FB2, FB3	Voltage feedback inputs	Connect to resistor dividers to set PWM1/PWM2 and linear regulator output voltages; referenced to SGND; bias current ≤150nA.
ISEN1, ISEN2	Current sense inputs	Monitor voltage drop across lower MOSFETs' r_DS(ON); enable lossless current limiting without external sense resistors.
UGATE1, UGATE2	High-side N-MOSFET gate drivers	Provide 400mA peak drive; require external bootstrap circuit (BOOTx–PHASEx) for high-side gate voltage boosting above VIN.
LGATE1, LGATE2	Low-side N-MOSFET gate drivers	Supplied from VCC_5V; 400mA sink/source capability; optimized for fast turn-on/turn-off with adaptive dead-time control.
GATE3	Linear regulator output driver	Open-drain output driving PNP emitter or PFET source; supports ultra-low dropout with programmable output via FB3 divider.
SD1, SD2	Independent PWM enable/disable	Logic-level inputs: HIGH (≥2.0V) enables respective PWM; LOW (≤0.8V) disables with soft-stop behavior and PGOOD recalibration.
PGOOD	Power-good status indicator	Open-drain output pulled HIGH only after soft-start completion and simultaneous regulation of all enabled outputs per Table 1.
VIN, VCC_5V	Main supply and internal LDO	VIN accepts 4.5–24V; VCC_5V is 5V ±10% LDO output (60mA min), used as bias source and boot capacitor charger.

Key Features

Feature	Design Value
Out-of-phase dual PWM	180° phase shift reduces input capacitor RMS ripple current by ~30%, enabling smaller, lower-cost bulk capacitance.
r_DS(ON) current sensing	Eliminates external current-sense resistor and associated power loss; OCSET pins allow precise overcurrent threshold tuning.
Independent soft-start	SS1/SS2 pins support programmable ramp time (via external capacitor) and output voltage sequencing (e.g., core before I/O).
Hiccup-mode overcurrent protection	Two-cycle fault latching followed by automatic soft-start retry prevents thermal runaway during sustained overload or short-circuit.
Single PGOOD with multi-output validation	Asserts only when all enabled outputs meet regulation tolerance and soft-start completes-reducing need for external power-monitor ICs.

Applications

xDSL Modem Power Supply	FPGA Core & I/O Rail Sequencing
Use Scenario: Dual-voltage power delivery for ADSL/VDSL line cards requiring isolated 3.3V analog, 1.2V core, and 2.5V I/O rails from a single 12V intermediate bus. IC Role / Device Role / Timing Role: ISL6443AIVZ-TK acts as primary multi-rail controller managing synchronous buck conversion (PWM1/PWM2) and low-noise linear regulation (GATE3) with coordinated soft-start. Use Value: 180° out-of-phase operation cuts input ripple by 30%, reducing 12V bulk capacitor count from three 470µF to one 330µF + one 100µF ceramic.	Use Scenario: Powering Xilinx Spartan-6 FPGA with strict 1.2V core (2A), 2.5V auxiliary (500mA), and 3.3V I/O (1.5A) rails requiring monotonic startup sequence. IC Role / Device Role / Timing Role: ISL6443AIVZ-TK provides independent SS1/SS2 timing control and FB3-based linear regulation to enforce core-first, I/O-last sequencing. Use Value: Programmable soft-start capacitors (CSS1/CSS2 ratio = 1.2/3.3) ensure VOUT1 reaches regulation 2.7ms before VOUT2, meeting FPGA vendor's t_SEQ requirement.
DSP-Based Telecom System	Set-Top Box AV Processing Board
Use Scenario: Multi-output supply for TI C6748 DSP with 1.3V core, 3.3V peripheral, and 1.8V DDR interface, operating from 5.6V wall adapter. IC Role / Device Role / Timing Role: ISL6443AIVZ-TK serves as compact, integrated controller replacing discrete buck + LDO solutions; VCC_5V powers internal logic and boot circuits directly from VIN. Use Value: No external current-sense resistors reduce BOM cost by $0.08/unit and eliminate 2× 0805 footprints, improving layout density.	Use Scenario: Power management for STB main board with MPEG decoder (1.2V), HDMI PHY (3.3V), and audio DAC (2.5V), subject to strict EMI limits. IC Role / Device Role / Timing Role: ISL6443AIVZ-TK functions as EMI-optimized controller using 180° phase shift and fixed 300kHz frequency to concentrate switching noise away from sensitive RF bands. Use Value: Reduced input ripple lowers conducted EMI by 8dB at 150kHz, eliminating need for additional π-filter on 12V input rail.

xDSL Modem Power Supply

FPGA Core & I/O Rail Sequencing

Use Scenario: Dual-voltage power delivery for ADSL/VDSL line cards requiring isolated 3.3V analog, 1.2V core, and 2.5V I/O rails from a single 12V intermediate bus.

IC Role / Device Role / Timing Role: ISL6443AIVZ-TK acts as primary multi-rail controller managing synchronous buck conversion (PWM1/PWM2) and low-noise linear regulation (GATE3) with coordinated soft-start.

Use Value: 180° out-of-phase operation cuts input ripple by 30%, reducing 12V bulk capacitor count from three 470µF to one 330µF + one 100µF ceramic.

Use Scenario: Powering Xilinx Spartan-6 FPGA with strict 1.2V core (2A), 2.5V auxiliary (500mA), and 3.3V I/O (1.5A) rails requiring monotonic startup sequence.

IC Role / Device Role / Timing Role: ISL6443AIVZ-TK provides independent SS1/SS2 timing control and FB3-based linear regulation to enforce core-first, I/O-last sequencing.

Use Value: Programmable soft-start capacitors (CSS1/CSS2 ratio = 1.2/3.3) ensure VOUT1 reaches regulation 2.7ms before VOUT2, meeting FPGA vendor's t_SEQ requirement.

DSP-Based Telecom System

Set-Top Box AV Processing Board

Use Scenario: Multi-output supply for TI C6748 DSP with 1.3V core, 3.3V peripheral, and 1.8V DDR interface, operating from 5.6V wall adapter.

IC Role / Device Role / Timing Role: ISL6443AIVZ-TK serves as compact, integrated controller replacing discrete buck + LDO solutions; VCC_5V powers internal logic and boot circuits directly from VIN.

Use Value: No external current-sense resistors reduce BOM cost by $0.08/unit and eliminate 2× 0805 footprints, improving layout density.

Use Scenario: Power management for STB main board with MPEG decoder (1.2V), HDMI PHY (3.3V), and audio DAC (2.5V), subject to strict EMI limits.

IC Role / Device Role / Timing Role: ISL6443AIVZ-TK functions as EMI-optimized controller using 180° phase shift and fixed 300kHz frequency to concentrate switching noise away from sensitive RF bands.

Use Value: Reduced input ripple lowers conducted EMI by 8dB at 150kHz, eliminating need for additional π-filter on 12V input rail.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-output DC/DC controller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ISL6443AIRZ	Same die, 28-lead 5×5 QFN package (L28.5x5); 36°C/W θ_JA vs. 75°C/W for TSSOP; exposed thermal pad improves thermal performance.	Better suited for high-power-density designs with limited airflow; requires different PCB land pattern and reflow profile.	Select ISL6443AIRZ when thermal budget is constrained and board space allows QFN footprint; ISL6443AIVZ-TK remains optimal for legacy TSSOP-compatible layouts.
TPS51220ARGER	Dual 300kHz synchronous buck controller only (no linear regulator); supports 0.6V–5.5V outputs; integrated MOSFET drivers but no GATE3 output.	Lacks third linear output-requires external LDO for low-noise analog rails; no PGOOD monitoring of linear output.	Choose TPS51220ARGER only if linear regulation is handled separately; ISL6443AIVZ-TK provides tighter integration for mixed-signal SoC power domains.

Compared with ISL6443AIRZ, ISL6443AIVZ-TK offers identical functionality in a thermally less efficient but more manufacturable TSSOP package; versus TPS51220ARGER, it uniquely integrates linear regulation and unified PGOOD, reducing component count by one LDO and one supervisor IC in multi-rail systems.

Availability

ISL6443AIVZ-TK is available at Aetrix Electronics and suitable for xDSL modems, FPGA power supplies, telecom baseband boards, and set-top box AV processing requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for ISL6443AIVZ-TK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics Corporation acquired Intersil in 2017 and maintains full technical and supply chain continuity for legacy Intersil power management ICs including the ISL6443A series.

The ISL6443A product line was designed for high-efficiency, space-constrained multi-rail power systems in broadband communications and consumer electronics, emphasizing integration, thermal resilience, and simplified design-in.

FAQ

What is the maximum input voltage supported by the ISL6443AIVZ-TK?

The ISL6443AIVZ-TK supports a maximum input voltage of 24V on the VIN pin. When powered from the VCC_5V pin instead, the input range is limited to 4.5V to 5.6V. Absolute maximum rating for VIN is +27V, but operation above 24V risks exceeding internal voltage limits and triggering overvoltage protection. The ISL6443AIVZ-TK datasheet specifies 24V as the upper limit for reliable continuous operation under recommended conditions.

Does the ISL6443AIVZ-TK require external current-sense resistors?

No, the ISL6443AIVZ-TK does not require external current-sense resistors. It uses the r_DS(ON) of the lower MOSFETs to sense output current via the ISEN1 and ISEN2 pins. This lossless sensing method eliminates power dissipation and PCB area associated with shunt resistors. Overcurrent thresholds are set by resistors from OCSET1/OCSET2 to ground, referencing an internal 1.7V threshold. The ISL6443AIVZ-TK datasheet confirms this architecture on page 12 under "Overcurrent Protection".

How does the PGOOD signal behave when only one PWM output is enabled?

When only one PWM output is enabled (e.g., SD1 = HIGH, SD2 = LOW), the PGOOD signal goes HIGH only after soft-start completes for the enabled channel and its output voltage stabilizes within ±10% of the setpoint-while ignoring FB2 and SS2 status. The linear regulator output (FB3) must still exceed 75% of its setpoint. This behavior is defined in Table 1 of the ISL6443AIVZ-TK datasheet, where "x" denotes "don't care" for disabled channels' feedback and soft-start states.

Can the ISL6443AIVZ-TK synchronize with other controllers?

Yes, the ISL6443AIVZ-TK supports bidirectional frequency synchronization via the SYNC pin. Connecting SYNC pins of multiple ISL6443AIVZ-TK devices-with one configured as master (SYNC pulled to VCC_5V) and others as slaves (SYNC pulled to ground via 1kΩ)-forces all units to operate at the master's frequency. The SYNC input accepts 4.16–5.44MHz signals, corresponding to 16× the internal 300kHz clock. This capability is documented in the Electrical Specifications table on page 5 of the ISL6443AIVZ-TK datasheet.

What is the purpose of the SGND and PGND pins on the ISL6443AIVZ-TK?

SGND (Pin 20) is the small-signal reference ground for all error amplifiers, feedback comparators, and logic circuits; it must be routed separately from high-current paths. PGND (Pin 9) is the power ground for low-side gate drivers and lower MOSFET sources, carrying high di/dt currents. Separating SGND and PGND prevents noise coupling into sensitive analog circuitry-critical for stable regulation and accurate current sensing. The ISL6443AIVZ-TK Pin Descriptions section (page 10) explicitly mandates separate PCB routing for these grounds.

ISL6443AIVZ-TK Specifications

Product attributes: Attribute value

Manufacturer:: Renesas

Series:: -

Package/Case:: 28-TSSOP (0.173", 4.40mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Applications:: Power Supplies

Current - Supply:: 2mA

Voltage - Supply:: 5.6V ~ 24V

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 28-TSSOP

ISL6443AIVZ-TK FAQ

1.How can I place an order for ISL6443AIVZ-TK through Aetrix?

Please submit a Request for Quotation (RFQ) for ISL6443AIVZ-TK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ISL6443AIVZ-TK reliable?

The price and inventory of ISL6443AIVZ-TK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL6443AIVZ-TK is usually 5 days.

3.What payment methods are accepted for ISL6443AIVZ-TK?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL6443AIVZ-TK transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ISL6443AIVZ-TK?

ISL6443AIVZ-TK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ISL6443AIVZ-TK order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ISL6443AIVZ-TK?

For technical support, including ISL6443AIVZ-TK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL6443AIVZ-TK requirements.

6.How does Aetrix verify that ISL6443AIVZ-TK is sourced from the original manufacturer or authorized distributors?

All ISL6443AIVZ-TK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL6443AIVZ-TK meets industry standards.

7.What is the process for return or replacement of ISL6443AIVZ-TK?

All ISL6443AIVZ-TK units undergo pre-shipment inspection (PSI). If there is an issue with ISL6443AIVZ-TK, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ISL6443AIVZ-TK part is unused and in its original packaging.

Return procedure for ISL6443AIVZ-TK:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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