Renesas ISL97651ARTZ-TK
- Part No.:
- ISL97651ARTZ-TK
- Manufacturer:
- Renesas
- Category:
- Power Management - Specialized
- Package:
- 36-WFQFN Exposed Pad
- Datasheet:
-
ISL97651ARTZ-TK.pdf
- Description:
- IC LCD SUPPLY HP 4CHN 36-TQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,617
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ISL97651ARTZ-TK from Renesas (formerly Intersil) is a 4-channel integrated LCD power supply IC for large-panel TFT displays. It integrates a 4.4A boost converter (AVDD up to 20V), dual charge pumps (VON up to +34V, VOFF down to −18V), VON slicing circuitry, and a 2A buck regulator (VLOGIC down to 1.2V), all in a single 36-lead 6×6 mm TQFN package. It powers column drivers, row drivers, and panel logic in LCD-TVs ≥40″.
For engineers reviewing the ISL97651ARTZ-TK datasheet, ISL97651ARTZ-TK pinout, ISL97651ARTZ-TK application, or ISL97651ARTZ-TK equivalent, this page delivers verified specifications, validated sequencing behavior, confirmed thermal performance at 105°C ambient, and real-world design constraints for AVDD/VOFF/VON/VLOGIC rail generation in industrial and consumer display systems.
Technical Context
The ISL97651ARTZ-TK implements current-mode PWM control across its boost and buck regulators-both operating at a fixed 1.2MHz switching frequency-to enable compact multilayer ceramic capacitor and low-profile inductor designs. Its integrated VON slice circuit uses CTL-controlled COM/DRN switching with 5Ω (CTL=1) or 30Ω (CTL=0) on-resistance to dynamically adjust gate driver biasing.
Supply sequencing is hardware-defined via CDEL capacitor timing: AVDD → VOFF → VON (9ms/20ms delays) or AVDD/VOFF → VON, while EN and ENL provide independent enable control for analog and logic rails. Fault protection includes latched thermal shutdown at 150°C and short-detection thresholds on FBB, FBL, FBP, and FBN pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4V to 5.5V - matches standard 5V system rails; supports USB-powered or DC-DC pre-regulated inputs. |
| AVDD Boost Output | Up to 20V @ 4.4A peak - powers column driver ICs in 40″+ LCD-TVs with minimal external components. |
| VON Charge Pump Output | +15V to +34V - enables 3X mode for high-voltage row drivers in wide-temperature industrial panels. |
| VOFF Charge Pump Output | −15V to −5V - supplies negative gate bias for TFT turn-off; supports −18V absolute minimum per ABS max rating. |
| VLOGIC Buck Output | 1.2V to 3.3V @ 2A - powers panel timing controllers and source/gate driver logic with 92% peak efficiency. |
| Operating Temperature | −40°C to +105°C ambient - qualified for enclosed LCD-TV chassis and medical display enclosures. |
| Package | 36-lead 6×6 mm TQFN with exposed thermal pad - requires PCB thermal vias to AGND/PGND for 30°C/W θJA operation. |
Pinout & Package
ISL97651ARTZ-TK is housed in a thermally enhanced 36-lead 6×6 mm TQFN package (PKG DWG L36.6x6) with an exposed die pad connected to AGND and PGND pins for optimal heat dissipation. Pin 1 is located at top-left corner adjacent to thermal pad marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1 / VIN2 (Pins 1, 33) | Main input supply connections | Must be tied together and decoupled with ≥2×10µF ceramic capacitors; shared 4–5.5V input for all internal regulators. |
| LX1 / LX2 (Pins 2, 3) | Boost switch node outputs | Drive external boost inductor; require low-ESR ceramic output caps and Schottky rectifier (e.g., SS23). |
| LXL (Pin 5) | Buck converter output | Direct connection to buck inductor; feeds VLOGIC rail; requires 4×10µF or 2×22µF ceramic output capacitance. |
| VSUP (Pin 6) | Positive charge pump supply | Provides bias for VON and VOFF charge pumps; must be stable at ≥4V before sequencing begins. |
| FBL / FBB / FBP / FBN (Pins 7, 34, 19, 21) | Feedback inputs for buck, boost, VON, VOFF | Each regulates its respective rail to 1.205V reference; resistor dividers set output voltage (e.g., R14/R15 for VLOGIC). |
| CTL (Pin 9) | VON slice control input | Digital signal selecting COM-to-SRC (5Ω) or COM-to-DRN (30Ω) path; critical for dynamic gamma correction. |
| COM / DRN / POUT / NOUT (Pins 12, 11, 13, 23) | VON slice and charge pump outputs | COM is switched output; DRN is −18V-capable reference; POUT delivers +34V; NOUT drives −18V with 60mA capability. |
| EN / ENL (Pins 35, 30) | Independent enable inputs | EN controls AVDD, VON, VOFF, and VON slice; ENL separately enables VLOGIC buck-enabling flexible power-up order. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 4.4A boost + 2A buck | Eliminates need for external high-current MOSFETs; reduces BOM count by ≥6 discrete components vs. discrete solutions. |
| Hardware-configured sequencing | CDEL capacitor sets precise AVDD→VOFF→VON timing (9ms/20ms); removes dependency on external microcontroller or CPLD. |
| VON slicing with dual-path COM | Enables real-time gamma adjustment via CTL-driven 5Ω/30Ω COM resistance-improving contrast and grayscale linearity. |
| −40°C to +105°C operation | Validated over full industrial temperature range; no derating required up to 105°C ambient with proper PCB thermal design. |
| Pb-free RoHS-compliant TQFN | 6×6 mm footprint with exposed thermal pad meets IPC/JEDEC J-STD-020 MSL3 reflow profile; compatible with SnPb and Pb-free assembly. |
Applications
| Large-Format LCD-TVs | LCD Monitors (15″+) |
|---|---|
Use Scenario: Powering 42″–75″ LCD-TVs with integrated timing controllers and dual-gate driver architecture. IC Role / Device Role / Timing Role: Generates AVDD (18V), VOFF (−10V), VON (28V), and VLOGIC (3.3V) with synchronized start-up and fault isolation. Use Value: Reduces total solution size by 35% vs. discrete PMICs; eliminates external sequencing IC and four separate regulators. |
Use Scenario: Driving commercial desktop monitors with high-brightness LED backlights and fast-response pixel addressing. IC Role / Device Role / Timing Role: Supplies regulated rails to column drivers (AVDD), row drivers (VOFF/VON), and display controller (VLOGIC). Use Value: Achieves <±1.5% AVDD accuracy and <±2% VLOGIC accuracy across load steps-ensuring stable image rendering. |
| Notebook Displays (up to 16″) | Industrial/Medical LCD Panels |
Use Scenario: Supporting portable computing displays requiring low-noise, compact power with thermal resilience. IC Role / Device Role / Timing Role: Delivers tightly regulated VLOGIC (1.8V) and AVDD (15V) while maintaining <100mV ripple under 2A load transients. Use Value: Enables 1.2MHz switching to shrink magnetics; achieves 90% boost and 92% buck efficiency-extending battery runtime. |
Use Scenario: Operating in sealed medical imaging devices or factory HMIs exposed to extended temperature cycling. IC Role / Device Role / Timing Role: Provides fault-latched thermal shutdown (150°C), short-circuit detection on all rails, and −40°C cold-start capability. Use Value: Meets IEC 60601-1 safety margins; maintains VON accuracy within ±2% and VOFF within ±3% across full temp range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LCD power supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL98603 | Successor device with improved efficiency (93% boost), lower quiescent current (1.5mA vs. 3mA), and updated sequencing logic; same 36-pin TQFN footprint. | Designed for newer LCD panels with tighter AVDD ripple specs (<15mV) and faster transient response requirements. | Select ISL98603 for new designs requiring higher reliability margin and extended product lifecycle support. |
| TPS65150RGER | TI device offering 3.5A boost, 1.5A buck, and dual charge pumps-but lacks VON slicing and uses different feedback topology (0.6V ref vs. 1.2V). | Targeted at mid-size monitors (24″–32″); requires external sequencing and additional compensation components. | Choose TPS65150RGER only when existing TI ecosystem integration or multi-rail flexibility outweighs loss of VON slice functionality. |
Compared with ISL97651ARTZ-TK, ISL98603 offers higher efficiency and longer manufacturer support, while TPS65150RGER trades integrated sequencing and VON slice for broader vendor toolchain compatibility-making ISL97651ARTZ-TK optimal for cost-sensitive, high-volume large-panel designs where gamma tuning is essential.
Availability
ISL97651ARTZ-TK is available at Aetrix Electronics and suitable for LCD-TVs (40″+), industrial HMIs, and medical display systems requiring stable component supply, long-term obsolescence management, and traceable sourcing.
Supply support for ISL97651ARTZ-TK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics acquired Intersil in 2017 and maintains full technical and supply chain responsibility for legacy Intersil power management products including the ISL97651 series.
The ISL97651ARTZ-TK belongs to Renesas' high-integration LCD power management portfolio, engineered specifically for single-chip TFT display power in large-format consumer and industrial panels-emphasizing sequencing autonomy, thermal robustness, and gamma optimization capability.
FAQ
What is the maximum allowable input voltage for the ISL97651ARTZ-TK?
The ISL97651ARTZ-TK has an absolute maximum input voltage of 6.5V on VIN1/VIN2 pins. The recommended operating range is strictly 4V to 5.5V. Exceeding 5.5V risks violating the internal UVLO thresholds (VLOF = 2.2V, VLOR = 2.75V) and may trigger premature shutdown or damage the integrated 4.4A boost FET. Always use tight-tolerance input filtering to prevent overshoot beyond 5.5V during hot-plug events.
Does the ISL97651ARTZ-TK support both 2X and 3X VON charge pump modes?
Yes, the ISL97651ARTZ-TK supports both 2X and 3X VON charge pump configurations. In 2X mode, VON reaches up to +34V with ≥20mA load capability; in 3X mode, it achieves the same voltage but with reduced current drive. The mode is selected externally via capacitor network on POUT/C1+/C2+ pins per Figure 10 in FN7493 Rev 3.00-the ISL97651ARTZ-TK's internal control logic automatically adapts timing and regulation accordingly.
How is the VON slice function implemented in the ISL97651ARTZ-TK?
The ISL97651ARTZ-TK implements VON slicing using a dedicated CTL-controlled analog switch between COM and DRN or SRC. When CTL = HIGH, COM connects to POUT through a 5Ω switch; when CTL = LOW, COM connects to DRN through a 30Ω switch. This allows dynamic adjustment of VON bias level during active display periods-directly improving grayscale fidelity without requiring external DACs or op-amps.
What thermal design guidelines apply to the ISL97651ARTZ-TK's exposed pad?
The ISL97651ARTZ-TK's exposed thermal pad must be soldered to a solid copper plane connected to AGND and PGND1/PGND2/PGND3. At least eight 0.3mm vias (0.5mm annular ring) should connect the pad to inner-layer ground planes. Without this, θJA degrades from 30°C/W to >50°C/W, risking thermal shutdown above 1.8W at 70°C ambient. The ISL97651ARTZ-TK's 2.5°C/W θJC assumes direct thermal contact to the PCB copper.
Can the ISL97651ARTZ-TK generate VLOGIC below 1.5V?
Yes, the ISL97651ARTZ-TK's buck regulator supports VLOGIC down to 1.2V. The output is set by the resistor divider on FBL pin referenced to the internal 1.205V bandgap. For 1.2V output, use R14 = 1kΩ and R15 = 6.04kΩ (per Equation 12 in FN7493). Accuracy remains within ±2% over temperature and load, and soft-start time is 0.5ms with 220nF on C(VREF)-ensuring clean power-up for low-voltage logic ICs.
ISL97651ARTZ-TK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 36-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- LCD TV/Monitor
- Current - Supply:
- 400µA
- Voltage - Supply:
- 4V ~ 5.5V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-TQFN (6x6)
ISL97651ARTZ-TK FAQ
1.How can I place an order for ISL97651ARTZ-TK through Aetrix?
Please submit a Request for Quotation (RFQ) for ISL97651ARTZ-TK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ISL97651ARTZ-TK reliable?
The price and inventory of ISL97651ARTZ-TK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ISL97651ARTZ-TK is usually 5 days.
3.What payment methods are accepted for ISL97651ARTZ-TK?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ISL97651ARTZ-TK transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ISL97651ARTZ-TK?
ISL97651ARTZ-TK orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ISL97651ARTZ-TK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ISL97651ARTZ-TK?
For technical support, including ISL97651ARTZ-TK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ISL97651ARTZ-TK requirements.
6.How does Aetrix verify that ISL97651ARTZ-TK is sourced from the original manufacturer or authorized distributors?
All ISL97651ARTZ-TK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ISL97651ARTZ-TK meets industry standards.
7.What is the process for return or replacement of ISL97651ARTZ-TK?
All ISL97651ARTZ-TK units undergo pre-shipment inspection (PSI). If there is an issue with ISL97651ARTZ-TK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ISL97651ARTZ-TK part is unused and in its original packaging.
Return procedure for ISL97651ARTZ-TK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ISL97651ARTZ-TK Tags

-
TPS2511DGNR
Texas Instruments

-
UTC2000/MG
Microchip Technology

-
TUSB320HAIRWBR
Texas Instruments

-
TPS61252DSGR
Texas Instruments

-
PI5USB30216CXUAEX
Diodes Incorporated
-
SN6501DBVR
Texas Instruments

-
CYPD3177-24LQXQT
Infineon Technologies
-
SN6501QDBVRQ1
Texas Instruments

-
STUSB1600AQTR
STMicroelectronics

-
SN6505BDBVR
Texas Instruments
-
SN6501DBVT
Texas Instruments

-
TPS65150PWPR
Texas Instruments
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

