STMicroelectronics L6615D
- Part No.:
- L6615D
- Manufacturer:
- STMicroelectronics
- Category:
- Power Management - Specialized
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
L6615D.pdf
- Description:
- IC CTRLR LOAD SHARE HI/LO 8-SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
L6615D from STMicroelectronics is a high/low-side load share controller IC designed for current balancing across paralleled DC-DC power modules in distributed systems. It supports 2.7 V to 22 V VCC, features full differential low-offset current sensing (±2 mV offset), 32 kΩ input impedance, and hysteretic UVLO with 2.60 V turn-on threshold. It enables (N+1) redundancy up to N = 20 in server-grade SMPS.
For engineers reviewing the L6615D datasheet, L6615D pinout, L6615D application, or L6615D equivalent, this device is selected for precise master-slave current sharing in high-density, thermally constrained, and fault-tolerant power architectures where remote voltage sensing, dual-side sense flexibility, and share-bus noise immunity are critical.
Technical Context
The L6615D integrates three functional amplifiers: a current sense amplifier (CSA) with automatic high/low-side switchover at 1.6 V on CS+, a share sense amplifier (SSA) with 32 kΩ input impedance, and a transconductance error amplifier (Gm = 4 ms) whose output drives an open-collector ADJ amplifier. The CSA's mirror accuracy is ±5% for both sensing modes.
Its share bus (SH pin) operates as a bidirectional node: in master mode, it sources voltage proportional to IOUT; in slave mode, it sinks current via the error amplifier to trim output voltage. The CGA pin delivers a mirrored current proportional to sensed voltage, clamped only by VCC - not by output rail voltage - ensuring independence from power stage topology.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2.7 V to 22 V - supports wide-input industrial and server auxiliary rails without external regulators. |
| Current Sense Offset | ±2 mV typ. - enables accurate sub-100 mV sense voltage detection for low-RSENSE designs. |
| Input Impedance (SSA) | 32 kΩ typ. - minimizes loading on shared bus while maintaining noise rejection in multi-module systems. |
| UVLO Hysteresis | 100 mV - prevents oscillation during brown-in/brown-out transitions in unregulated supply environments. |
| Share Bus Slew Rate | 0.8–4 V/μs - ensures stable transient response during load step events without overshoot in N+1 systems. |
| CGA Short-Circuit Current | −2.0 mA max - defines maximum drive capability into RCGA, setting full-scale share bus voltage range. |
| ADJ Output Current | 6.5–13 mA - directly controls feedback path current diversion in slave supplies to adjust duty cycle. |
Pinout & Package
Package: SO8 (Small Outline, 8-pin, 150 mil width), RoHS-compliant, surface-mount.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 GND | Power and signal reference ground | Common return for all internal amplifiers and external sense resistors; must be low-impedance to avoid current-sense errors. |
| 2 CS− | Negative input of current sense amplifier | Connected via RG2 to low-side of RSENSE; bias current ≤1.0 μA ensures minimal offset in precision sensing. |
| 3 CS+ | Positive input of current sense amplifier | Switchover threshold at 1.6 V determines high/low-side mode; common-mode range extends to VCC. |
| 4 ADJ | Open-collector output of adjustable amplifier | Sinks current from feedback path of slave supplies; 10 mA drive capability allows direct connection to standard optocoupler inputs. |
| 5 COMP | Error amplifier output / compensation node | Clamped to 1.5 V max; requires RC network to ground for loop stability in current-sharing feedback. |
| 6 SH | Share bus interface (bidirectional) | Drives or senses shared voltage bus; 45 mV low-level output ensures reliable logic-low detection in noisy environments. |
| 7 CGA | Current gain adjust output | Delivers mirrored current proportional to VSENSE; sets share bus gain via external RCGA (e.g., 16 kΩ for 8 V full scale). |
| 8 VCC | Supply voltage input | Powers all internal circuitry; also clamps maximum SH and CGA voltages to VCC − 2.2 V. |
Key Features
| Feature | Design Value |
|---|---|
| Automatic high/low-side sensing | Switchover at 1.6 V on CS+ eliminates manual configuration and supports both output- and ground-referenced sense placements. |
| Full differential current sensing | ±2 mV input offset enables <100 mV sense voltage use, reducing power loss and thermal stress in RSENSE. |
| Share bus voltage clamping | Clamped only by VCC - not output rail - decouples current sharing dynamics from power stage regulation loop. |
| Open-collector ADJ output | 6.5–13 mA sink capability interfaces directly with standard DC-DC controller feedback pins without level-shifting. |
| Hysteretic UVLO | 100 mV hysteresis prevents chatter during marginal supply conditions typical in redundant power backplanes. |
Applications
| Web Server Power Distribution | Telecom Rectifier Shelf |
|---|---|
Use Scenario: 12 V/200 A distributed power architecture with eight 25 A DC-DC modules in parallel, requiring thermal derating and graceful degradation. IC Role / Device Role / Timing Role: Master-slave current balancer coordinating share bus voltage to equalize per-module current within ±3% tolerance. Use Value: Enables uniform thermal stress distribution across modules, extending mean time between failures (MTBF) by >40% versus unbalanced operation. | Use Scenario: -48 V telecom rectifier shelf with (N+1) redundancy (N = 5), where one module must fail without interrupting load delivery. IC Role / Device Role / Timing Role: Load share controller ensuring each active module carries exactly 1/N of total load current, independent of output voltage variation. Use Value: Guarantees uninterrupted operation during single-point failure, meeting GR-1089 Class B immunity and NEBS Level 3 requirements. |
| Industrial PLC Power Backplane | High-Density GPU Server VRM |
Use Scenario: Modular 24 V PLC backplane with four hot-swappable power modules feeding I/O and CPU rails under variable load profiles. IC Role / Device Role / Timing Role: Real-time current balancer using remote sense lines to compensate for PCB trace resistance and connector voltage drops. Use Value: Maintains ±1% output regulation across all modules despite 50 mΩ interconnect resistance, eliminating need for individual trim pots. | Use Scenario: Dual-rail (12 V input / 0.8 V output) GPU server with six paralleled multiphase VRMs delivering >600 A to ASICs. IC Role / Device Role / Timing Role: High-bandwidth current sharing node synchronizing transient response across VRMs via low-impedance share bus. Use Value: Reduces peak current imbalance during 100 A/μs load steps from >25% to <5%, preventing localized overcurrent shutdown. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar load share controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UC3907DW | Fixed 5 V VCC requirement; no low-side sensing; uses external op-amp for current sense. | Requires additional components for dual-side sensing and lacks integrated UVLO hysteresis. | Choose when legacy 5 V system design mandates compatibility and board space permits discrete sensing circuitry. |
| LM5069MMX | Integrated hot-swap controller with current limiting; no share bus architecture or master-slave coordination. | Designed for single-supply protection, not multi-module current balancing. | Select only for overcurrent protection in non-redundant point-of-load applications - not as a functional replacement. |
Compared with UC3907DW and LM5069MMX, the L6615D uniquely integrates automatic high/low-side sensing, share bus drive/sense, and open-collector ADJ control in a single SO8 package - enabling true plug-and-play (N+1) redundancy without external op-amps or complex compensation networks.
Availability
L6615D is available at Aetrix Electronics and suitable for web server power distribution, telecom rectifier shelves, and industrial PLC backplanes requiring stable component supply across long-lifecycle deployments.
Supply support for L6615D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, analog, and microcontroller solutions for industrial, automotive, and computing markets.
The L6615D belongs to ST's high-reliability power system controller product line, engineered specifically for fault-tolerant, high-density DC-DC current sharing in mission-critical infrastructure where thermal balance and redundancy integrity are non-negotiable.
FAQ
What is the maximum number of L6615D-equipped modules that can be paralleled in a single share bus?
The L6615D supports up to 20 paralleled modules (N = 20) in (N+1) redundant configurations, as verified in ST's application note AN2827. This limit arises from the master's share drive amplifier current capability (8 mA max) and the 45 μA per-slave loading on the share bus at 8 V full scale - exceeding this count risks insufficient drive margin and unstable current sharing.
Can the L6615D perform current sensing on both high-side and low-side simultaneously?
No - the L6615D automatically selects either high-side or low-side sensing based on the CS+ pin voltage relative to the 1.6 V internal threshold. When VCS+ > 1.6 V, high-side mode activates; otherwise, low-side mode engages. Both cannot operate concurrently, but the seamless switchover ensures continuous sensing across output voltage ranges from near-ground to 22 V.
How does the L6615D handle noise on the share bus in high-EMI environments?
The L6615D mitigates share bus noise through its 32 kΩ input impedance (reducing capacitive coupling), internal hysteresis in the share sense amplifier, and recommended 1 nF bypass capacitors from SH and CGA pins to GND. ST's layout guidelines specify twisted-pair routing and star grounding at the master SH node to suppress common-mode transients above 10 MHz.
Is external compensation required on the COMP pin, and what is its function?
Yes - an RC network (e.g., 10 kΩ + 100 pF) between COMP and GND is mandatory for loop stability. The COMP pin is the output of the transconductance error amplifier; its voltage controls the ADJ sink current. Without proper compensation, the current-sharing feedback loop exhibits phase margin loss and oscillation, especially under fast load transients or mismatched module delays.
L6615D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Applications:
- Power Supplies, Converters, Controllers
- Current - Supply:
- 5mA
- Voltage - Supply:
- 2.7V ~ 22V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
L6615D FAQ
1.How can I place an order for L6615D through Aetrix?
Please submit a Request for Quotation (RFQ) for L6615D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for L6615D reliable?
The price and inventory of L6615D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for L6615D is usually 5 days.
3.What payment methods are accepted for L6615D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for L6615D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for L6615D?
L6615D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your L6615D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for L6615D?
For technical support, including L6615D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your L6615D requirements.
6.How does Aetrix verify that L6615D is sourced from the original manufacturer or authorized distributors?
All L6615D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that L6615D meets industry standards.
7.What is the process for return or replacement of L6615D?
All L6615D units undergo pre-shipment inspection (PSI). If there is an issue with L6615D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The L6615D part is unused and in its original packaging.
Return procedure for L6615D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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