STMicroelectronics L6743Q

Overview

L6743Q from STMicroelectronics is a dual high-current N-channel MOSFET driver for synchronous buck converters, featuring integrated bootstrap diode, adaptive dead-time control, 5–12 V flexible gate-drive supply, preliminary OV protection, and HiZ shutdown mode. It drives high-side and low-side MOSFETs in CPU VRM/VRD and high-efficiency DC/DC applications up to 1 MHz switching frequency.

For engineers reviewing the L6743Q datasheet, L6743Q pinout, L6743Q application, or L6743Q equivalent, key selection criteria include bootstrap diode integration, adaptive dead-time response time (≤150 ns hold-off), HiZ management via EN/PWM logic, ±1.8 V PHASE-sensed OV threshold, and DFN10 3×3 mm thermal performance (R_thJA = 45 °C/W).

Technical Context

The L6743Q implements independent high-side (UGATE) and low-side (LGATE) drivers with internal bootstrap diode referenced to PHASE, enabling self-biased high-side operation without external diodes. Its adaptive dead-time logic monitors PHASE voltage transitions to dynamically adjust turn-on timing-activating LS when PHASE falls below ~1.8 V and HS when LGATE drops below ~1 V-minimizing body-diode conduction.

Preliminary OV protection activates only during HiZ state (post-UVLO, pre-PWM transition) and latches LS ON if PHASE exceeds 1.8 V, providing early overvoltage defense before PWM controller engagement. The device supports 5–12 V VCC supply, with separate 12 V-compatible PWM and EN inputs (2 V IH / 0.8 V IL thresholds) and internal 15 kΩ EN pull-down.

Key Specifications

Pinout & Package

Package: DFN10 3×3 mm with exposed thermal pad (connected to PGND). Pin count: 10. Thermal pad improves power dissipation (R_thJC = 5 °C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual high-side/low-side MOSFET driver applications.

Compared with IR2110PbF and LM5113MMX/NOPB, the L6743Q uniquely combines bootstrap diode integration, adaptive dead-time triggered by PHASE voltage, and Preliminary OV latching - making it optimal for space-constrained, high-efficiency CPU/GPU VRMs demanding startup safety and thermal density.

Availability

L6743Q is available at Aetrix Electronics and suitable for desktop CPU VRM, server VRD, and workstation DC/DC converter designs requiring stable component supply, long lifecycle support, and validated thermal performance in DFN10 packaging.

Supply support for L6743Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in power management, analog, microcontrollers, and automotive ICs with strong European manufacturing and AEC-Q100 qualification capabilities.

The L6743Q belongs to ST's high-current power driver product line, engineered specifically for synchronous buck VRM/VRD applications in computing infrastructure where integration, thermal density, and startup safety are critical design priorities.

FAQ

What is the function of the PHASE pin beyond high-side return path?

The PHASE pin serves three critical roles: (1) return path for the high-side driver, (2) input for adaptive dead-time control (triggering LS turn-on when voltage falls below ~1.8 V), and (3) sensing node for Preliminary OV protection (latching LS ON if voltage exceeds 1.8 V during HiZ). It must be connected directly to the high-side MOSFET source with minimal trace inductance.

Can L6743Q operate with a 5 V-only supply for both VCC and gate drive?

Yes - L6743Q supports 5 V to 12 V on VCC, and its gate drivers are fully functional at 5 V. At 5 V, LS source current remains ≥2.5 A (min), and HS source current is ≥1.5 A (min), sufficient for logic-level MOSFETs. However, 12 V VCC improves R_DS(on) utilization in high-current VRMs and extends safe operating area under transient loads.

How does the integrated bootstrap diode affect PCB layout versus discrete solutions?

The integrated bootstrap diode removes the need for an external Schottky diode and associated routing, reducing loop area and parasitic inductance. Layout must still place the BOOT–PHASE capacitor close to the IC with wide, low-inductance traces; adding a small series resistor (1–3 Ω) on BOOT is recommended to limit inrush current and suppress ringing during high-dV/dt transients.

Is the Preliminary OV protection active during normal PWM operation?

No - Preliminary OV protection is active only during the HiZ state, which occurs after VCC exceeds UVLO (4.1 V) but before the first valid PWM transition. Once PWM begins toggling, the protection is disabled and overvoltage handling is delegated to the upstream PWM controller. This ensures CPU protection during startup faults without interfering with closed-loop regulation.