STMicroelectronics L6743QTR

Overview

L6743QTR from STMicroelectronics is a dual high-current N-channel MOSFET driver for synchronous buck converters, featuring integrated bootstrap diode, adaptive dead-time management, 5–12 V flexible gate-drive voltage, and preliminary overvoltage (Pre-OV) protection triggered at 1.8 V on PHASE. It drives high-side and low-side MOSFETs in CPU VRM/VRD and high-efficiency DC/DC applications up to 1 MHz switching frequency.

For engineers reviewing the L6743QTR datasheet, L6743QTR pinout, L6743QTR application, or L6743QTR equivalent, key selection criteria include HiZ shutdown behavior, bootstrap diode integration, Pre-OV threshold accuracy, thermal resistance (R_thJA = 45 °C/W), and DFN10 3×3 mm package compatibility with high-density PCB layouts.

Technical Context

The L6743QTR implements adaptive dead-time control by monitoring PHASE voltage transitions: LS turn-on initiates when PHASE falls below ~2 V, and HS turn-on triggers when LGATE drops below ~1 V. A watchdog mechanism forces LS conduction during negative inductor current to maintain regulation.

Its HiZ state is entered either via EN pin low or PWM held within 0.8–2.0 V for >150 ns; exit requires a PWM transition below 0.8 V. Pre-OV protection activates only after UVLO (V_CC > 4.1 V) and during HiZ, latching LS ON if PHASE exceeds 1.8 V - independent of external PWM controller status.

Key Specifications

Pinout & Package

Package: DFN10 3×3 mm with exposed thermal pad (connected to PGND). Pin count: 10. Thermal pad improves junction-to-PCB heat transfer (R_thJC = 5 °C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual high-current MOSFET driver applications.

Compared with IR2110STRPBF and LM5113SDX/NOPB, the L6743QTR uniquely integrates bootstrap diode, adaptive dead-time, and Pre-OV protection - making it purpose-built for high-reliability CPU VRM/VRD where startup safety and thermal density are critical.

Availability

L6743QTR is available at Aetrix Electronics and suitable for desktop CPU VRM, server VRD, and industrial DC/DC converter designs requiring stable component supply, high thermal performance, and integrated protection features.

Supply support for L6743QTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in power management, analog, microcontrollers, and automotive ICs with strong European manufacturing and R&D infrastructure.

The L6743QTR belongs to ST's high-performance power driver product line, engineered specifically for high-current synchronous buck converters in computing and data center power applications where efficiency, thermal density, and fault resilience are paramount.

FAQ

What is the function of the PHASE pin beyond being the HS driver return path?

The PHASE pin serves three critical roles: (1) return path for the high-side driver, (2) input for adaptive dead-time control (triggering LS turn-on when voltage falls below ~2 V), and (3) sensing node for Preliminary OV protection (latching LS ON if voltage exceeds 1.8 V during HiZ). It must be connected directly to the high-side MOSFET source with minimal trace inductance.

How does the integrated bootstrap diode affect PCB layout compared to discrete solutions?

The integrated bootstrap diode eliminates the need for an external Schottky diode between BOOT and V_CC, reducing component count by one, saving ~1.5 mm² PCB area, and removing a potential failure point. Layout still requires a low-ESR bootstrap capacitor (BOOT–PHASE) and optional R_BOOT (few ohms) to limit overcharge during negative PHASE spikes.

Can the L6743QTR operate safely with a 5 V V_CC supply while driving 12 V gate voltages?

Yes - V_CC powers only the low-side driver and logic; the high-side driver uses the BOOT–PHASE bootstrap network to generate its floating supply. With 5 V V_CC, the LS gate drive is 5 V (suitable for logic-level MOSFETs), while HS drive voltage equals V_CC + V_BOOT–PHASE ≈ 12 V when properly biased - enabling mixed-voltage gate drive optimization.

What triggers the Preliminary OV protection, and how is it reset?

Preliminary OV protection triggers only when two conditions are met: (1) V_CC has exceeded UVLO (≥4.1 V), and (2) the device is in HiZ state (EN high but PWM held 0.8–2.0 V >150 ns). It latches the LS MOSFET ON if PHASE voltage rises above 1.8 V. The protection resets automatically upon the first valid PWM transition (e.g., falling edge below 0.8 V), returning control to the external PWM controller.