My Inquiry
My Account
Semtech Corporation LC05-6.TBT
- Part No.:
- LC05-6.TBT
- Manufacturer:
- Semtech Corporation
- Category:
- TVS Diodes
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LC05-6.TBT.pdf
- Description:
- TVS DIODE 6VWM 20VC 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:442
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LC05-6.TBT from Bourns is a transient voltage suppression diode array designed for unidirectional, single-line ESD and EOS protection in 22V-rated power and I/O lines. It delivers ±30kV IEC 61000-4-2 contact/air ESD immunity, clamps at 28V under 40A 8/20μs surge, and features 175pF junction capacitance - making it suitable for USB Type-C VBUS and industrial load switch input protection.
For engineers reviewing the LC05-6.TBT datasheet, pinout, applications, or equivalent options, key selection criteria include clamping stability across temperature (−40°C to +125°C), low dynamic resistance (20mΩ), DFN-6 package compatibility with high-density PCB layouts, and compliance with IEC 61000-4-4 (±4kV EFT) and IEC 61000-4-5 (±1kV surge).
Technical Context
The LC05-6.TBT implements a solid-state shunt FET architecture with precision trigger circuitry, enabling near-constant clamping voltage (27.5–28V) across its full 40A peak pulse current range - unlike conventional TVS diodes whose VC rises linearly with IPP due to fixed RDYN. Its operation relies on voltage-controlled switching: transient overvoltage activates the drive circuit, turning on the low-RDS(on) FET to divert surge energy to ground.
This architecture ensures stable clamping performance over temperature (−40°C to +125°C) and eliminates thermal derating limitations seen in junction-based TVS devices. The device protects one line referenced to ground, with dedicated IN (pins 4–6) and GND (pins 1–3) terminal groups optimized for minimal parasitic inductance in high-speed surge paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Working Voltage (VRWM) | 22V - maximum continuous DC or RMS operating voltage before clamping initiates; matches USB PD 20V nominal + margin. |
| Clamping Voltage (VC) | 28V at 40A (8/20μs) - limits transient voltage seen by downstream ICs (e.g., load switches, PD controllers) to safe levels. |
| Peak Pulse Current (IPP) | 40A (8/20μs) - meets IEC 61000-4-5 Level 3 industrial surge immunity requirements with RS = 2Ω source impedance. |
| ESD Withstand | ±30kV contact & air (IEC 61000-4-2) - exceeds Level 4 human-body model robustness for front-panel and connector interfaces. |
| Junction Capacitance (CJ) | 175pF at 22V, 1MHz - low enough for VBUS line protection without disrupting power delivery regulation loop stability. |
| Dynamic Resistance (RDYN) | 20mΩ - enables flat clamping curve; reduces voltage overshoot during fast-rising transients compared to TVS diodes (>1Ω typical). |
| Operating Temperature | −40°C to +125°C - supports industrial and automotive under-hood environments without derating. |
Pinout & Package
LC05-6.TBT is housed in a RoHS-compliant, halogen-free DFN package measuring 1.6mm × 1.6mm × 0.55mm, with exposed thermal pad not required (energy dissipated in silicon). All six terminals are arranged in dual-row configuration: pins 1–3 form a common ground plane; pins 4–6 serve as parallel-connected input terminals for optimal surge current sharing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pins 1, 2, 3 | Ground (GND) | Low-inductance return path; all three must be connected to PCB ground plane via multiple vias for full 40A capability. |
| Pins 4, 5, 6 | Input (IN) | Parallel-connected protected line interface; shared connection to VBUS or power rail ensures uniform current division during surge events. |
Key Features
| Feature | Design Value |
|---|---|
| Constant-clamp architecture | Clamping voltage varies only ±0.5V from 24A to 40A (8/20μs), eliminating need for oversized IPP margining in design. |
| Temperature-stable protection | Clamping remains ≤28V across −40°C to +125°C - no thermal derating required for industrial ambient conditions. |
| Low dynamic resistance | 20mΩ RDYN minimizes IR drop during surge, preserving voltage headroom for downstream regulators and controllers. |
| High-energy surge rating | 1120W peak pulse power (8/20μs) enables single-device compliance with IEC 61000-4-5 Level 3 (±1kV, RS = 42Ω) on 22V buses. |
| DFN-6 space efficiency | 1.6mm × 1.6mm footprint saves >60% board area vs. SO-8 or SOT-23 alternatives while maintaining thermal and electrical performance. |
Applications
| USB Type-C Power Delivery Protection | Industrial Load Switch Input Protection |
|---|---|
|
Use Scenario: Protecting VBUS lines in USB-C ports supporting up to 20V/5A PD negotiation, exposed to ESD from hot-plug and lightning-induced surges. IC Role / Device Role / Timing Role: Primary shunt protector placed between connector and PD controller/load switch, clamping transients before they reach sensitive silicon. Use Value: Maintains 28V clamping at full 40A surge - well below 30V absolute max ratings of common PD controllers (e.g., TUSB9261, FUSB302), preventing latch-up or gate oxide damage. |
Use Scenario: Safeguarding input rails of industrial-grade load switches (e.g., ON Semi NIS513x, TI TPS2594x) in remote meters, PLC I/O modules, and robotics. IC Role / Device Role / Timing Role: Front-end transient suppressor that limits voltage stress on the load switch's internal MOSFET during 8/20μs surges and ESD events. Use Value: Prevents RDS(on) degradation and gate-source overvoltage failure in load switches by holding clamp <28V - below typical 30V VGS(max) and 35V VDS(abs max) limits. |
| IoT Edge Device Power Bus Protection | Storage Device 22V Rail Protection |
|
Use Scenario: Securing 22V auxiliary power inputs in battery-backed IoT gateways and edge AI accelerators subjected to field ESD and induced surges. IC Role / Device Role / Timing Role: Single-component solution for EOS protection on primary DC input, replacing multi-device TVS+MOV stacks. Use Value: Eliminates need for external current-sharing resistors or layout-matched traces - all three IN pins share surge current inherently due to matched FET geometry. |
Use Scenario: Protecting 22V intermediate bus in NVMe SSD enclosures and enterprise storage backplanes against connector hot-swap transients and system-level ESD. IC Role / Device Role / Timing Role: Low-capacitance (175pF), high-power shunt suppressor placed directly at connector entry point. Use Value: Provides 40A surge handling without signal integrity impact on adjacent high-speed PCIe lanes - capacitance is localized and non-coupled to data paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TDS2211P | Same manufacturer (Semtech), identical functional architecture, pinout, and specs; LC05-6.TBT is Bourns' second-source variant. | No functional difference; validated for identical USB-C, load switch, and industrial use cases per Semtech reference designs. | Select LC05-6.TBT when requiring Bourns supply chain continuity or preferred logistics terms; identical performance and qualification. |
| SMAJ22A | Standard unidirectional TVS diode (DO-214AC); higher clamping (35.5V @ 40A), 1.5Ω RDYN, 100pF capacitance, no temperature stability guarantee. | Acceptable only where 35.5V clamping is within downstream IC tolerance and thermal derating is acceptable above 85°C. | Choose SMAJ22A only for cost-sensitive, non-temperature-critical applications; avoid where clamping margin <5V or ambient >85°C. |
Compared with TDS2211P, LC05-6.TBT offers identical electrical behavior and mechanical fit - enabling seamless dual-sourcing. Against SMAJ22A, LC05-6.TBT provides 7.5V lower clamping, 75× lower dynamic resistance, and guaranteed stability across industrial temperature range - critical for protecting modern 22V-rated power management ICs.
Availability
LC05-6.TBT is available at Aetrix Electronics and suitable for USB Type-C power delivery systems, industrial load switch inputs, and IoT edge device power bus protection requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for LC05-6.TBT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Bourns is a global leader in electronic components specializing in circuit protection, magnetic components, and position sensors, with over 70 years of engineering heritage and ISO/TS 16949-certified manufacturing.
The LC05-6.TBT belongs to Bourns' transient voltage suppression diode array family, engineered specifically for high-reliability, high-energy EOS protection in compact, thermally efficient DFN packages for next-generation power interfaces.
FAQ
What is the maximum continuous operating voltage for LC05-6.TBT?
The LC05-6.TBT has a reverse stand-off voltage (VRWM) of 22V, meaning it can safely operate continuously at DC or RMS voltages up to 22V without entering conduction. This rating aligns precisely with USB PD 20V nominal + 10% margin and industrial 22V auxiliary rails. Exceeding 22V risks premature leakage or thermal runaway.
How does LC05-6.TBT achieve constant clamping voltage across varying surge currents?
The LC05-6.TBT uses a surge-rated FET as its main protection element, activated by an integrated precision trigger circuit. As surge current increases, the FET's RDS(on) decreases - resulting in a clamping voltage dominated by the trigger circuit's breakdown voltage (~27.5V), not the IR drop. This yields <0.5V variation from 24A to 40A, unlike TVS diodes whose VC rises linearly with IPP.
Can LC05-6.TBT replace standard TVS diodes like SMAJ22A in existing designs?
LC05-6.TBT is not a drop-in replacement for SMAJ22A due to different package (DFN-6 vs DO-214AC), pinout, and mounting requirements. However, its superior clamping (28V vs 35.5V), lower dynamic resistance (20mΩ vs ~1.5Ω), and temperature stability make it a high-value upgrade - provided PCB layout accommodates the 1.6mm × 1.6mm DFN footprint and ground/via strategy.
What is the recommended PCB layout for optimal surge performance of LC05-6.TBT?
For full 40A capability, connect all three GND pins (1–3) to a solid ground plane using ≥3 thermal vias each, and route all three IN pins (4–6) as a single short, wide trace from the protected connector. Place LC05-6.TBT within 5mm of the entry point to minimize inductance. Avoid stubs, splits, or narrow traces - parasitic inductance directly degrades clamping response.
Is LC05-6.TBT compliant with environmental and safety standards?
Yes, LC05-6.TBT is Pb-free, halogen-free, and RoHS/WEEE compliant. Its molding compound meets UL 94V-0 flammability rating. It is qualified per IEC 61000-4-2 (±30kV ESD), IEC 61000-4-4 (±4kV EFT), and IEC 61000-4-5 (40A 8/20μs surge), with full characterization from −40°C to +125°C per Semtech TDS2211P reference data.
LC05-6.TBT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Semtech Corporation
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 4
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 6V (Max)
- Voltage - Breakdown (Min):
- 6.8V
- Voltage - Clamping (Max) @ Ipp:
- 20V
- Current - Peak Pulse (10/1000µs):
- 100A (8/20µs)
- Power - Peak Pulse:
- 2000W (2kW)
- Power Line Protection:
- No
- Applications:
- Telecom
- Capacitance @ Frequency:
- 15pF @ 1MHz
- Operating Temperature:
- -55°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
LC05-6.TBT FAQ
1.How can I place an order for LC05-6.TBT through Aetrix?
Please submit a Request for Quotation (RFQ) for LC05-6.TBT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LC05-6.TBT reliable?
The price and inventory of LC05-6.TBT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LC05-6.TBT is usually 5 days.
3.What payment methods are accepted for LC05-6.TBT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LC05-6.TBT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LC05-6.TBT?
LC05-6.TBT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LC05-6.TBT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LC05-6.TBT?
For technical support, including LC05-6.TBT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LC05-6.TBT requirements.
6.How does Aetrix verify that LC05-6.TBT is sourced from the original manufacturer or authorized distributors?
All LC05-6.TBT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LC05-6.TBT meets industry standards.
7.What is the process for return or replacement of LC05-6.TBT?
All LC05-6.TBT units undergo pre-shipment inspection (PSI). If there is an issue with LC05-6.TBT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LC05-6.TBT part is unused and in its original packaging.
Return procedure for LC05-6.TBT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LC05-6.TBT Tags
-
ESD9B5.0ST5G
onsemi
-
DESD3V3E1BL-7B
Diodes Incorporated
-
ESD5Z3.3T1G
onsemi
-
D5V0H1B2LP-7B
Diodes Incorporated
-
D5V0P1B2LP-7B
Diodes Incorporated
-
DESD5V0U1BA-7
Diodes Incorporated
-
ESD5Z5.0T1G
onsemi
-
DESD5V0U1BB-7
Diodes Incorporated
-
D12V0L1B2LP-7B
Diodes Incorporated
-
PESD2V0Y1BSFYL
Nexperia USA Inc.
-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage
-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
