Texas Instruments LM5070SD-50/NOPB
- Part No.:
- LM5070SD-50/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 16-WFDFN Exposed Pad
- Datasheet:
-
LM5070SD-50/NOPB.pdf
- Description:
- IC POE CNTRL 1 CHANNEL 16WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM5070SD-50/NOPB from Texas Instruments is an IEEE 802.3af-compliant Powered Device (PD) interface and current-mode PWM controller with integrated 80V/400mA MOSFET, 50% maximum duty cycle limit, and programmable inrush current limiting for PoE-powered endpoints. It supports flyback and forward DC-DC topologies in IP phones, wireless access points, and VoIP terminals.
For engineers reviewing the LM5070SD-50/NOPB datasheet, LM5070SD-50/NOPB pinout, LM5070SD-50/NOPB application, or LM5070SD-50/NOPB equivalent, key selection criteria include IEEE 802.3af signature/classification compliance, internal MOSFET RDS(ON) of 2.2 Ω, 50% duty cycle hard limit (no slope compensation), UVLO programmability, and thermal shutdown at 165°C.
Technical Context
The LM5070SD-50/NOPB integrates a PoE PD interface (signature detection, classification, inrush control, UVLO) and a current-mode PWM controller with error amplifier, soft-start, and oscillator sync capability. Its 50% max duty cycle is implemented via internal divide-by-two oscillator architecture - distinct from the -80 variant's 80% limit with slope compensation.
It operates across VIN = 1.8V–75V, features a 7.8V VCC regulator with 6.25V falling UVLO, and delivers 800mA peak gate drive on OUT. The CS pin provides cycle-by-cycle current limiting at 0.5V threshold with 55ns leading-edge blanking, while FB accepts 1.25V reference-based feedback for non-isolated designs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| IEEE Compliance | Fully compliant with IEEE 802.3af Powered Device interface requirements including detection, classification, and inrush control. |
| Max Duty Cycle | 50% hard limit with no slope compensation - enables stable operation in flyback converters without external compensation. |
| Internal MOSFET | 80V breakdown, 2.2 Ω RDS(ON) at 350mA - eliminates need for external high-voltage switch in PoE input stage. |
| Inrush Current Limit | Programmable from 75mA to 390mA via RCLP resistor - ensures <75ms capacitor charging per IEEE 802.3af. |
| Oscillator Frequency | 175–225 kHz (RT = 30.3kΩ) - fixed by external resistor; internal divide-by-two yields precise 50% duty cycle. |
| Thermal Shutdown | 165°C junction temperature with 25°C hysteresis - protects against sustained overload or poor heatsinking in enclosed PoE devices. |
| UVLO Threshold | Programmable rising/falling thresholds (2.00V reference + 10µA hysteresis current) - enables custom brownout behavior and remote enable/disable. |
Pinout & Package
TSSOP-16 package (Package Code PW), thermally enhanced with exposed pad bonded to VEE for low θJA = 125°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | High-side input | Accepts diode-OR'd PoE line voltage up to 75V; powers internal startup regulator and MOSFET source. |
| RSIG | Signature resistor node | Connects 25kΩ resistor to VIN for 23.75–26.25kΩ detection impedance required by PSE. |
| RCLASS | Classification current sink | Sinks programmable current (0–44mA) to set IEEE 802.3af Class 0–4 via external resistor to VEE. |
| UVLO | UVLO sense input | 2.00V threshold pin; external resistor divider sets turn-on/off voltages with 10µA hysteresis current source. |
| RCLP | Inrush current programming | Resistor value sets initial charge current (75–390mA); open = 390mA default. |
| VEE | System low potential | Diode-OR'd return path for PoE lines; internally connected to MOSFET source and EP pad. |
| RTN | SMPS return | Drain connection of internal MOSFET; serves as power return for DC-DC converter output stage. |
| OUT | PWM gate driver | 800mA peak sink capability drives external N-channel MOSFET gate in flyback/forward topologies. |
| VCC | Bias supply output | 7.8V regulated output (±0.3V) powers internal circuitry; shuts down if auxiliary winding raises voltage >8.1V. |
| FB | Error amp inverting input | 1.25V reference-based feedback node; used directly in non-isolated designs or optocoupler-coupled in isolated ones. |
| CS | Current sense input | 0.5V overcurrent threshold with 55ns blanking - enables cycle-by-cycle protection without noise false triggers. |
| RT/SYNC | Oscillator timing | External RT resistor sets frequency; accepts narrow AC-coupled sync pulses >3.7V for system-level clock alignment. |
| SS | Soft-start ramp | 10µA current source charges external capacitor - controls PWM ramp-up rate to limit output overshoot. |
| ARTN | Analog ground reference | Dedicated analog return for CS, COMP, FB, and RT - isolates sensitive nodes from noisy power return (RTN). |
| EP | Exposed thermal pad | Internally bonded to die substrate; must be soldered to VEE plane for thermal performance and EMI reduction. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated PoE PD interface | Eliminates discrete detection/classification circuitry - reduces BOM count and layout area for IEEE 802.3af compliance. |
| 50% max duty cycle architecture | Guarantees stable operation in flyback converters without slope compensation components or tuning effort. |
| Programmable inrush current | Enables safe startup into large bulk capacitors while meeting IEEE 802.3af 75ms charge time requirement. |
| Thermal shutdown with hysteresis | Prevents latch-up during transient overloads; 25°C hysteresis ensures reliable recovery after cooling. |
| Current-mode PWM control | Provides inherent line feed-forward, simplified loop compensation, and precise cycle-by-cycle current limiting. |
Applications
| IP Phones | Wireless Access Points |
|---|---|
Use Scenario: Power delivery to VoIP handsets over CAT5e cabling in enterprise offices. IC Role / Device Role / Timing Role: LM5070SD-50/NOPB acts as primary PoE interface and DC-DC controller, managing signature detection, classification, and flyback conversion. Use Value: Enables single-chip PoE compliance with 50% duty cycle optimized for low-noise, low-EMI operation in audio-sensitive environments. | Use Scenario: Midspan or endspan-powered 802.11n/ac access points deployed in ceilings or walls. IC Role / Device Role / Timing Role: LM5070SD-50/NOPB handles full PoE handshake and regulates 12V/24V output from 48V PoE input using flyback topology. Use Value: Internal 80V MOSFET and programmable UVLO allow robust operation under varying PSE conditions and cable drop. |
| VoIP Gateways | Network Cameras |
Use Scenario: Centralized voice gateway connecting multiple analog phones to SIP infrastructure. IC Role / Device Role / Timing Role: LM5070SD-50/NOPB provides PoE interface and generates isolated 5V/3.3V rails via forward converter. Use Value: 50% duty cycle limit simplifies transformer design and improves efficiency in multi-output isolated supplies. | Use Scenario: Outdoor PTZ cameras powered remotely over Ethernet with surge immunity requirements. IC Role / Device Role / Timing Role: LM5070SD-50/NOPB manages PoE classification and drives high-current flyback for 12V motor and 5V sensor rails. Use Value: Programmable RCLP resistor allows reduced inrush current to prevent PSE tripping during cold start in long cable runs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Powered Device interface applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5070SD-80/NOPB | 80% max duty cycle with slope compensation; same pinout and PoE interface functionality. | Required for >50% duty cycle flyback or forward converters needing slope compensation. | Select when higher duty cycle or slope-compensated current-mode control is needed; not drop-in for -50 designs. |
| LT4275IMS#PBF | Linear Technology (now ADI) IEEE 802.3af PD interface only - no integrated PWM controller. | Requires external DC-DC controller; offers higher accuracy classification and better ESD robustness. | Choose when modular design separates PoE interface from SMPS control, or when higher precision classification is critical. |
Compared with LM5070SD-80/NOPB, the LM5070SD-50/NOPB trades duty cycle flexibility for simpler flyback design; versus LT4275IMS#PBF, it integrates power conversion but lacks advanced fault logging and I²C configurability.
Availability
LM5070SD-50/NOPB is available at Aetrix Electronics and suitable for IP phones, wireless access points, VoIP gateways, and network cameras requiring stable component supply in PoE-powered embedded systems.
Supply support for LM5070SD-50/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions for industrial, automotive, and communications markets.
The LM5070 product line delivers integrated Power over Ethernet Powered Device interfaces with embedded PWM controllers, designed specifically for space-constrained, cost-sensitive PoE endpoints requiring full IEEE 802.3af compliance.
FAQ
What is the key functional difference between LM5070SD-50/NOPB and LM5070SD-80/NOPB?
The LM5070SD-50/NOPB implements a 50% maximum duty cycle limit using an internal oscillator divide-by-two architecture and omits slope compensation. In contrast, the LM5070SD-80/NOPB supports up to 80% duty cycle with built-in slope compensation for current-mode stability above 50%. Both share identical PoE interface functionality, pinout, and package - but the -50 variant is optimized for simpler flyback designs where 50% duty cycle suffices.
Does LM5070SD-50/NOPB support isolated DC-DC topologies?
Yes, LM5070SD-50/NOPB supports both isolated and non-isolated applications. For isolated topologies like flyback or forward converters, the internal error amplifier can be disabled by connecting FB to ARTN, and feedback is typically implemented via optocoupler from the secondary side. The COMP pin includes an internal 5kΩ pull-up to a 5V reference, facilitating direct optocoupler transistor biasing without external components.
How is inrush current programmed on LM5070SD-50/NOPB?
Inrush current on LM5070SD-50/NOPB is programmed using an external resistor connected to the RCLP pin. The device supports a range of 75mA to 390mA; leaving RCLP open defaults to ~390mA. The exact current is determined by the resistor value per the transfer function in the datasheet - enabling precise control to meet IEEE 802.3af's 75ms input capacitor charge requirement while avoiding PSE current-limit tripping.
What is the role of the ARTN pin on LM5070SD-50/NOPB?
The ARTN pin on LM5070SD-50/NOPB serves as the dedicated analog ground return for sensitive circuitry including the current sense amplifier (CS), error amplifier (FB/COMP), and oscillator (RT). It is electrically separate from the power return (RTN) to minimize noise coupling. Proper PCB layout requires routing all ARTN-connected signals to a clean local analog ground plane, with a single-point connection to the main system ground to preserve signal integrity and current-sense accuracy.
Can LM5070SD-50/NOPB operate without an auxiliary winding for VCC?
Yes, LM5070SD-50/NOPB can operate without an auxiliary winding: its internal high-voltage startup regulator powers VCC directly from VIN (up to 75V). However, relying solely on this regulator limits continuous output power due to thermal constraints - the 15mA VCC current limit and 7.8V regulation cause significant dissipation at high input voltages. An auxiliary winding is strongly recommended for production designs to improve efficiency, reduce thermal stress, and extend reliability.
LM5070SD-50/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Controller (PD), DC/DC
- Number of Channels:
- 1
- Power - Max:
- -
- Internal Switch(s):
- Both
- Auxiliary Sense:
- No
- Standards:
- 802.3af (PoE)
- Voltage - Supply:
- 1.8V ~ 75V
- Current - Supply:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-WSON (5x5)
LM5070SD-50/NOPB FAQ
1.How can I place an order for LM5070SD-50/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5070SD-50/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5070SD-50/NOPB reliable?
The price and inventory of LM5070SD-50/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5070SD-50/NOPB is usually 5 days.
3.What payment methods are accepted for LM5070SD-50/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM5070SD-50/NOPB transactions.
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4.How is shipping managed for LM5070SD-50/NOPB?
LM5070SD-50/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM5070SD-50/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5070SD-50/NOPB?
For technical support, including LM5070SD-50/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5070SD-50/NOPB requirements.
6.How does Aetrix verify that LM5070SD-50/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5070SD-50/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5070SD-50/NOPB meets industry standards.
7.What is the process for return or replacement of LM5070SD-50/NOPB?
All LM5070SD-50/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5070SD-50/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5070SD-50/NOPB part is unused and in its original packaging.
Return procedure for LM5070SD-50/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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