Texas Instruments LM5070SDX-50/NOPB
- Part No.:
- LM5070SDX-50/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 16-WFDFN Exposed Pad
- Datasheet:
-
LM5070SDX-50/NOPB.pdf
- Description:
- IC POE CNTRL 1 CHANNEL 16WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM5070SDX-50/NOPB from Texas Instruments is an IEEE 802.3af-compliant Power over Ethernet (PoE) Powered Device (PD) interface and current-mode PWM controller with integrated 80V/400mA MOSFET, 50% maximum duty cycle limit (no slope compensation), −40°C to +125°C operating junction temperature, and TSSOP-16 package. It enables single-output flyback or forward DC-DC converters in PoE-powered IP phones, wireless access points, and network cameras.
For engineers reviewing the LM5070SDX-50/NOPB datasheet, LM5070SDX-50/NOPB pinout, LM5070SDX-50/NOPB application, or LM5070SDX-50/NOPB equivalent, key selection criteria include IEEE 802.3af signature/classification compliance, programmable inrush current limit (75–390 mA), UVLO hysteresis control, internal high-voltage startup regulator (7.8 V), and thermal shutdown at 165°C.
Technical Context
The LM5070SDX-50/NOPB integrates a PoE PD interface with detection (1.8–10 V), classification (12.5–20.5 V), and inrush current limiting, plus a current-mode PWM controller featuring cycle-by-cycle current sensing (0.5 V threshold), soft-start (10 µA current source), and oscillator frequency set by RT resistor (175–225 kHz typical). Its 50% max duty cycle architecture eliminates slope compensation, simplifying design for non-isolated topologies.
It operates across 1.8–75 V input, uses internal 80V MOSFET for power sequencing, and delivers 800 mA peak gate drive on OUT. The device implements automatic power-good sequencing: RTN voltage drop below 1.5 V relative to VEE enables VCC regulation, which then triggers soft-start and SMPS enable-ensuring strict IEEE 802.3af timing compliance during capacitor charging.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| IEEE Compliance | Fully compliant with IEEE 802.3af PD interface requirements including signature (25 kΩ), classification (Class 0–4), and inrush current ramp. |
| Max Duty Cycle | 50% - fixed limit without slope compensation; ensures stable operation in flyback/forward converters without external compensation. |
| Inrush Current Limit | Programmable 75–390 mA via RCLP resistor; default 390 mA when pin open; meets 75 ms capacitor charge requirement per spec. |
| Internal MOSFET | 80 V, 1 Ω RDS(on), 400 mA rated - handles full PoE input interface switching and inrush control without external FET. |
| Oscillator Frequency | 175–225 kHz (RT = 30.3 kΩ); internally divided by two for 50% duty cycle generation - enables precise timing control with single resistor. |
| UVLO Threshold | 2.00 V ±50 mV at UVLO pin; hysteresis set by 10 µA switched current source - allows robust line undervoltage detection with external divider. |
| Thermal Shutdown | 165°C with 25°C hysteresis - protects against sustained overload or poor heatsinking in enclosed PoE endpoints. |
Pinout & Package
TSSOP-16 package (Package Number PW), thermally enhanced with exposed pad bonded to VEE; 0.65 mm pitch, 5.0 mm × 4.4 mm body size.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | High-side input | Accepts PoE line voltage up to 75 V; diode-OR'd input for polarity-insensitive RJ45 connection. |
| RSIG | Signature resistor node | Connects 25 kΩ resistor to VIN for IEEE 802.3af detection; disabled above 11 V to reduce dissipation. |
| RCLASS | Classification current sink | Sinks programmable current (0–44 mA) to set IEEE Class 0–4; 1.5 V reference enables resistor-based programming. |
| UVLO | Undervoltage lockout sense | 2.00 V threshold pin; external resistor divider sets turn-on/off voltages; hysteresis prevents oscillation near threshold. |
| RCLP | Inrush current limit programming | Resistor value sets initial charging current (75–390 mA); open-circuit defaults to 390 mA. |
| VEE | System low potential return | Common return for RJ45 barrel rectifier, internal MOSFET source, and analog ground; connects to exposed pad. |
| RTN | SMPS power return | Drain of internal MOSFET; connects to DC-DC converter return path; used for power-good detection (1.5 V threshold). |
| OUT | PWM gate driver output | 800 mA peak sink capability drives external N-channel MOSFET gate; cycle-by-cycle current limiting active. |
| VCC | Internal bias regulator output | 7.8 V regulated supply; powers internal circuitry; UVLO (6.25 V falling) disables controller if auxiliary winding fails. |
| FB | Error amplifier inverting input | 1.25 V reference-based feedback node; supports both isolated (optocoupler) and non-isolated (resistor divider) regulation. |
| COMP | Error amplifier output | Open-drain output with 5 kΩ internal pull-up; interfaces directly to optocoupler LED or compensation network. |
| CS | Current sense input | 0.5 V overcurrent threshold; 55 ns leading-edge blanking; dedicated comparator enables fast cycle-by-cycle protection. |
| RT / SYNC | Oscillator timing & sync input | Resistor sets frequency; accepts narrow AC-coupled sync pulses >3.7 V; internal 2 V clamp maintains stability. |
| SS | Soft-start ramp input | 10 µA current charges external capacitor; controls PWM ramp rate to limit inrush into output stage. |
| ARTN | Analog ground reference | Separate return for sensitive analog circuits (error amp, CS, RT); minimizes noise coupling from power paths. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated PoE PD interface | Eliminates need for discrete detection/classification circuitry; reduces BOM count and layout area in space-constrained endpoints. |
| 50% max duty cycle (−50 suffix) | Removes requirement for slope compensation network - simplifies loop design and improves reliability in flyback converters. |
| Programmable inrush current limit | Enables compatibility with legacy PSEs delivering <15 W; avoids tripping PSE current limits during startup. |
| Internal 80 V, 400 mA MOSFET | Handles full PoE interface switching and inrush control; removes external high-voltage switch and associated gate drive complexity. |
| Thermal shutdown with hysteresis | Prevents latch-up during overload; 25°C hysteresis ensures clean recovery after fault clearance without cycling. |
| Dual UVLO with programmable hysteresis | Supports remote enable/disable via UVLO pin; hysteresis prevents chatter during brown-out conditions. |
Applications
| IP Phones | Wireless Access Points |
|---|---|
|
Use Scenario: Powered via Category 5/6 Ethernet cable in enterprise VoIP deployments with centralized PoE switches. IC Role / Device Role / Timing Role: PD interface controller managing signature, classification, and inrush; PWM controller regulating 3.3 V/5 V rails for baseband and RF sections. Use Value: Enables single-chip PoE compliance and efficient 75 V tolerant DC-DC conversion, reducing bill-of-materials and board area versus discrete solutions. |
Use Scenario: Indoor/outdoor Wi-Fi 5/6 APs deployed in ceiling-mounted enclosures with limited airflow and thermal mass. IC Role / Device Role / Timing Role: Controls PoE handshaking and provides current-mode PWM drive for isolated flyback supplying 12 V for RF power amplifiers and 3.3 V for SoC. Use Value: Integrated thermal shutdown (165°C) and 50% duty cycle limit prevent instability under high ambient temperatures and variable load conditions. |
| Network Cameras | VoIP Door Stations |
|
Use Scenario: Outdoor PTZ cameras requiring PoE+ compatibility, wide temperature operation, and surge immunity. IC Role / Device Role / Timing Role: Manages IEEE 802.3af classification and provides gate drive for synchronous forward converter powering image sensor, ISP, and IR LEDs. Use Value: Programmable RCLP resistor allows tuning inrush current to avoid PSE trip during cold-start capacitor charging in sub-zero environments. |
Use Scenario: Two-way audio/video intercoms mounted at building entrances with exposure to ESD and lightning-induced transients. IC Role / Device Role / Timing Role: Performs PoE detection/classification and regulates 5 V rail for audio codec, video encoder, and door lock solenoid driver. Use Value: Internal 80 V MOSFET withstands 100 V transients per IEC 61000-4-5; UVLO hysteresis prevents false shutdown during line dips. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PoE PD interface and PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5070SDX-80/NOPB | 80% max duty cycle with slope compensation; same pinout and core functionality. | Required for >50% duty cycle topologies (e.g., active-clamp forward); not suitable for standard flyback without redesign. | Select only if topology demands >50% duty cycle; otherwise LM5070SDX-50/NOPB offers simpler compensation. |
| LT4275IMS#TRPBF | IEEE 802.3at (PoE+) compliant; higher 30 W power handling; no integrated PWM controller. | Requires external DC-DC controller; supports higher-power endpoints like PTZ cameras with heaters or pan/tilt motors. | Choose when upgrading to PoE+ or needing >15.4 W; LM5070SDX-50/NOPB remains optimal for cost-sensitive 802.3af designs. |
Compared with LM5070SDX-80/NOPB, the LM5070SDX-50/NOPB eliminates slope compensation complexity for flyback use; versus LT4275, it integrates PWM control but lacks PoE+ classification-making it ideal for compact, single-chip 802.3af endpoints where cost and board space are critical.
Availability
LM5070SDX-50/NOPB is available at Aetrix Electronics and suitable for IP phones, wireless access points, network cameras, and VoIP door stations requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for LM5070SDX-50/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with over 50 years of innovation in power management ICs.
The LM5070 product line delivers integrated PoE PD interface and DC-DC controller solutions targeting space-constrained, cost-sensitive Ethernet-powered endpoints such as VoIP phones and surveillance cameras.
FAQ
What is the maximum input voltage rating for the LM5070SDX-50/NOPB?
The LM5070SDX-50/NOPB supports a VIN voltage range of 1.8 V to 75 V, with absolute maximum rating of 80 V for VIN to VEE. This 75 V operational limit ensures reliable operation across the full IEEE 802.3af PoE voltage envelope (up to 57 V nominal, with transient tolerance), and the device includes built-in protection against overvoltage stress on internal circuitry.
Does the LM5070SDX-50/NOPB require an external MOSFET for PoE interface operation?
No, the LM5070SDX-50/NOPB integrates an 80 V, 400 mA internal MOSFET with 1 Ω RDS(on), eliminating the need for an external switch in the PoE interface path. This MOSFET handles signature resistor enable/disable, classification current sinking, and controlled inrush current limiting - enabling fully integrated PD interface functionality without discrete high-voltage components.
How does the LM5070SDX-50/NOPB implement IEEE 802.3af classification?
The LM5070SDX-50/NOPB implements IEEE 802.3af classification by sinking a programmable current (0–44 mA) from the RCLASS pin to VEE, using an internal 1.5 V reference. External resistor values (e.g., open for Class 0, 82.5 Ω for Class 2) set the classification current per Table 2 in the datasheet. Classification activates between 12.5 V and 20.5 V input and times out within 75 ms as required by the standard.
Can the LM5070SDX-50/NOPB be used in isolated DC-DC converter topologies?
Yes, the LM5070SDX-50/NOPB supports both isolated and non-isolated applications. For isolated topologies (e.g., flyback), the COMP pin provides an open-drain error amplifier output compatible with optocoupler feedback, while FB serves as the inverting input referenced to a 1.25 V internal bandgap. The internal error amplifier can be disabled by connecting FB to ARTN when secondary-side regulation is preferred.
What is the purpose of the ARTN pin on the LM5070SDX-50/NOPB?
The ARTN pin on the LM5070SDX-50/NOPB serves as the dedicated analog ground return for precision circuitry including the error amplifier, current sense amplifier, and oscillator. Separating ARTN from the high-current RTN path minimizes noise coupling into sensitive analog nodes - improving regulation accuracy, current-sense stability, and PWM timing integrity in noisy PoE environments.
LM5070SDX-50/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Type:
- Controller (PD), DC/DC
- Number of Channels:
- 1
- Power - Max:
- -
- Internal Switch(s):
- Both
- Auxiliary Sense:
- No
- Standards:
- 802.3af (PoE)
- Voltage - Supply:
- 1.8V ~ 75V
- Current - Supply:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-WSON (5x5)
LM5070SDX-50/NOPB FAQ
1.How can I place an order for LM5070SDX-50/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5070SDX-50/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5070SDX-50/NOPB reliable?
The price and inventory of LM5070SDX-50/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5070SDX-50/NOPB is usually 5 days.
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Once your LM5070SDX-50/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5070SDX-50/NOPB?
For technical support, including LM5070SDX-50/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5070SDX-50/NOPB requirements.
6.How does Aetrix verify that LM5070SDX-50/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5070SDX-50/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5070SDX-50/NOPB meets industry standards.
7.What is the process for return or replacement of LM5070SDX-50/NOPB?
All LM5070SDX-50/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5070SDX-50/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5070SDX-50/NOPB part is unused and in its original packaging.
Return procedure for LM5070SDX-50/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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