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Texas Instruments LM5072MH-50
- Part No.:
- LM5072MH-50
- Manufacturer:
- Texas Instruments
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
LM5072MH-50.pdf
- Description:
- IC POE CNTRL 1 CHANNEL 16HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,512
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Product details
Overview
LM5072MH-50 from Texas Instruments is a fully IEEE 802.3af-compliant Powered Device (PD) interface and current-mode PWM controller with integrated 100V hot-swap MOSFET, programmable DC current limit up to 800 mA, 50% maximum duty cycle, and auxiliary power support for PoE-powered IP phones, wireless access points, and network cameras.
For engineers reviewing the LM5072MH-50 datasheet, LM5072MH-50 pinout, LM5072MH-50 application, or LM5072MH-50 equivalent, this device delivers PoE interface compliance, auxiliary power dominance control, thermal shutdown protection, and flyback/forward/buck converter compatibility in a TSSOP-16 EP package - critical for robust Ethernet-powered system design.
Technical Context
The LM5072MH-50 implements peak-current-mode PWM control with inherent line feed-forward, cycle-by-cycle current limiting, and simplified loop compensation. Its dedicated PD interface integrates signature resistor (24.5 kΩ), classification circuitry, UVLO (38 V release / 31 V lockout), and programmable inrush/DC current limits.
This -50 variant enforces a hard 50% maximum duty cycle without internal slope compensation, distinguishing it from the -80 version. It supports dual auxiliary power inputs (front via ICL_FAUX, rear via RAUX), enabling PoE-bypass operation and priority-based power sourcing in mixed-supply systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| IEEE Compliance | Fully compliant with IEEE 802.3af PD interface requirements including detection, classification, and inrush control. |
| Max Input Voltage | 100 V - enables use of lower-cost transient voltage suppressors and accommodates worst-case PoE cable drop + surge margin. |
| Hot Swap MOSFET | Integrated 100 V, 0.7 Ω RDS(ON) - eliminates external high-voltage switch and reduces BOM count. |
| Duty Cycle Limit | 50% maximum - constrains transformer reset time and prevents core saturation in flyback designs without slope compensation. |
| DC Current Limit | Programmable 150–800 mA via DCCL pin - supports higher-power PoE applications beyond Class 3 (e.g., dual-band Wi-Fi APs). |
| Auxiliary Power Support | Front (ICL_FAUX) and rear (RAUX) auxiliary enable pins - allows AC adapter or solar input to dominate over PoE when required. |
| Startup Regulator | 100 V start-up bias regulator powers internal circuitry before VCC stabilization - ensures reliable cold-start under low-PoE-voltage conditions. |
Pinout & Package
TSSOP-16 EP (Exposed Pad); RoHS-compliant, thermally enhanced package with 40 °C/W junction-to-ambient thermal resistance. Exposed pad must be connected to VEE plane for optimal heat dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 RT | Oscillator frequency programming | Resistor sets switching frequency between 50–500 kHz; determines transformer size and EMI profile. |
| 2 SS | Soft-start timing | Capacitor controls ramp-up of gate drive to prevent output overshoot and inrush stress on downstream components. |
| 3 VIN | PoE positive input | Accepts 9–70 V PoE input; rated to 100 V absolute max - withstands transients without external clamping. |
| 4 RCLASS | PD classification current setting | Single resistor selects IEEE 802.3af Class 0–4; open = Class 0 (12.95 W at PD input). |
| 5 ICL_FAUX | Front auxiliary enable / inrush limit | Enables front auxiliary source and programs inrush current (150–400 mA) during capacitor charge. |
| 6 DCCL | DC current limit programming | Resistor sets steady-state input current limit (150–800 mA) - critical for thermal management and cable loss budgeting. |
| 7 VEE | PoE negative return | Common return for PoE and front auxiliary; connects to diode bridge cathodes and exposed pad ground. |
| 8 RTN | PWM power return | Drain reference for hot-swap MOSFET; must tie externally to ARTN at single-point ground to minimize noise coupling. |
| 9 OUT | Gate driver output | 800 mA peak sink/source drives external N-channel MOSFET directly - eliminates need for driver IC in most topologies. |
| 10 VCC | Bias supply output | 7.7 V regulated output powers internal logic; supplies external optocoupler or feedback circuitry in isolated converters. |
| 11 nPGOOD | Power Good indicator | Active-low open-drain signal confirms full capacitor charge and stable PoE interface - used for system enable sequencing. |
| 12 CS | Current sense input | Monitors primary-side current for cycle-by-cycle limiting; referenced to RTN, accepts 0.5 V threshold with 65 ns blanking. |
| 13 RAUX | Rear auxiliary enable | Configures rear auxiliary source dominance; thresholds at 2.5 V (low) and 6.0 V (high) - enables seamless PoE-to-adapter switchover. |
| 14 FB | Voltage feedback input | Inverting input of error amplifier; connects to optocoupler LED in isolated designs or divider in non-isolated buck/flyback. |
| 15 COMP | Error amplifier output | Drives PWM comparator; interfaces with secondary-side error amp via optocoupler in isolated configurations. |
| 16 ARTN | Analog reference ground | Reference for FB, COMP, CS, RT, SS - must short to RTN at single point to avoid ground loops and improve noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated PD signature resistor | 24.5 kΩ ±5% - eliminates external component, guarantees IEEE 802.3af detection compliance without calibration. |
| Programmable UVLO | 38 V release / 31 V lockout with 7 V hysteresis - ensures reliable startup at minimum PoE voltage (42 V) and graceful shutdown before brownout. |
| Thermal shutdown protection | 165 °C trip with 25 °C hysteresis - prevents damage during overload or poor heatsinking; disables PD interface and PWM simultaneously. |
| 100 V start-up regulator | Self-powered from VIN - enables operation down to 9 V auxiliary input and eliminates need for external bias winding or Zener clamp. |
| Front/rear auxiliary priority control | Independent enable pins (ICL_FAUX, RAUX) with defined voltage thresholds - allows deterministic power-source arbitration without firmware. |
Applications
| IP Telephony Endpoint | Enterprise Wireless Access Point |
|---|---|
Use Scenario: Desktop VoIP phone powered exclusively via Cat5e Ethernet cabling in office environments with centralized PoE switches. IC Role / Device Role: Primary PD interface and flyback controller managing 12 V/1 A output with PoE classification (Class 2) and thermal derating at 55 °C ambient. Use Value: Eliminates wall adapter, reduces installation cost, and ensures interoperability with IEEE 802.3af PSEs using integrated signature and classification. |
Use Scenario: Dual-band 802.11ac access point deployed in ceiling-mounted enclosures with limited airflow and variable PoE availability. IC Role / Device Role: High-efficiency PoE PD with 50% duty cycle constraint enabling compact transformer design and auxiliary AC adapter fallback during PoE maintenance. Use Value: Sustains operation during PoE outages via RAUX-enabled rear auxiliary input, while programmable 800 mA DC limit supports 2×2 MIMO RF stages. |
| Networked Security Camera | Industrial IoT Gateway |
Use Scenario: Outdoor PTZ camera with heater and IR illuminator requiring >10 W PoE power and auxiliary 24 V DC backup. IC Role / Device Role: PoE PD interface with front auxiliary (ICL_FAUX) enabled for 24 V adapter dominance, supporting 15 W load with thermal monitoring. Use Value: Maintains video streaming during PoE failure by automatically switching to auxiliary source without system reboot or configuration change. |
Use Scenario: DIN-rail mounted edge gateway aggregating Modbus and CAN sensors in factory settings with intermittent PoE infrastructure. IC Role / Device Role: Robust PD controller operating across –40 °C to +85 °C with 100 V input rating tolerating industrial transients and long-cable voltage drop. Use Value: Survives 100 V surges per IEC 61000-4-5; integrated UVLO and thermal shutdown ensure continuous uptime in unattended deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PoE PD interface and PWM controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5072MH-80 | 80% max duty cycle with internal slope compensation; no soft-start delay limitation. | Better suited for flyback designs requiring >50% duty cycle; not drop-in compatible due to different slope compensation architecture. | Select LM5072MH-80 only when transformer reset constraints require >50% duty cycle and slope compensation is needed. |
| LT4275AIMSE#PBF | IEEE 802.3at (PoE+) compliant; supports up to 30 W; separate PD interface + external PWM controller required. | Enables higher-power applications but increases BOM count and layout complexity versus integrated LM5072MH-50 solution. | Choose LT4275AIMSE#PBF when upgrading to PoE+ power levels or requiring multi-PSE negotiation features not present in LM5072MH-50. |
Compared with LM5072MH-80 and LT4275AIMSE#PBF, the LM5072MH-50 offers lowest component count for 802.3af-compliant designs with strict duty-cycle limits, while providing integrated auxiliary arbitration and thermal protection - making it optimal for cost-sensitive, space-constrained PoE endpoints.
Availability
LM5072MH-50 is available at Aetrix Electronics and suitable for IP telephony endpoints, wireless access points, networked security cameras, and industrial IoT gateways requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for LM5072MH-50 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in power management, signal chain, and connectivity technologies since 1930.
The LM5072 product line targets IEEE 802.3af PoE-powered devices requiring integrated PD interface, robust thermal management, and flexible auxiliary power integration - designed specifically for networked endpoints where reliability and BOM reduction are critical.
FAQ
What is the maximum duty cycle supported by the LM5072MH-50?
The LM5072MH-50 supports a maximum duty cycle of 50%, as indicated by the "-50" suffix. This is a hardware-enforced limit implemented internally without slope compensation. It ensures safe operation in flyback topologies where transformer reset time must exceed the off-time, preventing core saturation and MOSFET overstress. The LM5072MH-50 does not support duty cycles above 50% under any condition.
How does the LM5072MH-50 handle auxiliary power sources?
The LM5072MH-50 supports two auxiliary power paths: front auxiliary via the ICL_FAUX pin (enabling AC adapter input in series with the PoE path) and rear auxiliary via the RAUX pin (bypassing the hot-swap MOSFET). RAUX has dual thresholds (2.5 V low, 6.0 V high) to configure dominance logic. When active, auxiliary sources override PoE input, allowing uninterrupted operation during PoE outages - a key feature confirmed in the LM5072MH-50 datasheet.
What is the purpose of the nPGOOD pin on the LM5072MH-50?
The nPGOOD pin on the LM5072MH-50 is an active-low, open-drain indicator that signals successful completion of the PoE interface startup sequence. It asserts low when both the hot-swap MOSFET's VDS drops below 1.5 V (with 1 V hysteresis) and VGS exceeds 5 V - confirming full charging of input capacitors and readiness of the PWM controller. This signal is used for system-level power sequencing and status indication in designs using the LM5072MH-50.
Can the LM5072MH-50 be used in isolated flyback designs?
Yes, the LM5072MH-50 supports isolated flyback topologies. Its FB pin serves as the inverting input of the internal error amplifier, and COMP is designed to interface with a secondary-side error amplifier via optocoupler. The ARTN pin provides the analog reference ground, and the datasheet explicitly states support for isolated applications. The LM5072MH-50's 50% duty cycle limit is particularly beneficial in flyback designs to ensure adequate transformer reset time.
What thermal protection features does the LM5072MH-50 include?
The LM5072MH-50 includes thermal shutdown protection that triggers at 165 °C junction temperature with 25 °C hysteresis. Upon activation, it disables both the PD interface and PWM controller to prevent damage. The device also features a thermally enhanced TSSOP-16 EP package with 40 °C/W θJA, and the exposed pad must be connected to the VEE plane for effective heat dissipation - all verified in the LM5072MH-50 datasheet's Absolute Maximum Ratings and Thermal Resistance sections.
LM5072MH-50 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Type:
- Controller (PD), DC/DC
- Number of Channels:
- 1
- Power - Max:
- 12.95 W
- Internal Switch(s):
- Both
- Auxiliary Sense:
- Yes
- Standards:
- 802.3af (PoE)
- Voltage - Supply:
- 9V ~ 70V
- Current - Supply:
- 2mA (Max)
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
LM5072MH-50 FAQ
1.How can I place an order for LM5072MH-50 through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5072MH-50 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5072MH-50 reliable?
The price and inventory of LM5072MH-50 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5072MH-50 is usually 5 days.
3.What payment methods are accepted for LM5072MH-50?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM5072MH-50 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM5072MH-50?
LM5072MH-50 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM5072MH-50 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5072MH-50?
For technical support, including LM5072MH-50 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5072MH-50 requirements.
6.How does Aetrix verify that LM5072MH-50 is sourced from the original manufacturer or authorized distributors?
All LM5072MH-50 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5072MH-50 meets industry standards.
7.What is the process for return or replacement of LM5072MH-50?
All LM5072MH-50 units undergo pre-shipment inspection (PSI). If there is an issue with LM5072MH-50, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5072MH-50 part is unused and in its original packaging.
Return procedure for LM5072MH-50:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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