Texas Instruments LM5100AM/NOPB
- Part No.:
- LM5100AM/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LM5100AM/NOPB.pdf
- Description:
- IC GATE DRVR HALF-BRIDGE 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:170
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LM5100AM/NOPB from Texas Instruments is a 3-A, high-voltage dual-channel gate driver IC designed to independently control high-side and low-side N-channel MOSFETs in synchronous buck and half-bridge topologies. It features CMOS-input logic thresholds, 118-V bootstrap supply capability, 25-ns typical propagation delay, and integrated bootstrap diode - enabling robust operation in isolated high-side switching applications such as industrial DC/DC converters.
For engineers reviewing the LM5100AM/NOPB datasheet, LM5100AM/NOPB pinout, LM5100AM/NOPB application, or LM5100AM/NOPB equivalent, key selection criteria include bootstrap voltage rating (up to 118 V), peak output current (3 A), propagation delay matching (≤3 ns typical), UVLO thresholds on both VDD and HB rails, and SO PowerPAD-8 package thermal performance.
Technical Context
The LM5100AM/NOPB integrates a high-speed level shifter that references the high-side driver to the HS node, enabling clean logic-to-floating-domain translation with minimal delay skew versus the low-side path. Its bootstrap diode (VF = 0.52 V @ 100 µA, RD = 1.0 Ω) charges the external HB capacitor during each low-side conduction phase, sustaining high-side drive up to 100 V HS potential.
Undervoltage lockout operates independently on VDD (rising threshold 6.9 V, hysteresis 0.5 V) and HB–HS (rising threshold 6.6 V, hysteresis 0.4 V), ensuring safe startup and fault recovery. The device supports independent HI/LI inputs and delivers matched turn-on/turn-off timing across both outputs under load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Peak Output Current | 3 A sourcing/sinking - sufficient to drive 1000-pF gate capacitance with 8-ns rise/fall times at 12-V supply |
| Bootstrap Supply Voltage | Up to 118 V DC - enables high-side operation with HS node up to 100 V relative to VSS |
| Propagation Delay | 20–45 ns (typical) - ensures precise timing control in high-frequency (>500 kHz) power stages |
| Delay Matching | ≤3 ns typical - minimizes shoot-through risk in complementary switching configurations |
| UVLO Thresholds | VDD: 6.9 V (rise), HB–HS: 6.6 V (rise) - prevents partial turn-on of MOSFETs during brownout conditions |
| Input Logic Type | CMOS - compatible with 3.3-V or 5-V controllers without level-shifting circuitry |
| Operating Temperature | −40°C to +125°C - qualified for industrial and automotive under-hood environments |
Pinout & Package
LM5100AM/NOPB is packaged in an 8-pin SO PowerPAD™ (DPR) package with exposed thermal pad soldered to PCB ground plane for enhanced thermal dissipation (RθJA = 40°C/W on 4-layer board). Pin functions are validated per TI SNOSAW2Q Rev. Q datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Positive gate drive supply input | Primary low-side supply rail; powers internal logic and low-side driver; requires local 0.1-µF low-ESR decoupling |
| HB | High-side bootstrap supply input | Connects to positive terminal of bootstrap capacitor; referenced to HS; supports up to 118 V DC |
| HO | High-side gate driver output | Drives high-side MOSFET gate; referenced to HS node; must route with short, low-inductance trace |
| HS | High-side source reference | Connects to source of high-side MOSFET and negative terminal of bootstrap capacitor; floating domain reference |
| LO | Low-side gate driver output | Drives low-side MOSFET gate; referenced to VSS; capable of 3-A peak sink/source into 1000-pF load |
| VSS | Ground return | Common reference for all signals except HO; exposed thermal pad must be connected to solid ground plane |
| HI | High-side input control | CMOS-threshold digital input (VIL ≤ 4.5 V, VIH ≥ 5.4 V); unused pins must be tied to VSS |
| LI | Low-side input control | CMOS-threshold digital input (same thresholds as HI); enables independent PWM control of each channel |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Bootstrap Diode | Eliminates external diode; 0.52-V forward drop at 100 µA enables efficient capacitor recharge with <37-ns reverse recovery |
| Robust Level Shifter | Enables reliable high-side gate control referenced to HS node while maintaining <3-ns delay match to LO path |
| Independent Dual Inputs | HI and LI accept CMOS logic levels separately - supports non-overlapping, dead-time-controlled, or synchronous PWM schemes |
| UVLO on Both Rails | VDD and HB–HS monitored independently - disables HO during bootstrap undervoltage while preserving LO functionality |
| SO PowerPAD-8 Thermal Design | Exposed pad reduces junction-to-board thermal resistance to 4.4°C/W - critical for sustained 3-A output operation |
Applications
| Industrial Half-Bridge Motor Drive | Synchronous Buck Converter |
|---|---|
Use Scenario: Driving N-channel MOSFETs in a 48-V BLDC motor inverter stage with >100-kHz switching frequency. IC Role / Device Role / Timing Role: LM5100AM/NOPB provides matched high-side/low-side gate drive with <3-ns skew to minimize shoot-through and conduction losses. Use Value: 3-A peak current and 8-ns edge rates enable fast MOSFET switching, reducing total power loss by >15% vs. lower-current drivers at 10-A load. |
Use Scenario: Point-of-load regulation in telecom base station power supplies requiring 12-V input to 1.2-V/30-A output. IC Role / Device Role / Timing Role: LM5100AM/NOPB drives upper/lower FETs in synchronous rectification mode with independent HI/LI control for adaptive dead-time management. Use Value: Integrated bootstrap diode and 118-V HB rating simplify layout and support wide input range; CMOS inputs interface directly with 3.3-V digital PWM controllers. |
| Current-Fed Push-Pull Converter | Two-Switch Forward Converter |
Use Scenario: Isolated 24-V input to 400-V output DC/DC stage in EV battery precharge circuits. IC Role / Device Role / Timing Role: LM5100AM/NOPB controls complementary switches in push-pull topology with HS node swinging ±100 V relative to VSS. Use Value: 100-V HS rating and robust level shifter ensure reliable operation despite large dV/dt transients; UVLO on HB prevents erratic high-side turn-on during startup. |
Use Scenario: High-efficiency 48-V telecom rectifier using active clamp reset and synchronous secondary rectification. IC Role / Device Role / Timing Role: LM5100AM/NOPB drives main primary-side switches and auxiliary clamp switch with precise timing coordination. Use Value: Independent HI/LI inputs allow separate control of main and clamp FETs; 25-ns propagation delay supports >300-kHz operation with tight timing margins. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage dual-channel gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5101AM/NOPB | TTL input thresholds (VIL = 1.8 V, VIH = 2.3 V), same 3-A output and pinout | Better suited for legacy 5-V TTL controllers; requires no pull-up resistors unlike CMOS-input LM5100AM/NOPB | Select LM5101AM/NOPB when interfacing with standard 5-V logic; LM5100AM/NOPB preferred for 3.3-V microcontrollers. |
| UCC27531DR | Single-channel, 5-A peak, 12-V max VDD, no bootstrap or level shift - not a functional replacement | Only suitable for low-side or isolated high-side use with external level-shifting circuitry | UCC27531DR cannot replace LM5100AM/NOPB in half-bridge applications without redesign; consider only for discrete low-side augmentation. |
Compared with LM5101AM/NOPB, LM5100AM/NOPB offers higher noise immunity via CMOS thresholds but requires explicit pull-up/pull-down for unused inputs; versus UCC27531DR, it provides integrated high-side capability and eliminates external level-shift components - reducing BOM count and layout complexity in bridge designs.
Availability
LM5100AM/NOPB is available at Aetrix Electronics and suitable for industrial motor drives, telecom power supplies, and EV charging systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for LM5100AM/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management ICs and high-reliability industrial solutions.
The LM5100x series was developed specifically for high-efficiency, high-voltage switching power stages - targeting synchronous buck, half-bridge, and push-pull converters where precise dual-channel timing, integrated bootstrap functionality, and rugged HV operation are essential.
FAQ
What is the maximum allowable voltage on the HS pin of the LM5100AM/NOPB?
The LM5100AM/NOPB supports HS node voltages from –1 V to +100 V relative to VSS, as specified in Recommended Operating Conditions. Transient excursions below –1 V must not exceed VDD – 15 V to avoid damage; for example, at VDD = 12 V, HS must stay above –3 V. This rating enables use in high-voltage half-bridge and push-pull topologies.
Does the LM5100AM/NOPB require an external bootstrap diode?
No, the LM5100AM/NOPB integrates a high-voltage bootstrap diode (anode to VDD, cathode to HB) with 0.52-V forward voltage at 100 µA and 37-ns reverse recovery time. This eliminates the need for an external diode, simplifying layout and improving reliability in synchronous buck and half-bridge applications.
How does the UVLO protection work on the LM5100AM/NOPB?
The LM5100AM/NOPB implements independent UVLO circuits on VDD (threshold 6.9 V, hysteresis 0.5 V) and HB–HS (threshold 6.6 V, hysteresis 0.4 V). VDD UVLO holds both HO and LO low until supply is valid; HB–HS UVLO disables only HO, allowing continued low-side operation during bootstrap faults - a critical safety feature in bridge configurations.
What package type is used for the LM5100AM/NOPB?
The LM5100AM/NOPB uses the SO PowerPAD-8 (DPR) package: an 8-pin SOIC variant with an exposed thermal pad on the underside. The pad must be soldered to a PCB ground plane to achieve the rated RθJA of 40°C/W and sustain full 3-A output current without thermal derating.
Can the LM5100AM/NOPB drive both MOSFETs in a synchronous buck converter?
Yes, the LM5100AM/NOPB is explicitly designed for synchronous buck topologies: HO drives the high-side N-MOSFET referenced to the switch node (HS), while LO drives the low-side N-MOSFET referenced to VSS. Its matched propagation delays (<3 ns typical), 3-A peak current, and integrated bootstrap diode make it ideal for this application.
LM5100AM/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Half-Bridge
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 9V ~ 14V
- Logic Voltage - VIL, VIH:
- 2.3V, -
- Current - Peak Output (Source, Sink):
- 3A, 3A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- 118 V
- Rise / Fall Time (Typ):
- 430ns, 260ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LM5100AM/NOPB FAQ
1.How can I place an order for LM5100AM/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5100AM/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5100AM/NOPB reliable?
The price and inventory of LM5100AM/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5100AM/NOPB is usually 5 days.
3.What payment methods are accepted for LM5100AM/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM5100AM/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM5100AM/NOPB?
LM5100AM/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM5100AM/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5100AM/NOPB?
For technical support, including LM5100AM/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5100AM/NOPB requirements.
6.How does Aetrix verify that LM5100AM/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5100AM/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5100AM/NOPB meets industry standards.
7.What is the process for return or replacement of LM5100AM/NOPB?
All LM5100AM/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5100AM/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5100AM/NOPB part is unused and in its original packaging.
Return procedure for LM5100AM/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LM5100AM/NOPB Tags

-
ZXGD3009E6TA
Diodes Incorporated

-
1EDN7512BXTSA1
Infineon Technologies
-
UCC27517DBVR
Texas Instruments

-
MCP1416T-E/OT
Microchip Technology

-
MCP1402T-E/OT
Microchip Technology

-
MCP1415T-E/OT
Microchip Technology

-
MCP1401T-E/OT
Microchip Technology

-
IX4428NTR
Littelfuse Inc.

-
IRS2005STRPBF
Infineon Technologies

-
IRS2008STRPBF
Infineon Technologies

-
IX4310TTR
Littelfuse Inc.

-
2EDN7524RXTMA1
Infineon Technologies
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
