Texas Instruments LM5102SD
- Part No.:
- LM5102SD
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 10-WDFN Exposed Pad
- Datasheet:
-
LM5102SD.pdf
- Description:
- IC GATE DRVR HALF-BRIDGE 10WSON
- Quantity:
- Payment:

- Shipping:

Inventory:1,715
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Product details
Overview
LM5102SD from Texas Instruments is a high-voltage half-bridge gate driver IC designed to independently drive high-side and low-side N-channel MOSFETs in synchronous buck and half-bridge power converters. It features programmable rising-edge delays (100–750 ns) on both outputs, 118 V bootstrap supply capability, 25 ns typical turn-off propagation delay, and integrated bootstrap diode - enabling robust operation in 100 V-class DC/DC topologies such as active-clamp forward and two-switch forward converters.
For engineers reviewing the LM5102SD datasheet, LM5102SD pinout, LM5102SD application, or LM5102SD equivalent, key selection considerations include its dual independent delay programming (RT1/RT2), UVLO thresholds on both VDD (6.9 V) and HB (6.6 V), TTL-compatible inputs, and WSON-10 package with exposed thermal pad for high-power-density designs.
Technical Context
The LM5102SD employs a robust level-shifting architecture to enable floating high-side operation up to 100 V referenced to HS, with fast propagation (27 ns typical tHPHL/tLPHL) and 15 ns rise/fall times into 1000-pF loads. Its dual RT-pin timer circuitry uses 3 V bias and 1 mA current limiting to generate precise, temperature-stable delays proportional to external resistor values (5–100 kΩ).
Undervoltage lockout operates independently on VDD and HB rails, with hysteresis (0.5 V on VDD, 0.4 V on HB) preventing chatter during supply transients; only the high-side output (HO) is disabled under HB UVLO, preserving low-side control integrity. The integrated bootstrap diode (VDH = 1.1 V @ 100 mA) supports self-biasing while minimizing external component count.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VHB max | 118 V dc - enables bootstrap operation in high-input-voltage converters up to 100 V rail |
| tHPHL/tLPHL | 27 ns typical - ensures tight timing control for high-frequency switching (>1 MHz capable) |
| Rising edge delay range | 100–750 ns (RT = 5–100 kΩ) - allows precise dead-time tuning to prevent shoot-through |
| VDD UVLO threshold | 6.9 V rising, 6.4 V falling - guarantees reliable startup and shutdown across industrial temperature range |
| IOHH/IOHL | 1.6 A peak sourcing / 1.8 A peak sinking - drives large gate charges (e.g., 43 nC) with minimal Miller plateau time |
| Bootstrap diode VF | 0.85 V @ 100 mA - reduces conduction loss and heat generation in bootstrap recharge path |
| Package | WSON-10 (4.0 mm × 4.0 mm, exposed pad) - provides low thermal resistance (RθJC(bot) = 4.4 °C/W) for high-current operation |
Pinout & Package
LM5102SD is housed in a thermally enhanced 10-pin WSON (DPR) package with an exposed thermal pad soldered to PCB ground plane. Pin numbering follows standard top-view orientation (pin 1 at top-left corner, counterclockwise).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pin 1) | Positive gate drive supply input | Local 9–14 V rail powering both drivers; requires low-ESR decoupling capacitor placed adjacent to pin |
| HB (Pin 2) | High-side bootstrap rail | Connects to positive terminal of bootstrap capacitor; floats up to 118 V above VSS |
| HO (Pin 3) | High-side gate driver output | Drives N-MOSFET gate with 1.6 A sink/source; routed via short, low-inductance trace to minimize ringing |
| HS (Pin 4) | High-side MOSFET source connection | Reference node for floating high-side driver; ties to switch-node and bootstrap capacitor negative terminal |
| RT1 (Pin 5) | High-side rising-edge delay programming | Resistor to ground sets HO turn-on delay (100–750 ns); must be placed close to IC to reject noise |
| RT2 (Pin 6) | Low-side rising-edge delay programming | Resistor to ground sets LO turn-on delay (independent of RT1); same layout rules apply |
| LI (Pin 8) | Low-side driver control input | TTL-compatible (VIL = 0.8 V, VIH = 2.2 V); unused pins must be tied to VSS |
| HI (Pin 7) | High-side driver control input | Independent TTL input; enables asymmetric PWM control for advanced dead-time management |
| LO (Pin 10) | Low-side gate driver output | 1.8 A pulldown/1.6 A pullup capability; connects directly to low-side MOSFET gate |
| VSS (Pin 9) | Ground return | Common reference for all signals; exposed pad must be soldered to solid ground plane for thermal and EMI performance |
Key Features
| Feature | Design Value |
|---|---|
| Independent high/low-side delay programming | Enables precise, asymmetrical dead-time tuning per MOSFET characteristics - eliminates need for external RC networks or controller-level compensation |
| Integrated bootstrap diode | Reduces BOM count by one component and PCB area; specified VF = 0.85 V @ 100 mA ensures efficient capacitor recharge without external Schottky |
| Dual independent UVLO | Prevents partial drive failure: VDD UVLO halts both outputs; HB UVLO disables only HO - maintains low-side control during bootstrap fault conditions |
| Fast 15-ns rise/fall into 1000-pF load | Supports high-speed switching with minimal Miller plateau duration, reducing conduction losses in high-frequency GaN or SiC-based designs |
| Exposed thermal pad (WSON) | Delivers RθJC(bot) = 4.4 °C/W - enables sustained 1.8 A peak currents without derating in compact 4×4 mm layouts |
Applications
| Motor Drive Half-Bridge | Synchronous Buck Converter |
|---|---|
Use Scenario: Driving N-channel half-bridge in 24–48 V BLDC motor controllers with PWM commutation. IC Role / Device Role / Timing Role: LM5102SD provides isolated high-side gate drive and independently adjustable dead time to prevent shoot-through during phase switching. Use Value: Programmable RT1/RT2 delays allow optimization for specific MOSFET Qg and layout parasitics, improving efficiency by >1.2% at 20 kHz switching. |
Use Scenario: High-efficiency 12 V input → 3.3 V/20 A output synchronous buck stage in telecom power supplies. IC Role / Device Role / Timing Role: LM5102SD drives upper/lower MOSFETs with matched propagation delay and independent delay tuning to minimize body-diode conduction loss. Use Value: 25 ns typical turn-off delay and 15 ns edge speeds reduce switching transition losses, enabling >95% efficiency at 500 kHz. |
| Active-Clamp Forward Converter | Two-Switch Forward Power Supply |
Use Scenario: 380 V DC input → 48 V/15 A output in server PSU using active-clamp forward topology. IC Role / Device Role / Timing Role: LM5102SD controls main switch and clamp switch with separate delay settings to precisely align ZVS transitions. Use Value: 100 V HS voltage rating and 118 V HB capability support direct operation from 380 V bus without auxiliary bias winding. |
Use Scenario: Industrial 28 V input → 5 V/30 A isolated DC/DC module using two-switch forward with synchronous rectification. IC Role / Device Role / Timing Role: LM5102SD drives primary-side switches and secondary-side synchronous rectifiers with independent timing control for optimal duty-cycle management. Use Value: Dual UVLO (VDD + HB) ensures safe startup sequencing and prevents misfiring during brownout events on either rail. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage half-bridge gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC27211DR | No programmable delay; fixed 12 ns propagation; higher 5-A peak drive; no integrated bootstrap diode | Better suited for ultra-high-speed SiC/GaN where minimal delay variation is critical; requires external bootstrap diode | Select UCC27211DR when >3 A peak drive or sub-10 ns timing precision is required; LM5102SD preferred when delay tuning and BOM reduction are priorities |
| IRS2004PBF | Fixed 150 ns delay; lower 600 V max HS voltage; no RT-pin programming; older HV level-shift architecture | Targeted at cost-sensitive 400 V AC line applications; lacks independent UVLO and bootstrap diode integration | Choose IRS2004PBF for legacy designs with fixed dead time; LM5102SD offers superior flexibility, thermal performance, and modern protection features |
Compared with UCC27211DR and IRS2004PBF, LM5102SD uniquely balances programmable timing, integrated bootstrap functionality, and WSON thermal performance - making it optimal for new designs requiring design-in flexibility and reduced component count in 100 V-class converters.
Availability
LM5102SD is available at Aetrix Electronics and suitable for synchronous buck converters, half-bridge motor drives, and active-clamp forward power supplies requiring stable component supply, long-term lifecycle support, and consistent parametric performance across temperature.
Supply support for LM5102SD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management ICs and high-reliability industrial components.
The LM5102SD belongs to TI's high-voltage gate driver product line, engineered specifically for efficient, robust control of N-channel MOSFETs in isolated and non-isolated DC/DC topologies operating up to 100 V.
FAQ
What is the maximum bootstrap supply voltage supported by the LM5102SD?
The LM5102SD supports a maximum bootstrap supply voltage (VHB) of 118 V dc, enabling reliable high-side gate drive operation in systems with up to 100 V rail-to-rail voltage on the HS node. This specification is validated per absolute maximum ratings and confirmed in Section 6.1 of the SNVS268B datasheet.
Does the LM5102SD require an external bootstrap diode?
No, the LM5102SD integrates a bootstrap diode with 0.85 V forward voltage at 100 mA, eliminating the need for an external diode in most applications. However, an external Schottky diode may be added in high-frequency or high-power designs to reduce diode conduction loss and thermal stress on the IC.
How does the LM5102SD handle undervoltage conditions on the high-side supply?
The LM5102SD implements independent undervoltage lockout (UVLO) on both VDD and HB rails. When HB falls below 6.6 V (rising threshold), only the high-side output (HO) is disabled - the low-side driver remains fully operational, preserving system controllability during bootstrap faults.
What is the purpose of the RT1 and RT2 pins on the LM5102SD?
RT1 and RT2 are analog programming inputs that set the rising-edge turn-on delay for HO and LO outputs respectively. Connecting resistors (5–100 kΩ) from each pin to ground generates delays from 100 ns to 750 ns, allowing precise, independent dead-time adjustment to match MOSFET gate charge characteristics and layout parasitics.
Is the LM5102SD pin-compatible with other members of the LM510x family?
No - the LM5102SD (WSON-10) is not pin-compatible with the LM5102MM/NOPB (VSSOP-10), despite identical functionality. Pin assignments differ between WSON and VSSOP packages; PCB layout must be redesigned when substituting between these variants. Always verify pin mapping using Section 5 of SNVS268B.
LM5102SD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Programmable:
- Not Verified
- Driven Configuration:
- Half-Bridge
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 9V ~ 14V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.2V
- Current - Peak Output (Source, Sink):
- 1.6A, 1.6A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- 118 V
- Rise / Fall Time (Typ):
- 600ns, 600ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-WSON (4x4)
LM5102SD FAQ
1.How can I place an order for LM5102SD through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5102SD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5102SD reliable?
The price and inventory of LM5102SD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5102SD is usually 5 days.
3.What payment methods are accepted for LM5102SD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM5102SD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM5102SD?
LM5102SD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM5102SD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5102SD?
For technical support, including LM5102SD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5102SD requirements.
6.How does Aetrix verify that LM5102SD is sourced from the original manufacturer or authorized distributors?
All LM5102SD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5102SD meets industry standards.
7.What is the process for return or replacement of LM5102SD?
All LM5102SD units undergo pre-shipment inspection (PSI). If there is an issue with LM5102SD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5102SD part is unused and in its original packaging.
Return procedure for LM5102SD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LM5102SD Tags

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IRS2005STRPBF
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2EDN7524RXTMA1
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