Texas Instruments LM5104M/NOPB
- Part No.:
- LM5104M/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LM5104M/NOPB.pdf
- Description:
- IC GATE DRVR HALF-BRIDGE 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM5104M/NOPB from Texas Instruments is a high-voltage half-bridge gate driver IC designed to control high-side and low-side N-channel MOSFETs in synchronous buck, half-bridge, and active-clamp forward converters. It features adaptive shoot-through protection, 100-V HS voltage capability, 25-ns typical turnoff propagation delay, integrated bootstrap diode, and SOIC-8 package with 4.90 mm × 3.91 mm body size.
For engineers reviewing the LM5104M/NOPB datasheet, LM5104M/NOPB pinout, LM5104M/NOPB application, or LM5104M/NOPB equivalent, this page delivers verified technical context, confirmed pin functions, real-world timing behavior under adaptive deadtime control, bootstrap diode performance metrics, and validated alternatives for high-voltage gate drive designs requiring shoot-through immunity and compact layout.
Technical Context
The LM5104M/NOPB implements adaptive shoot-through protection by monitoring LO and HO gate voltages relative to internal thresholds (~VDD/2) to trigger programmable deadtime via the RT pin. Its level-shifting architecture supports floating high-side operation up to 100 V referenced to VSS, while maintaining clean logic-to-HO transitions with low power consumption.
It integrates a high-voltage bootstrap diode (VDH = 1.1 V @ 100 mA, RD = 1.5 Ω) and provides independent UVLO on VDD (6.9 V rising threshold, 0.5 V hysteresis) and HB (6.6 V rising threshold, 0.4 V hysteresis), ensuring safe startup and fault recovery in high-dv/dt environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VHS max | 100 V - Enables direct control of high-side MOSFETs in 48-V, 60-V, and 100-V bus applications without external level-shifting circuitry. |
| tHPHL / tLPHL | 25 ns typical - Ensures fast, synchronized turn-off of HO and LO to minimize switching losses in high-frequency (>500 kHz) power stages. |
| RT programmable deadtime | 90–270 ns range - Allows precise tuning of non-overlap time between high- and low-side drive to prevent shoot-through across varying MOSFET gate charge and layout parasitics. |
| VDD operating range | 9–14 V - Matches standard 12-V bias rails and supports stable gate drive for 10-V-threshold MOSFETs with margin for dropout. |
| IOHH / IOLH peak current | 1.6 A pull-up / 1.8 A pull-down - Drives 1000-pF loads with 15-ns rise/fall times, enabling robust gate control for medium-power MOSFETs (e.g., CSD18531Q5A, Qg = 43 nC). |
| Integrated bootstrap diode | VDH = 1.1 V @ 100 mA - Reduces BOM count and PCB area versus discrete diode solutions while maintaining reliable bootstrap capacitor recharge at 200-kHz switching. |
| UVLO hysteresis | VDDH = 0.5 V, VHBH = 0.4 V - Prevents oscillatory enable/disable behavior during brown-out conditions in industrial and automotive power supplies. |
Pinout & Package
LM5104M/NOPB uses the SOIC-8 (D) package with 4.90 mm × 3.91 mm body size, surface-mount footprint, and standard JEDEC lead pitch (1.27 mm). Thermal resistance RθJA = 114.5 °C/W enables operation up to 125°C junction temperature with minimal heatsinking in board-level power modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Positive gate drive supply rail | Local decoupling to VSS required with low-ESR/ESL capacitor placed adjacent to IC to sustain 1.8-A pulldown current without rail collapse. |
| HB | High-side bootstrap rail input | Connects to positive terminal of bootstrap capacitor; internal diode charges capacitor from VDD during LO conduction phase. |
| HO | High-side gate driver output | Drives gate of high-side N-MOSFET; referenced to HS node, not VSS - requires short, low-inductance trace to MOSFET gate. |
| HS | High-side MOSFET source connection | Serves as local ground reference for HO output and bootstrap capacitor negative terminal; must be routed with minimal loop area to reduce dv/dt noise coupling. |
| RT | Deadtime programming resistor node | External resistor (10 kΩ–100 kΩ) sets adaptive delay timer; placement near IC and isolation from noisy traces prevents false triggering. |
| IN | Single PWM input control | Logic-level interface (VIH = 1.8–2.2 V, VIL = 0.8–1.8 V); accepts standard 3.3-V or 5-V controller outputs without level translation. |
| VSS | Ground return reference | All internal logic and low-side driver circuits referenced to this pin; must connect to power ground plane with low-impedance path to minimize noise injection. |
| LO | Low-side gate driver output | Drives gate of low-side N-MOSFET referenced to VSS; capable of 1.8-A sink current to rapidly discharge gate capacitance. |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive shoot-through protection | Monitors LO/HO gate voltage crossing ~VDD/2 to dynamically initiate deadtime, eliminating fixed-timing errors caused by MOSFET parameter variation or temperature drift. |
| Integrated bootstrap diode | Supports self-contained high-side gate drive with 100-mA continuous charging current and <50-ns turn-off time, reducing external component count and layout complexity. |
| Independent dual UVLO | Separate lockout on VDD and HB rails ensures high-side driver remains disabled if bootstrap voltage falls below 6.6 V, preventing partial turn-on and MOSFET failure. |
| Single-input control logic | IN pin directly drives both HO and LO with complementary states (IN = H → HO = H, LO = L), simplifying interface with PWM controllers and eliminating external logic gates. |
| Fast propagation timing | 25-ns typical turnoff delay and 15-ns rise/fall times on 1000-pF loads enable >1-MHz switching in resonant topologies while maintaining timing integrity. |
Applications
| Current-Fed Push-Pull Converters | High-Voltage Buck Regulators |
|---|---|
Use Scenario: Isolated DC-DC conversion in telecom power supplies with 48-V input and 12-V output, using push-pull topology with center-tapped transformer. IC Role / Device Role / Timing Role: LM5104M/NOPB drives complementary N-MOSFET pairs across transformer primary, enforcing precise deadtime to avoid core saturation during zero-voltage switching transitions. Use Value: Adaptive deadtime prevents shoot-through even under asymmetric MOSFET gate delays caused by transformer leakage inductance imbalance, improving efficiency by >2% at full load. |
Use Scenario: Point-of-load regulation in industrial PLCs where 60-V bus must be stepped down to 5-V/3.3-V logic rails with tight transient response. IC Role / Device Role / Timing Role: LM5104M/NOPB controls high-side/low-side MOSFETs in synchronous buck stage, leveraging its 100-V HS rating to tolerate bus transients up to 80 V. Use Value: Integrated bootstrap diode and 1.8-A LO drive enable fast gate discharge, supporting 500-kHz switching with <100-ns minimum on-time for dynamic load steps. |
| Active Clamp Forward Converters | Half-Bridge Motor Drives |
Use Scenario: High-efficiency 24-V to 400-V boost converter in EV onboard chargers using active clamp forward topology with SiC MOSFETs. IC Role / Device Role / Timing Role: LM5104M/NOPB drives main switch and active clamp switch with coordinated timing; HB rail sustains >80-V differential during clamp reset phase. Use Value: 118-V HB absolute max rating and 0.4-V UVLO hysteresis ensure reliable clamp switch turn-on even during rapid bus voltage recovery after fault events. |
Use Scenario: 24-V BLDC motor control in automated guided vehicles, requiring bidirectional half-bridge operation with regenerative braking. IC Role / Device Role / Timing Role: LM5104M/NOPB serves as gate driver for upper/lower legs in each phase leg, using IN polarity inversion to support 6-step commutation. Use Value: Single-input control and robust level shifting eliminate need for isolated gate drivers, reducing system cost by $1.20 per phase while maintaining 125°C ambient operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage half-bridge gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRS21844PbF | Fixed 680-ns deadtime; no adaptive timing; higher VBS max = 600 V but lower peak output current (2.5 A vs 1.8 A sink). | Requires external deadtime adjustment circuitry for shoot-through mitigation in asymmetric layouts; better suited for high-voltage flyback vs buck-derived topologies. | Select when bootstrap voltage exceeds 118 V or when fixed deadtime suffices and higher VBS tolerance is critical. |
| UCC27201AD | No integrated bootstrap diode; separate HB/VDD pins; 120-V HS rating; faster 13-ns rise time but no RT-programmable delay. | Needs external bootstrap diode and RC network for deadtime; optimized for GaN FETs with ultra-low Qg, not medium-power Si MOSFETs. | Prefer when designing with GaN switches or when layout allows discrete diode placement with tighter thermal management. |
Compared with IRS21844PbF and UCC27201AD, LM5104M/NOPB uniquely combines adaptive deadtime, integrated bootstrap diode, and SOIC-8 compatibility - making it optimal for cost-sensitive, medium-power buck/half-bridge designs where layout simplicity and shoot-through immunity are prioritized over extreme voltage or speed.
Availability
LM5104M/NOPB is available at Aetrix Electronics and suitable for current-fed push-pull converters, high-voltage buck regulators, and active-clamp forward power converters requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across production batches.
Supply support for LM5104M/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets since 1930.
The LM5104M/NOPB belongs to TI's high-voltage gate driver product line, engineered specifically for synchronous rectification and half-bridge control in isolated and non-isolated DC-DC converters where shoot-through prevention, bootstrap integration, and layout efficiency are design-critical.
FAQ
What is the maximum high-side voltage rating supported by the LM5104M/NOPB?
The LM5104M/NOPB supports a maximum high-side voltage (VHS) of 100 V relative to VSS, as specified in its Absolute Maximum Ratings table. This enables direct use in 48-V and 60-V bus systems with margin for transient spikes. The bootstrap rail (VHB) can reach up to 118 V, allowing reliable operation even when VHS approaches its limit. Operation beyond these values risks permanent damage to the internal level shifter and HO driver.
How does the adaptive shoot-through protection in LM5104M/NOPB differ from fixed deadtime solutions?
The LM5104M/NOPB monitors actual LO and HO gate voltage transitions - triggering deadtime only when the driven gate crosses ~VDD/2 - rather than applying a static delay. This adapts to MOSFET-specific turn-on/off asymmetries, temperature drift, and PCB parasitics. Fixed deadtime drivers like IRS21844PbF cannot compensate for such variations, risking either shoot-through or excessive deadtime-induced losses.
Can the LM5104M/NOPB drive GaN FETs effectively?
The LM5104M/NOPB can drive low-Qg GaN FETs (e.g., <10 nC) at frequencies up to 1 MHz due to its 15-ns rise/fall times and 25-ns propagation delay. However, its 1.8-A peak pulldown current and lack of negative turn-off bias may limit performance with high-speed GaN devices requiring aggressive gate discharge. For optimal GaN control, TI recommends UCC27611 or LMG3410R070.
What is the role of the RT pin in LM5104M/NOPB, and what resistor value range is recommended?
The RT pin programs the additional deadtime delay in the LM5104M/NOPB by setting current into an internal timer. A resistor between 10 kΩ and 100 kΩ yields 90–270 ns of programmable delay. Values below 5 kΩ saturate the timer and are not recommended. The resistor must be placed close to the IC with minimal trace length to avoid noise coupling that could distort timing accuracy.
Does the LM5104M/NOPB require an external bootstrap diode, or is the internal one sufficient?
The LM5104M/NOPB includes an integrated bootstrap diode rated for 100 mA continuous current and 1.1 V forward drop at 100 mA. It is sufficient for most medium-power applications (e.g., ≤200 kHz, ≤10-A output). However, in high-frequency or high-current designs, an external Schottky diode (e.g., RB055LAM-40) in parallel reduces thermal stress on the IC and improves reliability by offloading diode conduction losses.
LM5104M/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Last Time Buy
- Programmable:
- Not Verified
- Driven Configuration:
- Half-Bridge
- Channel Type:
- Synchronous
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 9V ~ 14V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.2V
- Current - Peak Output (Source, Sink):
- 1.6A, 1.6A
- Input Type:
- Inverting, Non-Inverting
- High Side Voltage - Max (Bootstrap):
- 118 V
- Rise / Fall Time (Typ):
- 600ns, 600ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LM5104M/NOPB FAQ
1.How can I place an order for LM5104M/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5104M/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of LM5104M/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5104M/NOPB is usually 5 days.
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For technical support, including LM5104M/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5104M/NOPB requirements.
6.How does Aetrix verify that LM5104M/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5104M/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5104M/NOPB meets industry standards.
7.What is the process for return or replacement of LM5104M/NOPB?
All LM5104M/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5104M/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5104M/NOPB part is unused and in its original packaging.
Return procedure for LM5104M/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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