Texas Instruments LM5105SD

Overview

LM5105SD from Texas Instruments is a 100-V half-bridge gate driver IC designed to control high-side and low-side N-channel MOSFETs in synchronous buck and half-bridge power converters. It delivers 1.8-A peak source/sink current, supports bootstrap supply up to 118 V DC, integrates a bootstrap diode, and features programmable dead time (75–705 ns) via external RDT resistor. It operates across –40°C to +125°C and targets high-efficiency motor drives and DC-DC converters.

For engineers reviewing the LM5105SD datasheet, LM5105SD pinout, LM5105SD application, or LM5105SD equivalent, this page provides verified technical context, validated pin functions, confirmed switching characteristics (e.g., 26-ns typical turnoff delay), real-world thermal metrics (RθJA = 37.8°C/W), and two rigorously cross-checked alternative gate drivers for half-bridge N-MOSFET control.

Technical Context

The LM5105SD implements a single-TTL-compatible input with independent high-side and low-side drivers, each featuring matched leading-edge delay circuits for precise dead-time control. Its floating high-side level shifter operates up to 100 V HS potential and maintains clean transitions under fast slew rates (<50 V/ns).

Undervoltage lockout (UVLO) independently monitors VDD (6.9 V threshold) and HB–HS (6.6 V threshold) with hysteresis, disabling outputs until both supplies meet minimum operating conditions. The integrated bootstrap diode (VDH = 1.1 V @ 100 mA) enables self-biased high-side operation without external components.

Key Specifications

Pinout & Package

LM5105SD is housed in a thermally enhanced 10-pin WSON package (4.0 mm × 4.0 mm) with an exposed thermal pad soldered to PCB ground for optimal heat dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge gate driver applications.

Compared with UCC27201D and IR2104PbF, LM5105SD uniquely balances programmable dead time, integrated bootstrap diode, and 1.8-A drive strength in a compact WSON package - making it optimal for mid-power (50–500 W) half-bridge designs requiring layout simplicity and thermal robustness without sacrificing timing control.

Availability

LM5105SD is available at Aetrix Electronics and suitable for solid-state motor drives, half-bridge power converters, and synchronous buck regulators requiring stable component supply, long-term lifecycle support, and traceable sourcing for production programs.

Supply support for LM5105SD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power conversion solutions.

LM5105SD belongs to TI's high-voltage gate driver product line, engineered specifically for robust, efficient control of N-channel MOSFETs in half-bridge and synchronous buck topologies across automotive, industrial, and renewable energy applications.

FAQ

What is the maximum allowable voltage on the HS pin of the LM5105SD?

The LM5105SD specifies an absolute maximum HS-to-VSS voltage of –5 V to +100 V. However, per datasheet Section 6.1 Note 3, HS must never drop more than 15 V below VDD (e.g., if VDD = 10 V, HS must stay ≥ –5 V). This constraint protects internal level-shift circuitry from latch-up during transient negative spikes caused by PCB inductance. The LM5105SD relies on the external low-side MOSFET's body diode for clamping, so proper layout minimizing source/drain loop inductance is essential to avoid exceeding this limit.

How does the RDT pin program dead time in the LM5105SD?

The LM5105SD RDT pin accepts a resistor to VSS that sets matched turnon delays for both HO and LO outputs. With RDT = 10 kΩ, dead time is 75–150 ns; with RDT = 100 kΩ, it increases to 570–705 ns. The pin is internally biased at 3.0 V and current-limited to 1.5 mA max. Resistor placement must be adjacent to the IC to avoid noise coupling, as the timing circuit is sensitive to parasitic capacitance. The LM5105SD does not support grounding RDT for zero dead time - minimum is ~75 ns with 10-kΩ resistor.

Does the LM5105SD require an external bootstrap diode?

No, the LM5105SD integrates a bootstrap diode with forward voltage VDH = 0.85–1.1 V at 100 mA, eliminating the need for an external Schottky diode in most applications. This reduces component count, PCB area, and routing complexity. The internal diode supports bootstrap capacitor recharge during low-side conduction, enabling continuous high-side drive in half-bridge configurations. External diodes are only recommended if higher current (>100 mA) or lower VF (<0.7 V) is required for ultra-high-frequency operation.

What thermal design considerations apply to the LM5105SD WSON package?

The LM5105SD uses a 4-mm × 4-mm WSON package with an exposed thermal pad that must be soldered to a PCB ground plane for effective heat dissipation. Its RθJA is 37.8°C/W - significantly lower than alternatives like IR2104 (70°C/W) - but this value assumes ≥1000 mm² of 2-oz copper connected directly to the pad. Thermal vias (≥6× 0.3-mm diameter) beneath the pad are mandatory to transfer heat to inner/secondary layers. Without proper thermal design, junction temperature can exceed 125°C even at moderate load, triggering thermal shutdown or accelerated parametric drift.

How does UVLO function independently on VDD and HB rails in the LM5105SD?

The LM5105SD implements two independent UVLO comparators: one monitors VDD (threshold 6.9 V ±0.5 V) and disables both HO and LO if violated; the other monitors HB–HS (threshold 6.6 V ±0.4 V) and disables only HO while allowing LO to operate normally. This dual UVLO architecture prevents partial drive failures - for example, if bootstrap capacitor voltage sags due to insufficient hold-up time or leakage (IHBS ≤ 10 µA), the high-side shuts down safely while low-side continues switching to maintain regulation. Both comparators include hysteresis to prevent oscillation near threshold.