Texas Instruments LM5105SD/NOPB

Overview

LM5105SD/NOPB from Texas Instruments is a 100-V half-bridge gate driver IC designed to control high-side and low-side N-channel MOSFETs in synchronous buck and half-bridge power stages. It delivers 1.8-A peak source/sink current, supports bootstrap supply up to 118 V DC, integrates a bootstrap diode, features programmable dead time (75–705 ns) via external RDT resistor, and operates with TTL-compatible IN/EN inputs.

For engineers reviewing the LM5105SD/NOPB datasheet, LM5105SD/NOPB pinout, LM5105SD/NOPB application, or LM5105SD/NOPB equivalent, key selection criteria include high-voltage HS capability (100 V), fast propagation delays (26 ns turnoff), 15-ns rise/fall times into 1000 pF, undervoltage lockout on both VDD and HB rails, and thermally enhanced 4 mm × 4 mm WSON-10 packaging.

Technical Context

The LM5105SD/NOPB implements a single-input, dual-output architecture with independent UVLO monitoring of VDD (6.9 V threshold) and HB–HS (6.6 V threshold), ensuring safe operation during bootstrap capacitor charging. Its level-shift circuit enables robust high-side drive up to 100 V HS voltage while maintaining tight dead-time matching (≤50 ns mismatch).

Dead time is generated by matched leading-edge delay circuits controlled by a resistor at RDT, yielding proportional delays (75 ns at 10 kΩ, 595 ns at 100 kΩ) for both HO and LO turnon transitions. The integrated bootstrap diode (VF = 0.85–1.1 V at 100 mA) eliminates need for external diode in most designs.

Key Specifications

Pinout & Package

LM5105SD/NOPB uses a thermally enhanced 10-pin WSON package (4.00 mm × 4.00 mm) with exposed thermal pad soldered to PCB ground plane.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge gate driver applications.

Compared with UCC27201D and IRS21844PbF, LM5105SD/NOPB uniquely combines integrated bootstrap diode, programmable dead time, and 4 mm × 4 mm WSON packaging-enabling higher power density and reduced layout complexity in 48–100 V half-bridge systems without sacrificing timing control.

Availability

LM5105SD/NOPB is available at Aetrix Electronics and suitable for motor control, DC-DC conversion, industrial power supplies, and renewable energy inverters requiring stable component supply and long-term production continuity.

Supply support for LM5105SD/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and power management technologies, with over 90 years of innovation in industrial, automotive, and communications markets.

LM5105SD/NOPB belongs to TI's high-voltage gate driver product line, engineered for reliable half-bridge and synchronous buck power stage control in demanding 48–100 V applications with emphasis on integration, thermal performance, and shoot-through immunity.

FAQ

What is the maximum allowable voltage on the HS pin of the LM5105SD/NOPB?

The LM5105SD/NOPB specifies an absolute maximum HS-to-VSS voltage of 100 V. This rating enables direct use in 48-V and 60-V battery systems with transient margin. Operation beyond this limit risks permanent damage. The device also defines a safe negative transient limit: HS must never fall below VDD – 15 V (e.g., if VDD = 12 V, HS must stay above –3 V). These limits are enforced by internal protection structures and must be respected in layout and system design.

How does the RDT pin program dead time in the LM5105SD/NOPB?

The RDT pin on the LM5105SD/NOPB accepts a resistor to VSS that sets matched turnon delays for both HO and LO outputs. With RDT = 10 kΩ, dead time is 75–150 ns; with RDT = 100 kΩ, it increases to 485–705 ns. The internal circuit biases RDT at ~3 V and limits current to 1.5 mA max. Resistor placement must be adjacent to the IC to avoid noise coupling, as the timing generator is sensitive to interference. No external capacitor or active circuitry is needed.

Does the LM5105SD/NOPB require an external bootstrap diode?

No, the LM5105SD/NOPB integrates a bootstrap diode between VDD and HB pins. This diode has a forward voltage of 0.85–1.1 V at 100 mA and dynamic resistance of 0.8–1.5 Ω, enabling efficient charging of the external bootstrap capacitor without adding discrete components. External diodes are unnecessary unless ultra-low VF (<0.6 V) or higher current (>200 mA) is required-scenarios uncommon in typical half-bridge implementations.

What are the UVLO thresholds for VDD and HB in the LM5105SD/NOPB?

The LM5105SD/NOPB features independent undervoltage lockout: VDD UVLO activates at 6.9 V (rising) with 0.5-V hysteresis, disabling both HO and LO. HB UVLO activates at 6.6 V (rising) with 0.4-V hysteresis and disables only HO-preserving low-side control during bootstrap faults. Both thresholds are specified over –40°C to 125°C and ensure MOSFETs remain off until sufficient gate drive voltage is available, preventing weak turnon and thermal stress.

Can the LM5105SD/NOPB drive GaN HEMTs?

Yes, the LM5105SD/NOPB can drive enhancement-mode GaN HEMTs requiring <20-V gate drive, provided layout minimizes parasitic inductance. Its 1.8-A peak current, 15-ns rise/fall times into 1000 pF, and 26-ns turnoff propagation support fast-switching GaN devices. However, GaN-specific requirements-such as negative turnoff bias or sub-5-V logic thresholds-must be met externally, as LM5105SD/NOPB outputs swing from VSS to VDD (LO) or HS to HB (HO) with TTL-compatible inputs only.