Texas Instruments LM5105SDX/NOPB
- Part No.:
- LM5105SDX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 10-WDFN Exposed Pad
- Datasheet:
-
LM5105SDX/NOPB.pdf
- Description:
- IC GATE DRVR HALF-BRIDGE 10WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM5105SDX/NOPB from Texas Instruments is a 100-V half-bridge gate driver IC designed to control high-side and low-side N-channel MOSFETs in synchronous buck or half-bridge power stages. It delivers 1.8-A peak source/sink current, supports bootstrap supply up to 118 V DC, integrates a bootstrap diode, and provides programmable dead time (75–705 ns) via external RDT resistor. Used in motor drives and isolated DC-DC converters.
For engineers reviewing the LM5105SDX/NOPB datasheet, LM5105SDX/NOPB pinout, LM5105SDX/NOPB application, or LM5105SDX/NOPB equivalent, key selection criteria include its 100-V HS rail capability, TTL-compatible single-input control, 26-ns typical turnoff propagation delay, integrated UVLO on both VDD and HB rails, and thermally enhanced 4 mm × 4 mm WSON package with exposed pad.
Technical Context
The LM5105SDX/NOPB employs robust level-shift technology to drive the floating high-side output HO referenced to HS, enabling operation with HS voltages up to 100 V. Its dual UVLO circuits independently monitor VDD (6.9 V threshold) and HB–HS (6.6 V threshold), disabling respective outputs during undervoltage conditions.
Dead time is generated by matched leading-edge delay circuits tied to the RDT pin, where resistor values from 5 kΩ to 100 kΩ set total dead time between LO-OFF-to-HO-ON and HO-OFF-to-LO-ON from 80 ns to 570 ns. The single TTL-compatible IN pin controls both outputs with hysteresis, while EN enables/disables both drivers simultaneously.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VHS Max | 100 V - Supports high-voltage half-bridge topologies including active clamp and two-switch forward. |
| Peak Output Current | 1.8 A - Sufficient to drive large gate capacitances (e.g., 1000 pF) with 15-ns rise/fall times. |
| Dead Time Range | 80–705 ns - Programmable via RDT resistor; ensures safe shoot-through prevention across MOSFET variants. |
| UVLO Thresholds | VDD: 6.9 V / VHB: 6.6 V - Independent monitoring prevents false turn-on during bootstrap capacitor recharge. |
| Propagation Delay | 26 ns (turnoff), 485–705 ns (turnon) - Tight matching (<50 ns mismatch) maintains precise timing control. |
| Package | 10-pin WSON (4 mm × 4 mm) - Exposed thermal pad enables ≤14.9°C/W junction-to-board resistance for high-power operation. |
| Bootstrap Diode | Integrated - Eliminates external diode; VF = 0.9 V @ 100 µA, 1.1 V @ 100 mA reduces component count and layout area. |
Pinout & Package
LM5105SDX/NOPB uses a thermally enhanced 10-pin WSON package (4 mm × 4 mm) with an exposed pad soldered to PCB ground for optimal thermal dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VDD | Positive gate-drive supply input | Power rail for low-side driver and logic; requires local 0.1-µF ceramic bypass to VSS. |
| 2 HB | High-side bootstrap rail | Connects to positive terminal of bootstrap capacitor; supplies floating high-side driver. |
| 3 HO | High-side gate driver output | Drives gate of high-side N-MOSFET; referenced to HS, not VSS. |
| 4 HS | High-side source reference | Return node for bootstrap capacitor; connects to source of high-side MOSFET. |
| 5 NC | No connection | Internally unconnected; must remain floating or grounded per layout best practice. |
| 6 RDT | Dead-time programming input | Resistor to VSS sets matched turnon delays for both HO and LO outputs. |
| 7 EN | Enable control input | TTL-compatible; pulls both HO and LO low when logic low (hysteresis improves noise immunity). |
| 8 IN | Primary PWM input | TTL-compatible; rising edge triggers HO high/LO low; falling edge triggers LO high/HO low. |
| 9 VSS | Ground reference | Common return for VDD, logic, and low-side driver; tie exposed pad directly to this plane. |
| 10 LO | Low-side gate driver output | Drives gate of low-side N-MOSFET; referenced to VSS. |
Key Features
| Feature | Design Value |
|---|---|
| Single TTL-compatible input | Reduces controller interface complexity; eliminates need for dual complementary signals or external inverters. |
| Programmable dead time | Enables optimization for diverse MOSFET gate charges and switching frequencies without changing IC or layout. |
| Integrated bootstrap diode | Lowers BOM count and PCB area; avoids reverse recovery issues of discrete Schottky diodes in high-dV/dt environments. |
| Dual independent UVLO | Prevents partial drive during bootstrap capacitor undercharge or VDD brownout-critical for system reliability. |
| Fast 26-ns turnoff delay | Minimizes overlap conduction loss in hard-switched topologies operating above 500 kHz. |
Applications
| Motor Control Systems | Isolated DC-DC Converters |
|---|---|
Use Scenario: Driving N-channel MOSFET half-bridge in BLDC motor inverter stage with 48-V bus and 100-kHz PWM. IC Role / Device Role / Timing Role: Gate driver providing matched high/low-side timing, programmable dead time, and bootstrap-based high-side biasing. Use Value: Enables efficient commutation with <50 ns dead-time mismatch, reducing shoot-through risk while supporting fast MOSFET switching. | Use Scenario: Half-bridge primary-side driver in 300-W telecom DC-DC module with 380-V input and synchronous rectification. IC Role / Device Role / Timing Role: High-voltage gate driver controlling 100-V-rated SiC MOSFETs with integrated bootstrap diode and 100-V HS capability. Use Value: Eliminates external bootstrap diode and supports >100-V HS transients, simplifying high-reliability power supply design. |
| Solid-State Relays | Industrial Motor Drives |
Use Scenario: Bidirectional AC switching using back-to-back N-MOSFETs in solid-state relay with zero-cross detection. IC Role / Device Role / Timing Role: Dual-output driver delivering precise turnon/turnoff sequencing and UVLO-protected gate control. Use Value: Ensures clean zero-voltage switching transitions and prevents latch-up during line transients. | Use Scenario: 3-phase inverter stage in HVAC compressor drive with 200-V DC bus and 15-kHz carrier frequency. IC Role / Device Role / Timing Role: Half-bridge driver managing shoot-through protection, thermal management via exposed pad, and TTL-level microcontroller interface. Use Value: Delivers 1.8-A peak current to charge 43-nC gate charge in <100 ns, enabling high-efficiency variable-speed operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar half-bridge gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC27201D | Higher 4-A peak current; no integrated bootstrap diode; 120-V max HS voltage; 8-pin SOIC package. | Better suited for high-current, high-frequency resonant LLC designs requiring faster slew rates. | Select UCC27201D when gate charge exceeds 60 nC or bootstrap diode can be added externally. |
| IRS21844PbF | Fixed 680-ns dead time; no RDT programming; 600-V max HS voltage; 14-pin PDIP package. | Targeted at higher-voltage industrial inverters where fixed dead time suffices and layout space permits larger package. | Choose IRS21844PbF for cost-sensitive 600-V bridge designs where programmability is unnecessary. |
Compared with UCC27201D and IRS21844PbF, LM5105SDX/NOPB uniquely combines programmable dead time, integrated bootstrap diode, and compact WSON package-making it optimal for space-constrained, medium-voltage (≤100 V) half-bridge applications requiring design flexibility and reduced component count.
Availability
LM5105SDX/NOPB is available at Aetrix Electronics and suitable for motor control systems, isolated DC-DC converters, and industrial motor drives requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LM5105SDX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and power management technologies.
The LM5105SDX/NOPB belongs to TI's high-voltage gate driver product line, engineered specifically for half-bridge and synchronous buck topologies in industrial, automotive, and telecom power systems where reliability, integration, and thermal performance are critical.
FAQ
What is the maximum allowable voltage on the HS pin of the LM5105SDX/NOPB?
The LM5105SDX/NOPB specifies a maximum HS-to-VSS voltage of 100 V under recommended operating conditions. Absolute maximum rating allows transient excursions down to −5 V relative to VSS, provided HS remains ≥ (VDD − 15 V). This enables safe operation in hard-switched topologies with body-diode clamping and controlled negative transients.
How does the RDT pin program dead time in the LM5105SDX/NOPB?
The RDT pin on the LM5105SDX/NOPB accepts a resistor to VSS that sets matched turnon delays for both HO and LO outputs. With RDT = 10 kΩ, dead time is ~80 ns; with RDT = 100 kΩ, it increases to ~570 ns. The internal 3-V bias and 1-mA current limit ensure linear, temperature-stable delay generation across the full resistor range.
Does the LM5105SDX/NOPB require an external bootstrap diode?
No, the LM5105SDX/NOPB integrates a bootstrap diode between VDD and HB pins. Its forward voltage is 0.9 V at 100 µA and 1.1 V at 100 mA, eliminating the need for an external diode and reducing PCB footprint and parasitic inductance in the bootstrap loop.
What thermal performance can be expected from the LM5105SDX/NOPB WSON package?
The LM5105SDX/NOPB in its 10-pin WSON package achieves a junction-to-board thermal resistance (RθJB) of 14.9°C/W when the exposed pad is soldered to a solid copper ground plane. This enables reliable operation at 125°C junction temperature even under continuous 1.8-A peak output current loads.
How does the LM5105SDX/NOPB handle undervoltage conditions on VDD and HB rails?
The LM5105SDX/NOPB implements independent UVLO circuits: VDD UVLO triggers at 6.9 V (0.5-V hysteresis), disabling both outputs; HB UVLO triggers at 6.6 V (0.4-V hysteresis), disabling only HO. This prevents partial drive and ensures safe startup and fault recovery in half-bridge configurations.
LM5105SDX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Half-Bridge
- Channel Type:
- Synchronous
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 8V ~ 14V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.2V
- Current - Peak Output (Source, Sink):
- 1.8A, 1.8A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- 118 V
- Rise / Fall Time (Typ):
- 15ns, 15ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-WSON (4x4)
LM5105SDX/NOPB FAQ
1.How can I place an order for LM5105SDX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5105SDX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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5.How can I obtain technical support or documentation for LM5105SDX/NOPB?
For technical support, including LM5105SDX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5105SDX/NOPB requirements.
6.How does Aetrix verify that LM5105SDX/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5105SDX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5105SDX/NOPB meets industry standards.
7.What is the process for return or replacement of LM5105SDX/NOPB?
All LM5105SDX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5105SDX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5105SDX/NOPB part is unused and in its original packaging.
Return procedure for LM5105SDX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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