Texas Instruments LM5107MAX/NOPB
- Part No.:
- LM5107MAX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LM5107MAX/NOPB.pdf
- Description:
- IC GATE DRVR HALF-BRIDGE 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM5107MAX/NOPB from Texas Instruments is a high-voltage, dual-channel N-channel MOSFET gate driver for half-bridge and synchronous buck topologies, featuring 100-V high-side floating operation, 1.4-A peak sink/1.3-A peak source output current, independent TTL-compatible HI/LI inputs, integrated bootstrap diode, and dual UVLO (VDD and HB–HS). It enables efficient switching in high-frequency DC–DC converters and motor drives.
For engineers reviewing the LM5107MAX/NOPB datasheet, LM5107MAX/NOPB pinout, LM5107MAX/NOPB application, or LM5107MAX/NOPB equivalent, this page delivers verified technical context, real-world timing and drive capability data, package-specific thermal metrics, functional pin mapping, and validated alternative options for high-side/low-side gate drive design.
Technical Context
The LM5107MAX/NOPB implements a robust level-shifting architecture to translate TTL-level control signals (HI/LI) into high-side gate drive referenced to the HS node, enabling reliable operation up to 100 V on the HS rail. Its integrated bootstrap diode supports self-biased high-side drive with ≤1.1-V forward drop at 100 mA and 105-ns turn-off time.
UVLO protection operates independently on VDD (6.9-V rising threshold, 0.5-V hysteresis) and HB–HS (6.6-V rising threshold, 0.4-V hysteresis), ensuring safe startup and fault recovery. Propagation delays are tightly matched-≤2 ns typical between high-side and low-side turn-on/off-with 15-ns rise/fall times into 1000-pF loads.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| High-Side Voltage Rating | 100 V max HS-to-VSS; enables use with 80-V bus systems and wide-input industrial DC–DC stages |
| Peak Output Current | 1.4-A sink / 1.3-A source per channel; sufficient to charge/discharge >1000-pF gate capacitances at ≥500-kHz switching |
| Propagation Delay | 27–56 ns typical; ensures precise timing alignment between high-side and low-side FETs in phase-shifted topologies |
| Delay Matching | 2–15 ns typical; minimizes shoot-through risk during dead-time transitions in half-bridge configurations |
| Bootstrap Diode VF | 0.9 V typical at 100 µA, 1.1 V max at 100 mA; reduces voltage loss and power dissipation in bootstrap charging path |
| UVLO Thresholds | VDD: 6.9 V (±0.5 V hysteresis); HB–HS: 6.6 V (±0.4 V hysteresis); prevents erratic switching during brownout or startup |
| Rise/Fall Time | 15 ns typical into 1000-pF load; supports fast edge rates required for high-efficiency GaN/SiC-compatible designs |
Pinout & Package
LM5107MAX/NOPB is packaged in an 8-pin SOIC (4.90 mm × 3.91 mm) with standard pinout and thermal pad not present. Pin functions are electrically validated per TI SNVS333F Rev F.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pin 1) | Low-side gate drive supply input | Provides bias for LO stage and internal logic; must be decoupled locally with ≤1-µF X7R ceramic capacitor |
| HI (Pin 2) | High-side control input | TTL-compatible (0.8–1.8 V low, 1.8–2.2 V high); unused HI must be tied to VSS to prevent floating |
| LI (Pin 3) | Low-side control input | TTL-compatible input; independent of HI, enabling asymmetric PWM or external dead-time insertion |
| VSS (Pin 4) | Ground reference | Common return for LI, LO, and internal logic; requires low-inductance connection to PCB ground plane |
| LO (Pin 5) | Low-side gate driver output | Drives gate of low-side N-MOSFET; referenced to VSS; capable of 1.4-A pulldown/1.3-A pullup |
| HS (Pin 6) | High-side source node | Connects to source of high-side N-MOSFET and negative terminal of bootstrap capacitor; floats up to 100 V |
| HO (Pin 7) | High-side gate driver output | Drives gate of high-side N-MOSFET; referenced to HS; outputs swing between HS and HB rails |
| HB (Pin 8) | High-side bootstrap supply rail | Connects to positive terminal of bootstrap capacitor; supports up to 118-V DC; powers HO stage via internal diode |
Key Features
| Feature | Design Value |
|---|---|
| Integrated bootstrap diode | Eliminates external diode requirement; rated for 100-mA continuous forward current with 105-ns reverse recovery |
| Independent TTL-compatible inputs | Enables direct interface with microcontrollers, DSPs, or PWM controllers without level-shifting circuitry |
| Dual independent UVLO | Prevents partial drive activation: VDD UVLO disables both outputs; HB–HS UVLO disables only HO |
| Fast propagation matching | 2-ns typical delay mismatch between HI→HO and LI→LO ensures tight dead-time control and shoot-through immunity |
| 100-V high-side capability | Supports industrial 48-V, 60-V, and telecom 72-V bus architectures without external level-shifting components |
Applications
| Current-Fed Push-Pull Converters | Half-Bridge Power Converters |
|---|---|
Use Scenario: Isolated DC–DC conversion in telecom rectifiers where transformer leakage inductance supplies resonant energy. IC Role / Device Role / Timing Role: Gate driver for complementary N-MOSFET pairs; provides independent HI/LI control to manage zero-voltage switching transitions. Use Value: Integrated bootstrap diode and 100-V HS rating allow direct drive of high-side FETs without auxiliary winding or charge pump. |
Use Scenario: High-efficiency 48-V input to 12-V output converter in server power supplies. IC Role / Device Role / Timing Role: Dual-channel gate driver enabling synchronous rectification; HO/LO outputs precisely timed to minimize conduction and switching losses. Use Value: 15-ns rise/fall times and 2-ns delay matching reduce overlap time, cutting shoot-through current by >30% vs. discrete buffer solutions. |
| Solid-State Motor Drives | Two-Switch Forward Converters |
Use Scenario: 24–48-V BLDC motor inverters in industrial automation requiring compact, thermally efficient gate drive. IC Role / Device Role / Timing Role: Half-bridge driver controlling upper/lower leg FETs per phase; HI/LI inputs accept PWM signals from MCU timers. Use Value: SOIC package with 109.6°C/W θJA enables operation at 125°C junction temperature without heatsink in forced-air environments. |
Use Scenario: 36–75-V input isolated DC–DC for industrial PLC I/O modules with strict EMI and efficiency requirements. IC Role / Device Role / Timing Role: Gate driver for primary-side switches; leverages bootstrap topology to eliminate auxiliary bias winding. Use Value: 6.6-V HB UVLO threshold ensures reliable restart after transient overloads without latch-up or false triggering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage half-bridge gate drive applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC27201DR | Higher 4-A peak output, 12-V VDD max, no integrated bootstrap diode, 5-mm × 6-mm SOIC | Requires external bootstrap diode and higher gate drive current headroom; better suited for SiC/GaN with fast dV/dt | Select when >2-A peak current or <10-ns propagation is required; verify external diode selection for 100-V HS operation |
| IRS2004PBF | 100-V HS rating, 2.5-A peak, no integrated bootstrap diode, 8-pin PDIP/SOIC, 100-ns propagation | Lacks integrated bootstrap diode and has slower timing; requires external HV diode and larger layout area | Choose for cost-sensitive legacy designs where external diode integration is acceptable and timing margin is >50 ns |
Compared with UCC27201DR and IRS2004PBF, LM5107MAX/NOPB offers the only combination of integrated bootstrap diode, sub-30-ns propagation, and 100-V HS rating in an industry-standard SOIC-8, reducing BOM count and layout complexity for mid-power industrial converters.
Availability
LM5107MAX/NOPB is available at Aetrix Electronics and suitable for current-fed push-pull converters, half-bridge power converters, and solid-state motor drives requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LM5107MAX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with deep expertise in power management ICs and high-reliability industrial components.
The LM5107MAX/NOPB belongs to TI's high-voltage gate driver product line, engineered specifically for efficient, robust control of N-channel MOSFETs in half-bridge, synchronous buck, and isolated forward topologies across industrial, telecom, and motor control applications.
FAQ
What is the maximum allowable voltage on the HS pin of the LM5107MAX/NOPB?
The LM5107MAX/NOPB specifies a maximum HS-to-VSS voltage of 100 V under recommended operating conditions. Absolute maximum rating allows −5 V to +100 V, but sustained operation above 100 V risks damage. The HS node is typically clamped by the body diode of the low-side MOSFET, limiting negative transients to −1 V; however, board parasitics may cause brief excursions - never exceed VDD − 15 V in such cases. LM5107MAX/NOPB must be used with appropriate snubbing and layout practices to maintain HS within spec.
Does the LM5107MAX/NOPB require an external bootstrap diode?
No, the LM5107MAX/NOPB integrates a high-voltage bootstrap diode between VDD and HB pins, eliminating the need for an external diode in most applications. This diode supports up to 100 mA continuous forward current with 0.9-V typical forward voltage at low current and 1.1-V max at 100 mA. An external diode may be added in parallel for high-frequency (>1 MHz) or high-capacitance (>2200 pF) gate drive scenarios to reduce internal power dissipation. LM5107MAX/NOPB's internal diode simplifies layout and reduces component count.
How does the UVLO function differ between the VDD and HB rails in the LM5107MAX/NOPB?
The LM5107MAX/NOPB implements two independent UVLO circuits: one monitors VDD–VSS (threshold 6.9 V, 0.5-V hysteresis), disabling both HO and LO outputs until valid supply is present; the other monitors HB–HS (threshold 6.6 V, 0.4-V hysteresis), disabling only HO while LO remains operational. This separation ensures safe high-side shutdown during bootstrap capacitor discharge while preserving low-side control for fault handling or soft-start sequencing. LM5107MAX/NOPB thus avoids unintended high-side turn-on during brownout conditions.
What is the recommended minimum input pulse width for reliable switching of the LM5107MAX/NOPB?
The LM5107MAX/NOPB specifies a minimum input pulse width of 50 ns for both HI and LI inputs to guarantee corresponding LO/HO output transitions. This value accounts for internal logic propagation and noise immunity margins. Pulses narrower than 50 ns may result in incomplete output state changes or metastability, especially near temperature extremes (−40°C to +125°C). For robust operation in noisy environments or with fast digital controllers, maintain ≥100-ns pulse width. LM5107MAX/NOPB's timing is validated across full temperature and voltage ranges per SNVS333F Rev F.
Can the LM5107MAX/NOPB drive both high-side and low-side MOSFETs simultaneously in a synchronous buck configuration?
Yes, the LM5107MAX/NOPB is explicitly designed for synchronous buck and half-bridge topologies, with independent HI and LI inputs allowing full control of high-side and low-side N-channel MOSFETs. Its 2-ns typical propagation delay matching between HI→HO and LI→LO minimizes shoot-through risk, and its 1.4-A peak pulldown/1.3-A peak pullup current supports gate charges up to 43 nC at 100 kHz. LM5107MAX/NOPB enables true synchronous rectification without external logic or dead-time generators in standard buck regulator implementations.
LM5107MAX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Half-Bridge
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 8V ~ 14V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.2V
- Current - Peak Output (Source, Sink):
- 1.3A, 1.4A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- 118 V
- Rise / Fall Time (Typ):
- 15ns, 15ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LM5107MAX/NOPB FAQ
1.How can I place an order for LM5107MAX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5107MAX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5107MAX/NOPB reliable?
The price and inventory of LM5107MAX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5107MAX/NOPB is usually 5 days.
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Once your LM5107MAX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5107MAX/NOPB?
For technical support, including LM5107MAX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5107MAX/NOPB requirements.
6.How does Aetrix verify that LM5107MAX/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5107MAX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5107MAX/NOPB meets industry standards.
7.What is the process for return or replacement of LM5107MAX/NOPB?
All LM5107MAX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5107MAX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5107MAX/NOPB part is unused and in its original packaging.
Return procedure for LM5107MAX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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