Texas Instruments LM5107SD/NOPB
- Part No.:
- LM5107SD/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 8-WDFN Exposed Pad
- Datasheet:
-
LM5107SD/NOPB.pdf
- Description:
- IC GATE DRVR HALF-BRIDGE 8WSON
- Quantity:
- Payment:

- Shipping:

Inventory:4,347
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LM5107SD/NOPB from Texas Instruments is a high-voltage, dual-channel, independent TTL-compatible gate driver IC designed to control high-side and low-side N-channel MOSFETs in half-bridge and synchronous buck topologies. It delivers 1.4-A peak sink / 1.3-A peak source output current, supports bootstrap supply up to 118 V DC, features 27-ns typical propagation delay, and integrates a high-voltage bootstrap diode - enabling robust 100-V rail operation in motor drives and isolated DC-DC converters.
For engineers reviewing the LM5107SD/NOPB datasheet, LM5107SD/NOPB pinout, LM5107SD/NOPB application, or LM5107SD/NOPB equivalent, key selection considerations include its independent HI/LI logic control, UVLO on both VDD and HB rails, 15-ns rise/fall times into 1000-pF load, and SOIC-8 package compatibility with thermal design constraints for industrial power stages.
Technical Context
The LM5107SD/NOPB implements a robust level-shifting architecture to drive the floating high-side output (HO) referenced to the HS node, enabling clean, matched switching transitions between HO and LO despite >100-V HS voltage swings. Its integrated bootstrap diode (VDH = 0.82–1.1 V at 100 mA) eliminates external diode requirements while maintaining fast turn-off (tBS = 105 ns) and low dynamic resistance (RD = 0.8–1.5 Ω).
UVLO protection operates independently on VDD (6.9-V rising threshold, 0.5-V hysteresis) and HB (6.6-V rising threshold, 0.4-V hysteresis), ensuring safe startup and fault recovery. Propagation delay matching between high- and low-side paths is tightly controlled (tMON/tMOFF ≤ 2 ns typical), critical for minimizing shoot-through risk in high-frequency bridge designs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Output Current | 1.4-A peak pulldown / 1.3-A peak pullup - sufficient to rapidly charge/discharge ≥1000-pF gate capacitances at high switching frequencies. |
| Bootstrap Voltage Range | HB to HS: 8–14 V nominal - enables reliable high-side gate drive across wide input voltage ranges in buck/half-bridge converters. |
| Propagation Delay | 27–56 ns (typical 27 ns) - ensures sub-50-ns timing precision for PWM frequencies up to 1 MHz with tight dead-time control. |
| Delay Matching | ≤2 ns typical (tMON/tMOFF) - minimizes overlap between HO/LO transitions, reducing shoot-through risk without requiring external dead-time circuitry. |
| UVLO Thresholds | VDD: 6.9 V (±0.5 V hysteresis); HB: 6.6 V (±0.4 V hysteresis) - prevents erratic switching during brown-out or bootstrap capacitor discharge events. |
| Rise/Fall Time | 15 ns into 1000-pF load - supports efficient switching of medium-power MOSFETs with reduced EMI and conduction losses. |
| Supply Voltage Range | VDD: 8–14 V; HS: −1 V to 100 V - allows direct integration into 12-V control rails driving 100-V bus applications like motor inverters. |
Pinout & Package
LM5107SD/NOPB is housed in an 8-pin SOIC package (4.90 mm × 3.91 mm body size) with standard lead pitch and exposed thermal pad not present - thermal management relies on PCB copper area under the package per TI's layout guidelines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pin 1) | Low-side gate drive supply | Primary bias rail for LI input, LO output, and internal logic; must be locally decoupled with low-ESR capacitor near pin. |
| HI (Pin 2) | High-side input control | TTL-compatible (VIH = 1.8–2.2 V); unused HI must be tied to VSS to prevent floating logic states. |
| LI (Pin 3) | Low-side input control | TTL-compatible (VIL = 0.8–1.8 V); independent of HI - enables asymmetric or phase-shifted drive schemes. |
| VSS (Pin 4) | Ground reference | Common return for LI, HI, LO, and internal circuitry; must connect to low-impedance system ground plane. |
| LO (Pin 5) | Low-side gate driver output | Drives gate of low-side N-MOSFET referenced to VSS; capable of 1.4-A sink / 1.3-A source into capacitive loads. |
| HS (Pin 6) | High-side source node | Connects to source of high-side MOSFET and negative terminal of bootstrap capacitor; floats up to 100 V above VSS. |
| HO (Pin 7) | High-side gate driver output | Drives gate of high-side N-MOSFET referenced to HS; output swing is VHB–VHS (not VDD–VSS). |
| HB (Pin 8) | High-side bootstrap supply rail | Connects to positive terminal of bootstrap capacitor; supplies gate drive for HO; rated to 118 V DC maximum. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Bootstrap Diode | Eliminates external diode requirement; 100-mA forward drop of 0.82–1.1 V enables compact, cost-optimized high-side biasing. |
| Independent TTL Inputs | HI and LI accept standard 3.3-V/5-V logic signals with defined VIH/VIL thresholds - simplifies interface with microcontrollers and PWM controllers. |
| Dual Independent UVLO | Separate lockout on VDD and HB rails ensures safe operation even if bootstrap capacitor fails to recharge - prevents partial high-side activation. |
| Level-Shifter Propagation Matching | 2-ns typical delay mismatch between HO and LO paths - reduces need for external dead-time insertion and improves efficiency in bridge topologies. |
| 100-V High-Side Capability | HS pin rated to −1 V to +100 V; enables use in 48-V, 60-V, and 100-V bus systems including solid-state motor drives and telecom power supplies. |
Applications
| Current-Fed Push-Pull Converters | Half-Bridge Power Converters |
|---|---|
Use Scenario: High-efficiency isolated DC-DC conversion in telecom and server PSUs using push-pull topology with center-tapped transformer. IC Role / Device Role / Timing Role: Gate driver controlling complementary N-MOSFET pairs on primary side; HO/LO independently timed to avoid cross-conduction. Use Value: Integrated bootstrap diode and 100-V HS rating eliminate external components and support 48-V input operation with minimal BOM count. |
Use Scenario: Medium-power DC-AC inverter stage in UPS or solar microinverters operating from 30–100-V DC bus. IC Role / Device Role / Timing Role: Dual-output driver providing synchronized, matched-edge switching for upper/lower legs with programmable dead time via controller. Use Value: 2-ns propagation matching and 15-ns edge rates reduce switching losses and EMI in 100-kHz–500-kHz bridge designs. |
| Solid-State Motor Drives | Two-Switch Forward Converters |
Use Scenario: Brushless DC motor control in industrial actuators where compact size and thermal reliability are critical. IC Role / Device Role / Timing Role: Half-bridge driver for each phase leg; HI/LI inputs driven by MCU PWM with independent enable/disable capability. Use Value: SOIC-8 package with proven thermal performance (RθJA = 109.6°C/W) supports continuous 1.3-A gate drive without heatsinking in 70°C ambient. |
Use Scenario: High-voltage auxiliary power supply in industrial PLCs using two-switch forward topology for 24-V/48-V outputs. IC Role / Device Role / Timing Role: Controls synchronous rectification or primary-side switches; leverages HB rail for self-biased high-side drive. Use Value: Bootstrap supply voltage up to 118 V DC enables operation with wide input transients (e.g., 100-V surges) without auxiliary bias winding. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage half-bridge gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC27201D | Higher 4-A peak output, 12-V max VDD, no integrated bootstrap diode, WSON-8 only | Requires external bootstrap diode; better suited for high-current, low-inductance layouts where thermal density is managed | Select when >2-A gate drive or enhanced thermal performance (RθJB = 15.9°C/W) is required and board space allows external diode |
| IRS21844PbF | 100-V HS rating, 2.5-A peak, no integrated bootstrap diode, 14-V max VDD, SOIC-8 | Lacks on-chip bootstrap diode; requires external diode and larger bootstrap capacitor due to higher quiescent HB current | Choose when legacy compatibility with IR's pinout and timing behavior is needed, and external diode placement is acceptable |
Compared with UCC27201D and IRS21844PbF, LM5107SD/NOPB offers unique integration of the bootstrap diode in SOIC-8, lower gate drive current (1.4 A vs 2.5–4 A), and tighter propagation matching (2 ns vs 5–10 ns), making it optimal for cost-sensitive, space-constrained 100-V half-bridge designs where component count reduction is prioritized over ultra-high peak current.
Availability
LM5107SD/NOPB is available at Aetrix Electronics and suitable for current-fed push-pull converters, half-bridge power converters, and solid-state motor drives requiring stable component supply, long-term industrial lifecycle support, and RoHS-compliant sourcing.
Supply support for LM5107SD/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets since 1930.
The LM5107SD/NOPB belongs to TI's high-voltage gate driver product line, engineered specifically for cost-effective, reliable control of N-channel MOSFETs in half-bridge, synchronous buck, and isolated DC-DC topologies - emphasizing integration, thermal robustness, and ease of use in power supply design.
FAQ
What is the maximum bootstrap supply voltage supported by the LM5107SD/NOPB?
The LM5107SD/NOPB supports a maximum HB-to-HS voltage of 18 V per absolute ratings, but its recommended operating range is VHB = VHS + 8 V to VHS + 14 V. The device's bootstrap supply can reach up to 118 V DC relative to VSS, enabling use in high-voltage bus applications - this value reflects the maximum voltage the HB pin can withstand, not the functional drive voltage.
Does the LM5107SD/NOPB require an external bootstrap diode?
No, the LM5107SD/NOPB integrates a high-voltage bootstrap diode with 100-mA forward current capability and 0.82–1.1 V forward voltage drop. This eliminates the need for an external diode in most applications, reducing BOM count and PCB area - though an external diode may be added in high-frequency, high-capacitance designs to reduce internal power dissipation.
What are the UVLO thresholds for VDD and HB in the LM5107SD/NOPB?
The LM5107SD/NOPB features dual independent UVLO circuits: VDD rising threshold is 6.9 V (with 0.5-V hysteresis), and HB rising threshold is 6.6 V (with 0.4-V hysteresis). These thresholds ensure the low-side driver remains disabled until VDD is stable, and the high-side driver is inhibited if the bootstrap capacitor voltage falls below safe operating levels - preventing erratic gate drive.
Can the LM5107SD/NOPB drive both high-side and low-side MOSFETs simultaneously in a full-bridge configuration?
Yes, the LM5107SD/NOPB can drive one half-bridge leg (one high-side and one low-side MOSFET) in a full-bridge configuration. To implement a full bridge, two LM5107SD/NOPB devices are required - one per leg - because each IC controls only a single high-side and low-side pair with independent HI/LI inputs and separate HB/HS rails.
What is the thermal resistance (RθJA) of the LM5107SD/NOPB in SOIC-8 package?
The LM5107SD/NOPB in SOIC-8 (D package) has a junction-to-ambient thermal resistance (RθJA) of 109.6°C/W under standard JEDEC test conditions (single-layer 1-in² copper pad). This value assumes proper PCB layout with adequate copper pour; actual thermal performance improves significantly with increased copper area and multiple vias to inner ground planes.
LM5107SD/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Half-Bridge
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 8V ~ 14V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.2V
- Current - Peak Output (Source, Sink):
- 1.3A, 1.4A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- 118 V
- Rise / Fall Time (Typ):
- 15ns, 15ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WSON (4x4)
LM5107SD/NOPB FAQ
1.How can I place an order for LM5107SD/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5107SD/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5107SD/NOPB reliable?
The price and inventory of LM5107SD/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5107SD/NOPB is usually 5 days.
3.What payment methods are accepted for LM5107SD/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM5107SD/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM5107SD/NOPB?
LM5107SD/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM5107SD/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5107SD/NOPB?
For technical support, including LM5107SD/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5107SD/NOPB requirements.
6.How does Aetrix verify that LM5107SD/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5107SD/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5107SD/NOPB meets industry standards.
7.What is the process for return or replacement of LM5107SD/NOPB?
All LM5107SD/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5107SD/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5107SD/NOPB part is unused and in its original packaging.
Return procedure for LM5107SD/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LM5107SD/NOPB Tags

-
ZXGD3009E6TA
Diodes Incorporated

-
1EDN7512BXTSA1
Infineon Technologies
-
UCC27517DBVR
Texas Instruments

-
MCP1416T-E/OT
Microchip Technology

-
MCP1402T-E/OT
Microchip Technology

-
MCP1415T-E/OT
Microchip Technology

-
MCP1401T-E/OT
Microchip Technology

-
IX4428NTR
Littelfuse Inc.

-
IRS2005STRPBF
Infineon Technologies

-
IRS2008STRPBF
Infineon Technologies

-
IX4310TTR
Littelfuse Inc.

-
2EDN7524RXTMA1
Infineon Technologies
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

