Texas Instruments LM5109ASD/NOPB

Overview

LM5109ASD/NOPB from Texas Instruments is a high-voltage, 1A peak half-bridge gate driver IC designed to independently control high-side and low-side N-channel MOSFETs in synchronous buck and half-bridge topologies. It delivers 1.0A sink/source output current, supports bootstrap supply up to 108V DC, achieves 30ns typical propagation delay, and features TTL-compatible inputs. It is used in high-efficiency DC-DC converters requiring robust level-shifting and fast switching.

For engineers reviewing the LM5109ASD/NOPB datasheet, LM5109ASD/NOPB pinout, LM5109ASD/NOPB application, or LM5109ASD/NOPB equivalent, key selection criteria include high-side floating operation up to 90V HS voltage, independent HI/LI control logic, UVLO on both VDD and HB–HS rails, 15ns rise/fall times into 1000pF, and thermal performance in WSON-8 (4.0×4.0mm) or SOIC-8 packages.

Technical Context

The LM5109ASD/NOPB integrates a robust high-speed level shifter enabling clean signal translation from ground-referenced logic (HI/LI) to the floating high-side driver referenced to the HS node. Its dual UVLO circuitry independently monitors VDD (6.7V rising threshold) and HB–HS (6.6V rising threshold), ensuring safe startup and fault isolation.

It operates in normal mode when both supplies exceed UVLO thresholds, with HO/LO outputs strictly following HI/LI states per the truth table; floating inputs default to low outputs. The output stages deliver matched 1.0A peak drive capability with <2ns typical delay matching between high- and low-side paths.

Key Specifications

Pinout & Package

LM5109ASD/NOPB is available in thermally enhanced WSON-8 (4.00 mm × 4.00 mm) package with exposed thermal pad. The pad must be soldered to PCB ground plane for optimal thermal performance (R_θJB = 19.3°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage half-bridge gate driver applications.

Compared with LM5109MX/NOPB, LM5109ASD/NOPB offers superior thermal performance in WSON-8 for high-power density designs; compared with UCC27201DR, it uniquely supports 90V HS operation and 108V bootstrap rails - making it irreplaceable in industrial and telecom 48V+ half-bridge converters.

Availability

LM5109ASD/NOPB is available at Aetrix Electronics and suitable for current-fed push-pull converters, half-bridge power converters, and solid-state motor drives requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for LM5109ASD/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and power management technologies, with over 90 years of innovation in high-reliability analog ICs.

The LM5109A product line delivers cost-effective, high-voltage gate drivers optimized for efficiency-critical power conversion in industrial, telecom, and computing applications - emphasizing robustness, thermal performance, and ease of integration in half-bridge and synchronous buck topologies.

FAQ

What is the maximum allowable HS voltage relative to VSS for LM5109ASD/NOPB?

The absolute maximum HS-to-VSS voltage for LM5109ASD/NOPB is 90V, as specified in the Absolute Maximum Ratings table. This defines the upper limit for the high-side MOSFET source node swing in half-bridge operation. Exceeding this voltage risks permanent damage. The device's level shifter and UVLO circuitry are validated for reliable operation up to this 90V HS rating, and the HB rail supports up to 108V relative to VSS to maintain sufficient gate drive margin.

Does LM5109ASD/NOPB require external bootstrap diodes, and why?

Yes, LM5109ASD/NOPB requires an external bootstrap diode connected between VDD and HB. The diode charges the bootstrap capacitor during low-side conduction, replenishing charge lost due to high-side driver quiescent current (IHBS) and gate charge delivery. TI recommends fast-recovery or Schottky diodes with low forward voltage (e.g., 1V) and low reverse recovery charge to minimize losses and prevent voltage droop below the HB UVLO threshold (6.6V). The LM5109ASD/NOPB itself does not integrate this diode.

How does the UVLO protection work on the HB rail of LM5109ASD/NOPB?

The LM5109ASD/NOPB implements independent UVLO on the HB rail by monitoring the voltage difference between HB and HS (VHB – VHS). When this differential falls below 5.7V (typical rising threshold), the high-side output (HO) is disabled while the low-side output (LO) remains functional. This prevents weak or incomplete turn-on of the high-side MOSFET, which could cause shoot-through or excessive conduction loss. The hysteresis is 0.4V, ensuring stable re-enablement once the bootstrap capacitor recovers.

Can LM5109ASD/NOPB drive P-channel MOSFETs on the high side?

No, LM5109ASD/NOPB is specifically designed to drive N-channel MOSFETs on both high-side and low-side positions. Its high-side driver architecture relies on a floating bootstrap supply referenced to the HS node and delivers a gate voltage relative to HS - ideal for turning on N-MOSFETs. Driving a P-MOSFET would require gate voltage *below* the source (HS), which LM5109ASD/NOPB cannot produce. Using it with P-MOSFETs would result in incorrect or non-functional gate drive.

What is the recommended minimum bootstrap capacitor value for LM5109ASD/NOPB at 500kHz operation?

For 500kHz operation with a 17nC gate charge MOSFET and 10V VDD, TI's design example specifies a minimum calculated C_BOOT of 7.6nF. However, due to leakage, duty-cycle variation, and transient load conditions, the recommended practical value is 100nF ceramic (X7R dielectric) placed directly across HB and HS pins. This ensures the HB–HS voltage remains above the 6.6V UVLO threshold across all operating conditions and provides margin for pulse-skipping events in real-world converters.