Texas Instruments LM5110-2M/NOPB
- Part No.:
- LM5110-2M/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LM5110-2M/NOPB.pdf
- Description:
- IC GATE DRVR LOW-SIDE 8SOIC
- Quantity:
- Payment:

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Product details
Overview
LM5110-2M/NOPB from Texas Instruments is a dual inverting gate driver IC designed to independently drive two N-channel MOSFETs in high-frequency switch-mode power supplies. It delivers 5-A sink / 3-A source peak current per channel, supports negative output voltage swing (VEE down to −4 V relative to IN_REF), and features 25-ns typical propagation delay with 14-ns rise/12-ns fall times into 2-nF load - enabling robust synchronous rectification and fast-switching topologies.
For engineers reviewing the LM5110-2M/NOPB datasheet, LM5110-2M/NOPB pinout, LM5110-2M/NOPB application, or LM5110-2M/NOPB equivalent, key selection criteria include dual inverting logic configuration, compound MOS/bipolar output stage for stable drive across temperature/voltage, dedicated IN_REF and VEE pins for split-supply operation, and SOIC-8 package compatibility with industry-standard gate drivers.
Technical Context
The LM5110-2M/NOPB implements two identical, independently controlled inverting totem-pole output stages, each combining parallel MOS and bipolar transistors to maintain consistent 5-A sink/3-A source capability over −40°C to +125°C and 3.5–14-V VCC–VEE range. Its level-shifting architecture isolates input logic (referenced to IN_REF) from output drive rails (swinging between VCC and VEE), enabling true negative gate bias for enhanced MOSFET turn-off reliability.
It integrates TTL-compatible inputs with 0.8-V low / 2.2-V high thresholds, undervoltage lockout (2.9-V enable threshold with 230-mV hysteresis), and a dedicated shutdown pin (nSHDN) that reduces supply current to ≤25 µA. Pin 1 (IN_REF) is a functional ground reference - not NC - enabling single- or split-supply configurations without layout compromise.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC–VEE Range | 3.5 V to 14 V - sets usable gate-drive voltage window for N-MOSFETs with margin below 15-V absolute max |
| Peak Sink/Source Current | 5 A sink / 3 A source per channel - drives large gate capacitances (e.g., >5 nF) at high dV/dt without droop |
| Propagation Delay | 25 ns typical (IN to OUT) - enables <50-ns timing margins in 1–2 MHz SMPS designs |
| Rise/Fall Time | 14 ns / 12 ns into 2-nF load - minimizes switching losses in hard-switched converters |
| Input Thresholds | VIL = 0.8 V, VIH = 2.2 V - compatible with 3.3-V and 5-V controllers without level shifters |
| UVLO Threshold | 2.9 V rising (230-mV hysteresis) - prevents erratic operation during brownout or startup |
| Shutdown Current | ≤25 µA - enables low-power fault recovery or burst-mode control |
Pinout & Package
LM5110-2M/NOPB is housed in an SOIC-8 package (4.90 mm × 3.91 mm) with exposed pad thermal enhancement. Pin 1 is IN_REF - a functional input ground reference, not NC - critical for split-supply operation and pin-compatibility with legacy drivers when tied to VEE.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN_REF) | Input Ground Reference | Reference node for all logic inputs; connects to controller ground in split-supply mode or to VEE in single-supply mode |
| 2 (IN_A) | Inverting Logic Input A | TTL-compatible input; drives OUT_A low when high, high when low - no internal pullup/pulldown |
| 3 (VEE) | Output Power Ground | Sinks output current; may be biased negative (≤−4 V vs IN_REF) to apply negative VGS for reliable MOSFET turnoff |
| 4 (IN_B) | Inverting Logic Input B | Independent TTL input identical to IN_A; enables asynchronous or complementary control of second MOSFET |
| 5 (SHDN) | Active-Low Shutdown | Pulled low (<1.5 V) disables both outputs; internal 18-µA pullup to VCC ensures safe default-on state |
| 6 (OUT_A) | Inverting Output A | Drives external MOSFET gate from VCC to VEE; 5-A sink/3-A source capability supports fast turn-on/turn-off |
| 7 (OUT_B) | Inverting Output B | Electrically identical to OUT_A; channels can be paralleled (inputs/outputs shorted) to deliver 10-A sink/6-A source |
| 8 (VCC) | Positive Supply Rail | Bias supply for output stage; requires local 100-nF + 220-nF ceramic decoupling to IN_REF and VEE |
Key Features
| Feature | Design Value |
|---|---|
| Dual Inverting Configuration | Both outputs invert input logic - simplifies dead-time control in synchronous buck or half-bridge topologies without external inverters |
| Compound MOS/Bipolar Outputs | MOS devices provide rail-to-rail swing; bipolar devices deliver high peak current near VGS(th), reducing drive variation across temp/voltage |
| Negative Output Voltage Capability | VEE can be −4 V relative to IN_REF - applies negative gate bias to suppress Miller-induced shoot-through and improve noise immunity |
| Parallel Operation Support | IN_A/IN_B and OUT_A/OUT_B can be shorted on PCB to double drive strength (10-A sink/6-A source) with <1% efficiency penalty |
| Dedicated IN_REF Pin | Enables clean separation of logic and power grounds - eliminates ground bounce coupling between controller and MOSFET gate paths |
Applications
| Synchronous Rectifier Gate Driver | High-Frequency SMPS Gate Driver |
|---|---|
Use Scenario: Driving low-RDS(on) N-channel MOSFETs as synchronous rectifiers in isolated DC-DC converters operating at 300–1000 kHz. IC Role / Device Role / Timing Role: Dual inverting driver provides precise, high-current gate control synchronized to primary-side PWM; negative VGS ensures fast, noise-immune turnoff during reverse recovery. Use Value: Reduces conduction losses by enabling efficient N-MOSFET use instead of Schottky diodes; 5-A sink current rapidly discharges gate capacitance to minimize body-diode conduction time. | Use Scenario: Replacing discrete buffer stages in 1–2 MHz LLC resonant or active-clamp forward converters requiring fast, high-current gate drive. IC Role / Device Role / Timing Role: Gate driver interfaces between digital PWM controller (3.3 V/5 V) and power MOSFETs; compound output stage maintains consistent edge speed across wide VCC and temperature ranges. Use Value: 14-ns rise time and 25-ns propagation delay support tight timing margins; SOIC-8 footprint allows drop-in replacement of legacy drivers without board rework. |
| Solenoid/Motor Driver Interface | Isolated Half-Bridge Gate Driver |
Use Scenario: Controlling high-side and low-side N-MOSFETs in brushed DC motor H-bridges or solenoid drivers where bidirectional current and fast turnoff are critical. IC Role / Device Role / Timing Role: Dual inverting outputs drive complementary gate signals; independent inputs allow flexible PWM/enable sequencing; VEE referenced to motor return path enables negative turnoff bias. Use Value: 5-A sink current ensures rapid MOSFET turnoff under inductive kickback; shutdown pin enables safe current-limiting fault response without software intervention. | Use Scenario: Driving floating high-side and grounded low-side N-MOSFETs in isolated half-bridge inverters (e.g., gate-drive transformers or opto-isolated control). IC Role / Device Role / Timing Role: Provides matched propagation delays and rail-to-rail output swing; IN_REF referenced to isolated controller ground; VEE tied to low-side source enables negative bias for high-side MOSFET turnoff. Use Value: Identical channel timing minimizes shoot-through risk; negative VGS capability improves high-side MOSFET reliability under high dv/dt conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual inverting gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5110-2SD/NOPB | Same dual inverting function but in thermally enhanced WSON-10 (4 mm × 4 mm); RθJA = 40.1°C/W vs 114°C/W for SOIC-8 | Preferred for high-power density or thermally constrained layouts; requires different PCB footprint and reflow profile | Select when thermal performance > package compatibility; not pin-to-pin with LM5110-2M/NOPB |
| UCC27524ADRV | Dual inverting driver with 5-A sink/5-A source, 17-ns rise time, but no negative VEE capability; VSS must be tied to GND | Lacks negative gate bias - unsuitable for noise-sensitive or high-dv/dt applications requiring robust turnoff | Choose only if negative VGS is unnecessary and higher source current is prioritized |
Compared with LM5110-2SD/NOPB, LM5110-2M/NOPB trades thermal performance for SOIC-8 compatibility and ease of prototyping; versus UCC27524ADRV, it uniquely enables negative VGS bias for improved reliability in high-noise environments - a distinction critical for synchronous rectification and isolated half-bridge designs.
Availability
LM5110-2M/NOPB is available at Aetrix Electronics and suitable for synchronous rectifier gate drivers, high-frequency switch-mode power supplies, and solenoid/motor control systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LM5110-2M/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and power applications.
The LM5110 family was engineered specifically for high-efficiency, high-frequency power conversion - emphasizing robust gate drive, thermal resilience, and flexibility in single- or split-supply configurations for SMPS, synchronous rectification, and motor control.
FAQ
What logic configuration does the LM5110-2M/NOPB implement?
The LM5110-2M/NOPB implements dual inverting logic: a high input drives the corresponding output low, and a low input drives it high. This configuration is explicitly defined in TI's device options table and matches the "LM5110-2" part number suffix. Unlike LM5110-1 (dual noninverting) or LM5110-3 (mixed), the LM5110-2M/NOPB requires no external inverters for complementary gate drive in buck or half-bridge topologies.
Can the LM5110-2M/NOPB drive MOSFET gates with negative voltage?
Yes. The LM5110-2M/NOPB supports negative gate drive by referencing its outputs (OUT_A/OUT_B) to VEE, which can be biased up to −4 V relative to IN_REF. This enables true negative VGS during MOSFET turnoff - a documented feature used to suppress Miller-induced shoot-through and improve noise immunity in high-dv/dt applications like synchronous rectification.
What is the maximum recommended capacitive load for the LM5110-2M/NOPB?
The LM5110-2M/NOPB is characterized for 2-nF loads in its switching specifications (14-ns rise/12-ns fall times), and typical performance curves extend to 2200 pF. While not explicitly rated for >5-nF loads, its 5-A sink/3-A source capability allows driving larger gate capacitances - however, rise/fall times will scale linearly with CLOAD, and layout parasitics become critical above ~3 nF.
Does the LM5110-2M/NOPB require external pull-up or pull-down resistors on its inputs?
No. The LM5110-2M/NOPB inputs (IN_A and IN_B) have no internal pull-up or pull-down circuitry - unlike some variants (e.g., LM5110-1 has 18-µA pull-downs). TI explicitly states unused inputs must be tied to IN_REF or VCC to prevent spurious switching; floating inputs are prohibited and may cause erratic output behavior.
How does the shutdown function operate on the LM5110-2M/NOPB?
The LM5110-2M/NOPB shutdown pin (SHDN) is active-low: pulling it below 1.5 V disables both outputs and reduces total supply current to ≤25 µA. An internal 18-µA pullup to VCC ensures the device powers up enabled if SHDN is left unconnected - TI recommends tying SHDN to VCC when not used to prevent noise-induced shutdown.
LM5110-2M/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 3.5V ~ 14V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.2V
- Current - Peak Output (Source, Sink):
- 3A, 5A
- Input Type:
- Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 14ns, 12ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LM5110-2M/NOPB FAQ
1.How can I place an order for LM5110-2M/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5110-2M/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5110-2M/NOPB reliable?
The price and inventory of LM5110-2M/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5110-2M/NOPB is usually 5 days.
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5.How can I obtain technical support or documentation for LM5110-2M/NOPB?
For technical support, including LM5110-2M/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5110-2M/NOPB requirements.
6.How does Aetrix verify that LM5110-2M/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5110-2M/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5110-2M/NOPB meets industry standards.
7.What is the process for return or replacement of LM5110-2M/NOPB?
All LM5110-2M/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5110-2M/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5110-2M/NOPB part is unused and in its original packaging.
Return procedure for LM5110-2M/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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