Texas Instruments LM5110-2SD/NOPB
- Part No.:
- LM5110-2SD/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 10-WDFN Exposed Pad
- Datasheet:
-
LM5110-2SD/NOPB.pdf
- Description:
- IC GATE DRVR LOW-SIDE 10WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LM5110-2SD/NOPB from Texas Instruments is a dual-channel, inverting gate driver IC designed to independently drive two N-channel MOSFETs in high-efficiency power stages. It delivers 5-A sink / 3-A source peak current per channel, supports negative output voltage swing (VCC to VEE), features TTL-compatible inputs, and operates across 3.5–14 V supply range - enabling robust synchronous rectification in isolated DC/DC converters.
For engineers reviewing the LM5110-2SD/NOPB datasheet, LM5110-2SD/NOPB pinout, LM5110-2SD/NOPB application, or LM5110-2SD/NOPB equivalent, key selection criteria include verified dual inverting logic configuration, WSON-10 thermal performance (RθJA = 40.1°C/W), negative VGS capability for enhanced MOSFET turn-off reliability, and parallel operation support for doubled drive current.
Technical Context
The LM5110-2SD/NOPB implements compound CMOS-bipolar totem-pole outputs per channel, combining MOS transistors for rail-to-rail swing and bipolar devices for high peak current near VGS(th). Its dedicated IN_REF and VEE pins enable true split-supply operation, allowing gate drive between VCC and a negative VEE (up to 14 V below VCC).
Each channel features independent TTL-compatible inputs with 400-mV hysteresis, undervoltage lockout (2.9-V rising threshold, 230-mV hysteresis), and a dedicated shutdown input (nSHDN) that reduces supply current to ≤25 µA. Propagation delays are tightly matched (25–40 ns typ.), supporting synchronized dual-channel or paralleled single-output configurations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Configuration | Dual inverting - both OUT_A and OUT_B invert respective IN_A/IN_B signals; required for complementary drive in synchronous buck or active clamp topologies. |
| Peak Sink/Source Current | 5 A sink / 3 A source per channel - enables fast charging/discharging of large gate capacitances (e.g., >5 nF) at high switching frequencies (>1 MHz). |
| Propagation Delay | 25–40 ns typical (CL = 2 nF) - ensures minimal timing skew between channels, critical for shoot-through prevention in half-bridge designs. |
| Supply Range (VCC–IN_REF) | 3.5 V to 14 V - supports 5-V, 12-V, and 15-V gate drive rails while maintaining UVLO protection down to 2.9 V. |
| Output Voltage Swing | VCC to VEE - allows negative gate bias (e.g., VEE = –3 V) to improve MOSFET off-state immunity against dV/dt-induced turn-on. |
| Package Thermal Resistance | RθJA = 40.1°C/W (WSON-10) - enables higher continuous drive current vs SOIC-8 (114°C/W) without external heatsinking in compact power modules. |
Pinout & Package
LM5110-2SD/NOPB is housed in a thermally enhanced 4 mm × 4 mm WSON-10 package with exposed thermal pad (pin 10). The package supports reflow soldering and provides low junction-to-board resistance (RθJB = 17.3°C/W) for efficient heat dissipation in high-power density applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN_REF) | Input ground reference | Reference node for TTL input thresholds; connects to controller ground - isolates logic domain from power ground (VEE) to enable level shifting. |
| 2 (IN_A) | Channel A logic input | Inverting input: high → OUT_A low, low → OUT_A high; no internal pullup/pulldown - must be actively driven or tied to IN_REF/VCC. |
| 3 (VEE) | Output power ground | Sink return path for both outputs; may be connected to negative supply (e.g., –3 V) to generate negative VGS during turn-off. |
| 4 (IN_B) | Channel B logic input | Inverting input: identical behavior to IN_A; independent control enables asymmetric timing or fault isolation. |
| 7 (OUT_A) | Channel A gate drive output | Drives MOSFET gate between VCC and VEE; capable of 5-A sink/3-A source into capacitive loads. |
| 8 (VCC) | Positive supply rail | Primary power for output stage; requires local 100-nF + 220-nF ceramic bypass between VCC and IN_REF/VEE. |
| 9 (OUT_B) | Channel B gate drive output | Functionally identical to OUT_A; matched propagation delay enables precise dual-MOSFET timing control. |
| 5, 6 (NC) | No-connect terminals | Not bonded internally in WSON-10; must remain unconnected - no routing or copper fill allowed. |
Key Features
| Feature | Design Value |
|---|---|
| Compound CMOS-Bipolar Output Stage | Combines MOS (rail-to-rail swing) and bipolar (high peak current near VGS(th)) devices to minimize drive current variation over temperature and supply voltage. |
| Negative VGS Capability | Outputs swing from VCC to VEE, where VEE can be up to 14 V below VCC - enables robust MOSFET turn-off in noisy, high-dV/dt environments. |
| Parallel Operation Support | IN_A/IN_B and OUT_A/OUT_B can be shorted on PCB to double drive current (10-A sink/6-A source), with <1% efficiency penalty vs dual-channel mode. |
| Dedicated Input Ground (IN_REF) | Decouples logic reference from power ground (VEE), enabling single-supply (IN_REF = VEE) or split-supply (IN_REF = system GND, VEE = negative rail) configurations. |
| TTL-Compatible Inputs with Hysteresis | VIH = 2.2 V, VIL = 0.8 V, 400-mV hysteresis - rejects noise on control lines and prevents oscillation with slow-rising/falling PWM edges. |
Applications
| High-Efficiency Synchronous Rectification | Isolated DC/DC Converter Gate Drive |
|---|---|
Use Scenario: Driving low-RDS(on) N-channel MOSFETs as synchronous rectifiers in LLC or phase-shifted full-bridge converters operating at 300–1000 kHz. IC Role / Device Role: Dual inverting gate driver providing precise, matched timing to replace Schottky diodes - minimizing conduction losses while preventing shoot-through via controlled dead-time margins. Use Value: Enables >98% converter efficiency at full load by reducing rectifier losses; negative VGS capability suppresses false turn-on during transformer leakage spikes. | Use Scenario: Driving primary-side MOSFETs in isolated flyback or forward converters where controller ground is separated from power ground. IC Role / Device Role: Level-shifting gate driver translating 3.3-V/5-V controller outputs to 12-V gate drive referenced to floating power ground (VEE). Use Value: Eliminates need for gate-drive transformers or optocouplers; IN_REF/VEE isolation simplifies PCB layout and improves EMI performance in compact adapters. |
| Motor Driver Half-Bridge Control | High-Speed Solenoid Actuation |
Use Scenario: Controlling N-channel high-side/low-side MOSFET pairs in BLDC motor gate drivers requiring fast, matched turn-on/turn-off. IC Role / Device Role: Dual inverting driver generating complementary gate signals - OUT_A drives low-side, OUT_B drives high-side (with bootstrap or isolated supply). Use Value: Tight propagation matching (<15 ns skew) minimizes cross-conduction risk; 5-A sink current ensures rapid low-side discharge for clean commutation at >20 kHz. | Use Scenario: Driving high-inductance solenoids in industrial valves or automotive fuel injectors requiring fast, high-current turn-on pulses. IC Role / Device Role: High-current gate driver delivering 5-A peak sink to rapidly charge solenoid gate capacitance and achieve <100-ns rise time. Use Value: Reduces solenoid response latency by >40% vs standard drivers; WSON-10 thermal performance sustains repetitive 10-A peak pulses without derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5110-2M/NOPB | SOIC-8 package; RθJA = 114°C/W vs 40.1°C/W - limits continuous current in high-ambient environments. | Lacks thermal performance for compact, sealed enclosures; suitable only where board space permits larger footprint and airflow. | Select when legacy SOIC-8 layout compatibility is mandatory and thermal headroom exceeds 35°C. |
| UCC27524ADRV | Dual noninverting output; no IN_REF pin - requires single-supply operation only; lower peak sink (4 A) and no negative VGS capability. | Cannot implement negative gate bias; unsuitable for high-noise synchronous rectifier or isolated gate drive where VGS stability is critical. | Choose only for cost-sensitive, non-isolated, single-supply applications with moderate switching speed requirements. |
Compared with LM5110-2M/NOPB, the LM5110-2SD/NOPB delivers 2.8× better thermal performance and fits in 43% less board area; versus UCC27524ADRV, it adds negative VGS support and 25% higher sink current - making it uniquely suited for high-reliability, high-frequency power conversion where gate drive integrity is paramount.
Availability
LM5110-2SD/NOPB is available at Aetrix Electronics and suitable for synchronous rectifier gate drivers, isolated DC/DC converter designs, and high-speed motor control systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for LM5110-2SD/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies - with over 90 years of innovation in high-reliability, high-performance IC design.
The LM5110 product line was engineered specifically for high-efficiency power conversion systems requiring fast, high-current, thermally robust gate drive - targeting server PSUs, telecom rectifiers, and industrial motor drives where MOSFET switching integrity directly impacts system efficiency and reliability.
FAQ
What is the logic configuration of LM5110-2SD/NOPB?
The LM5110-2SD/NOPB features dual inverting outputs: a high input on IN_A produces a low output on OUT_A, and a high input on IN_B produces a low output on OUT_B. This configuration is explicitly confirmed in TI's Device Options table for part number LM5110-2SD, and is essential for driving complementary MOSFET pairs in topologies like synchronous buck or active clamp forward converters where inverted control signals are required.
Can LM5110-2SD/NOPB drive MOSFET gates with negative voltage?
Yes, LM5110-2SD/NOPB supports negative gate drive: its outputs swing from VCC to VEE, and VEE may be set up to 14 V below VCC (e.g., VCC = 12 V, VEE = –3 V). This capability is enabled by separate IN_REF (input ground) and VEE (output ground) pins, and is documented in the Functional Description, Absolute Maximum Ratings, and Typical Application sections of the LM5110 datasheet. Negative VGS improves MOSFET turn-off robustness in high-dV/dt environments.
What package does LM5110-2SD/NOPB use, and how does it differ from LM5110-2M/NOPB?
LM5110-2SD/NOPB uses the WSON-10 (4 mm × 4 mm) package with an exposed thermal pad, whereas LM5110-2M/NOPB uses SOIC-8. The WSON-10 offers significantly lower thermal resistance (RθJA = 40.1°C/W vs 114°C/W), enabling higher continuous output current in space-constrained layouts. Pin 10 is the thermal pad (must be soldered to PCB ground plane), and pins 5 and 6 are NC - all confirmed in the Pin Configuration and Functions section of the LM5110 datasheet.
Does LM5110-2SD/NOPB support parallel operation of its two channels?
Yes, LM5110-2SD/NOPB supports parallel operation: connecting IN_A to IN_B and OUT_A to OUT_B doubles peak drive capability to 10-A sink / 6-A source. TI specifies this in the Features and Detailed Description sections, noting <1% efficiency penalty and strict layout requirements - including shorting inputs/outputs as close to the IC as possible and using fast-rising input edges (>20 V/µs) to minimize mismatch-induced shoot-through.
What is the purpose of the IN_REF pin on LM5110-2SD/NOPB?
The IN_REF pin on LM5110-2SD/NOPB serves as the dedicated ground reference for TTL-compatible input buffers, electrically isolating the logic domain from the power domain (VEE). This enables flexible supply configurations: connecting IN_REF to VEE yields standard single-supply operation, while connecting IN_REF to system controller ground and VEE to a negative rail enables split-supply level shifting - a key differentiator versus conventional gate drivers lacking this pin.
LM5110-2SD/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 3.5V ~ 14V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.2V
- Current - Peak Output (Source, Sink):
- 3A, 5A
- Input Type:
- Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 14ns, 12ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-WSON (4x4)
LM5110-2SD/NOPB FAQ
1.How can I place an order for LM5110-2SD/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5110-2SD/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5110-2SD/NOPB reliable?
The price and inventory of LM5110-2SD/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5110-2SD/NOPB is usually 5 days.
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LM5110-2SD/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM5110-2SD/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5110-2SD/NOPB?
For technical support, including LM5110-2SD/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5110-2SD/NOPB requirements.
6.How does Aetrix verify that LM5110-2SD/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5110-2SD/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5110-2SD/NOPB meets industry standards.
7.What is the process for return or replacement of LM5110-2SD/NOPB?
All LM5110-2SD/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5110-2SD/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5110-2SD/NOPB part is unused and in its original packaging.
Return procedure for LM5110-2SD/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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