Texas Instruments LM5110-3M/NOPB
- Part No.:
- LM5110-3M/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LM5110-3M/NOPB.pdf
- Description:
- IC GATE DRVR LOW-SIDE 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:480
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Product details
Overview
LM5110-3M/NOPB from Texas Instruments is a dual-channel compound gate driver IC with inverting Channel A and noninverting Channel B, delivering 5-A sink / 3-A source peak current per channel, 25-ns typical propagation delay, and rail-to-rail output swing from VCC to VEE (which supports negative bias down to −4 V relative to IN_REF). It enables robust synchronous rectifier control in high-frequency DC/DC converters.
For engineers reviewing the LM5110-3M/NOPB datasheet, LM5110-3M/NOPB pinout, LM5110-3M/NOPB application, or LM5110-3M/NOPB equivalent, key selection criteria include verified dual-output polarity configuration, negative VGS capability for enhanced MOSFET turn-off immunity, compound MOS/bipolar output architecture, SOIC-8 thermal performance (RθJA = 114°C/W), and TTL-compatible input thresholds with shutdown control.
Technical Context
The LM5110-3M/NOPB implements two independent, matched totem-pole output stages-each combining parallel MOS and bipolar transistors-to maintain stable drive current across temperature (−40°C to +125°C) and supply voltage (3.5 V to 14 V). Its dedicated IN_REF and VEE pins enable true split-supply operation, allowing gate drive between VCC and a negative VEE (up to 4 V below IN_REF).
Channel A inverts logic (IN_A low → OUT_A high), while Channel B is noninverting (IN_B high → OUT_B high); both inputs are TTL-compatible (VIL = 0.8 V, VIH = 2.2 V) with 400-mV hysteresis. The integrated undervoltage lockout (UVLO) disables outputs when VCC–IN_REF falls below 2.3 V (rising threshold), with 230-mV hysteresis to prevent chatter during brownout.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Operating Range | 3.5 V to 14 V - Supports standard 5 V, 12 V, and 15 V gate drive rails with 1-V margin below absolute max (15 V). |
| Peak Sink/Source Current | 5 A sink / 3 A source per channel - Delivers fast MOSFET turn-on/off into 2-nF load with minimal Miller plateau dwell time. |
| Propagation Delay | 25 ns (typ) - Enables reliable operation up to ~10 MHz switching frequency in hard-switched topologies. |
| Rise/Fall Time | 14 ns / 12 ns (with 2-nF load) - Reduces switching losses and EMI in high-frequency power stages. |
| Input Thresholds | VIL = 0.8 V, VIH = 2.2 V - Ensures compatibility with 3.3 V and 5 V controllers without level-shifting circuitry. |
| UVLO Threshold | 2.3 V (rising), 230 mV hysteresis - Prevents erratic output behavior during startup or supply sag. |
| Shutdown Current | 25 µA max - Enables low-power fault recovery or soft-start sequencing without external disable circuitry. |
Pinout & Package
LM5110-3M/NOPB is housed in an SOIC-8 package (4.90 mm × 3.91 mm), optimized for thermal dissipation and PCB layout compatibility with legacy gate drivers. Pin 1 (IN_REF) is a dedicated input ground reference, enabling flexible single- or split-supply configurations.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - IN_REF | Input Ground Reference | Reference node for all logic inputs; connect to controller ground or system logic ground-not tied to VEE unless using single-supply mode. |
| 2 - IN_A | Inverting Logic Input | Drives OUT_A with inverted polarity; TTL-compatible, no internal pullup/pulldown (must be actively driven or tied to IN_REF/VCC). |
| 3 - VEE | Output Power Ground | Sinks output current; can be biased negative (up to 4 V below IN_REF) to enforce robust MOSFET turn-off. |
| 4 - IN_B | Noninverting Logic Input | Drives OUT_B with same polarity; TTL-compatible, no internal pullup/pulldown. |
| 5 - SHDN | Active-Low Shutdown Control | Pull ≤1.5 V to disable both outputs; internal 18-µA pullup to VCC ensures safe default-on state. |
| 6 - VCC | Positive Supply Rail | Power source for logic and output stages; requires local 100-nF + 220-nF ceramic decoupling to IN_REF and VEE. |
| 7 - OUT_A | Inverting Output Driver | Delivers 5-A sink / 3-A source; swings from VCC to VEE - supports negative gate bias for critical off-state immunity. |
| 8 - OUT_B | Noninverting Output Driver | Functionally identical to OUT_A but opposite logic polarity; enables complementary drive for synchronous rectifiers or half-bridges. |
Key Features
| Feature | Design Value |
|---|---|
| Compound MOS/Bipolar Output Stage | Combines MOS (rail-to-rail swing) and bipolar (high-threshold-region current) devices to minimize drive-current variation over temperature and voltage. |
| Dual Independent Polarity Configuration | Channel A inverts, Channel B does not - eliminates need for external inverters in synchronous buck or LLC resonant converter topologies. |
| Negative VGS Drive Capability | VEE can be set up to 4 V below IN_REF - suppresses spurious turn-on from dV/dt coupling or high-temperature threshold drift in low-VTH MOSFETs. |
| Parallel Operation Support | IN_A/IN_B and OUT_A/OUT_B can be shorted on PCB to double peak current (10-A sink / 6-A source) with <1% added dissipation penalty. |
| Industry-Pin-Compatible Layout | SOIC-8 footprint matches standard gate drivers; IN_REF (pin 1) is NC on competitors - tie to VEE (pin 3) for drop-in replacement in single-supply designs. |
Applications
| Synchronous Buck Converter | LLC Resonant Converter |
|---|---|
Use Scenario: High-efficiency 12 V–1 V point-of-load conversion with 500 kHz–1 MHz switching frequency and <100 ns dead-time requirements. IC Role / Device Role: Dual-channel gate driver providing complementary signals to high-side and low-side synchronous rectifiers, with Channel A driving low-side (inverted) and Channel B driving high-side (noninverted) via bootstrap or isolated supply. Use Value: Negative VGS capability prevents shoot-through during transient load steps by ensuring robust low-side FET turn-off under dV/dt stress. |
Use Scenario: 300–500 kHz resonant DC/DC stage in server PSU or telecom brick, requiring precise zero-voltage switching (ZVS) timing and low gate-drive loss. IC Role / Device Role: Drives two primary-side MOSFETs in half-bridge configuration, where Channel A controls lagging leg (inverted) and Channel B controls leading leg (noninverted) for phase-shifted control. Use Value: 25-ns propagation matching minimizes timing skew between legs, preserving ZVS window and reducing circulating current losses. |
| Motor Gate Driver Module | Industrial Solenoid Controller |
Use Scenario: 24 V BLDC motor inverter with Hall-sensor commutation and >10-A phase current, operating in harsh industrial ambient (−40°C to +105°C). IC Role / Device Role: Replaces discrete buffer + level shifter with single IC driving three half-bridge legs (using two LM5110-3M/NOPB per inverter), leveraging parallel-mode capability for high-current phases. Use Value: Compound output maintains >4.5-A sink current at 125°C junction temperature - avoids derating or thermal throttling in enclosed enclosures. |
Use Scenario: Fast-acting 48 V solenoid actuator in factory automation, requiring <100 µs turn-on/turn-off and immunity to back-EMF transients. IC Role / Device Role: Drives N-channel solenoid switch with active pull-down; Channel A (inverting) enables direct interface to PLC open-collector outputs, while Channel B remains unused or repurposed. Use Value: 5-A sink current ensures sub-µs turn-off even with 100 nH parasitic inductance, eliminating mechanical chatter and contact arcing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5110-1M/NOPB | Dual noninverting outputs - no polarity inversion between channels. | Requires external inverter for complementary drive; unsuitable for synchronous rectifier topologies needing inherent A/B polarity split. | Select only if both outputs must follow same logic polarity and board space allows added inverter logic. |
| UCC27524ADRV | Same SOIC-8 package, dual noninverting, 5-A sink/5-A source, but lacks negative VEE capability and compound output architecture. | Cannot generate negative gate bias; exhibits higher current variation over temperature due to MOS-only output stage. | Choose when cost sensitivity outweighs negative-bias requirement and thermal stability is less critical. |
Compared with LM5110-1M/NOPB and UCC27524ADRV, LM5110-3M/NOPB uniquely delivers verified inverting/noninverting dual-output polarity in SOIC-8 with negative VGS support and compound-stage current stability-making it the only option among the three qualified for high-reliability synchronous rectification with low-threshold MOSFETs.
Availability
LM5110-3M/NOPB is available at Aetrix Electronics and suitable for synchronous rectifier gate drivers, switch-mode power supply gate drivers, and solenoid/motor drivers requiring stable component supply, long-term manufacturability, and TI-qualified automotive-grade traceability (PPAP-ready).
Supply support for LM5110-3M/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader designing analog ICs, embedded processors, and digital signal solutions for industrial, automotive, and power management applications.
The LM5110 family was developed specifically for high-current, high-speed MOSFET gate driving in energy-efficient power conversion systems - emphasizing thermal robustness, polarity flexibility, and negative-bias reliability in demanding DC/DC and motor control environments.
FAQ
What is the exact output polarity configuration of LM5110-3M/NOPB?
The LM5110-3M/NOPB has Channel A configured as inverting (IN_A low → OUT_A high) and Channel B as noninverting (IN_B high → OUT_B high). This polarity pairing is explicitly defined in TI's Device Options table and validated in the functional truth table (Section 8.4). No external components are needed to achieve this behavior - it is hardwired in the silicon design of the LM5110-3M/NOPB.
Can LM5110-3M/NOPB drive MOSFET gates with negative voltage relative to source?
Yes. The LM5110-3M/NOPB supports negative gate drive by referencing its outputs (OUT_A and OUT_B) to VEE, which can be biased up to 4 V below IN_REF. When VEE is set to −3 V and IN_REF to 0 V, the output swing becomes VCC to −3 V - enabling −3 V VGS during turn-off. This capability is confirmed in Section 8.3.3 and Figure 12 of the official datasheet for LM5110-3M/NOPB.
What is the maximum recommended capacitive load for LM5110-3M/NOPB?
The LM5110-3M/NOPB is characterized for 2-nF load in switching specifications (tr = 14 ns, tf = 12 ns), and typical curves extend to 2200 pF. While not explicitly rated beyond that, TI's layout guidelines emphasize minimizing trace inductance and using low-ESR decoupling - indicating robustness up to ~3 nF with careful PCB design. No derating is required within the 25°C–125°C range per Section 7.6 test conditions for LM5110-3M/NOPB.
Does LM5110-3M/NOPB include undervoltage lockout (UVLO)?
Yes. LM5110-3M/NOPB integrates UVLO that monitors VCC relative to IN_REF. Outputs disable when VCC–IN_REF drops below 2.3 V (rising threshold), with 230-mV hysteresis (VCCH) to prevent oscillation during supply ramp-up or brownout. This function is active regardless of SHDN state and is documented in Section 7.5 Electrical Characteristics and Section 8.3.4 for LM5110-3M/NOPB.
Is LM5110-3M/NOPB pin-compatible with standard SOIC-8 gate drivers?
LM5110-3M/NOPB uses industry-standard SOIC-8 pinout spacing and pad dimensions, but pin 1 (IN_REF) is unique - it is a no-connect on most legacy drivers. For drop-in replacement in single-supply designs, TI recommends tying IN_REF (pin 1) to VEE (pin 3) on the PCB. This preserves signal integrity while maintaining mechanical compatibility, as confirmed in Section 11.1 Layout Guidelines for LM5110-3M/NOPB.
LM5110-3M/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 3.5V ~ 14V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.2V
- Current - Peak Output (Source, Sink):
- 3A, 5A
- Input Type:
- Inverting, Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 14ns, 12ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LM5110-3M/NOPB FAQ
1.How can I place an order for LM5110-3M/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5110-3M/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5110-3M/NOPB reliable?
The price and inventory of LM5110-3M/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5110-3M/NOPB is usually 5 days.
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LM5110-3M/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM5110-3M/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5110-3M/NOPB?
For technical support, including LM5110-3M/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5110-3M/NOPB requirements.
6.How does Aetrix verify that LM5110-3M/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5110-3M/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5110-3M/NOPB meets industry standards.
7.What is the process for return or replacement of LM5110-3M/NOPB?
All LM5110-3M/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5110-3M/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5110-3M/NOPB part is unused and in its original packaging.
Return procedure for LM5110-3M/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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