Texas Instruments LM5110-3MX/NOPB
- Part No.:
- LM5110-3MX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LM5110-3MX/NOPB.pdf
- Description:
- IC GATE DRVR LOW-SIDE 8SOIC
- Quantity:
- Payment:

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Product details
Overview
LM5110-3MX/NOPB from Texas Instruments is a dual-channel compound gate driver IC with inverting Channel A and noninverting Channel B, delivering 5-A sink / 3-A source peak current per channel, 25-ns typical propagation delay, and negative output voltage capability (VEE down to −4 V relative to IN_REF). It drives N-channel MOSFETs in high-frequency synchronous rectifier and switch-mode power supply applications.
For engineers reviewing the LM5110-3MX/NOPB datasheet, LM5110-3MX/NOPB pinout, LM5110-3MX/NOPB application, or LM5110-3MX/NOPB equivalent, key selection criteria include independent TTL-compatible inputs, split-supply operation support via dedicated IN_REF and VEE pins, rail-to-rail output swing (VCC to VEE), shutdown control (SHDN), and SOIC-8 package compatibility with industry-standard gate drivers.
Technical Context
The LM5110-3MX/NOPB implements a compound output stage combining MOS and bipolar transistors in parallel per channel to maintain stable drive current across temperature and output voltage range - bipolar devices deliver high peak current near MOSFET threshold, while MOS devices ensure rail-to-rail swing. Its dual independent logic inputs (IN_A, IN_B) reference IN_REF, and outputs (OUT_A, OUT_B) swing between VCC and VEE, enabling true negative gate bias for robust MOSFET turn-off.
Functional modes include normal operation (with UVLO protection at 2.3–3.5 V VCC–IN_REF), low-power shutdown (<25 µA ICCSD when SHDN <1.5 V), and optional parallel configuration (IN_A/IN_B tied, OUT_A/OUT_B tied) to double drive current. The SOIC-8 package features pin 1 (IN_REF) as dedicated input ground - distinct from standard gate drivers where pin 1 is NC - allowing backward-compatible layout when connected to VEE.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC to VEE Range | 3.5 V to 14 V - sets usable gate-drive voltage window; supports 5 V, 12 V, and 15 V systems with margin. |
| Peak Sink/Source Current | 5 A sink / 3 A source per channel - enables fast charging/discharging of large MOSFET gates (e.g., >10 nF) at high switching frequencies. |
| Propagation Delay | 25 ns typical (td1/td2, CLOAD = 2 nF) - ensures tight timing control in synchronous rectification and phase-shifted topologies. |
| Rise/Fall Time | 14 ns rise / 12 ns fall (CLOAD = 2 nF) - minimizes switching losses and EMI in high-frequency SMPS designs. |
| Input Thresholds | VIH = 2.2 V, VIL = 0.8 V - guarantees reliable TTL-level interfacing with PWM controllers and digital isolators. |
| UVLO Threshold | 2.3 V (rising), 2.9 V (falling) - prevents erratic operation during brown-out conditions with 230 mV hysteresis. |
| Shutdown Current | 25 µA max (ICCSD) - enables low-power fault recovery and thermal management without external circuitry. |
Pinout & Package
LM5110-3MX/NOPB uses an 8-pin SOIC package (4.90 mm × 3.91 mm) with exposed pad not present. Pin functions are validated per TI SNVS255B datasheet Rev. B (September 2016).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN_REF) | Input Ground Reference | Reference node for all logic inputs; connects to controller ground in split-supply mode or to VEE in single-supply mode. |
| 2 (IN_A) | Inverting Logic Input | Drives OUT_A with inverted polarity; TTL-compatible, no internal pullup/pulldown. |
| 3 (VEE) | Output Power Ground | Sinks output current; may be biased negative (≤ −4 V vs IN_REF) to enable negative VGS for enhanced MOSFET turn-off. |
| 4 (IN_B) | Noninverting Logic Input | Drives OUT_B with same polarity; TTL-compatible, no internal pullup/pulldown. |
| 5 (SHDN) | Shutdown Control Input | Active-low TTL input; pulls below 1.5 V to disable both outputs and reduce ICC to ≤25 µA. |
| 6 (VCC) | Positive Supply Rail | Supplies output stage; requires local 100-nF + 220-nF ceramic bypass between VCC–IN_REF and VCC–VEE. |
| 7 (OUT_A) | Inverting Output Driver | Sources up to 3 A / sinks up to 5 A; swings from VCC to VEE; connects directly to gate of high-side N-MOSFET. |
| 8 (OUT_B) | Noninverting Output Driver | Sources up to 3 A / sinks up to 5 A; swings from VCC to VEE; connects directly to gate of low-side N-MOSFET. |
Key Features
| Feature | Design Value |
|---|---|
| Compound CMOS/Bipolar Output Stage | Combines MOS (rail-to-rail swing) and bipolar (high peak current near VGS(th)) devices to stabilize drive current over temperature and voltage. |
| Dedicated IN_REF and VEE Pins | Enables true split-supply operation: IN_REF ties to controller ground, VEE ties to negative bias rail (e.g., −3 V), allowing VGS(off) < 0 V. |
| Independent TTL-Compatible Inputs | IN_A and IN_B accept 0.8 V/2.2 V thresholds with 400 mV hysteresis - eliminates need for level shifters when interfacing with 3.3 V or 5 V controllers. |
| Parallel Operation Support | IN_A/IN_B and OUT_A/OUT_B can be shorted on PCB to double drive current (10 A sink / 6 A source) with <1% efficiency penalty. |
| Undervoltage Lockout + Shutdown | UVLO disables outputs if VCC–IN_REF drops below 2.3 V; SHDN pin provides system-level fault response with <25 µA standby current. |
Applications
| Synchronous Rectifier Gate Driver | Switch-Mode Power Supply Gate Driver |
|---|---|
|
Use Scenario: High-efficiency AC/DC or DC/DC converter using synchronous rectification with N-channel MOSFETs on secondary side. IC Role / Device Role / Timing Role: LM5110-3MX/NOPB drives high-side and low-side synchronous rectifiers with precise timing - IN_A (inverting) controls high-side FET, IN_B (noninverting) controls low-side FET - avoiding shoot-through. Use Value: Negative VEE capability enables −3 V gate turn-off bias, reducing body diode conduction and improving efficiency by ≥0.5% at 100 kHz. |
Use Scenario: Isolated flyback or forward converter with primary-side N-MOSFET switching at 200–500 kHz. IC Role / Device Role / Timing Role: LM5110-3MX/NOPB serves as isolated gate driver interface between PWM controller and power MOSFET, translating logic-level signals into high-current gate pulses. Use Value: 25 ns propagation delay and 14 ns rise time minimize dead-time uncertainty, enabling tighter duty cycle control and higher power density. |
| Solenoid and Motor Driver Interface | High-Frequency Class-D Audio Amplifier Gate Driver |
|
Use Scenario: 24 V industrial solenoid or brushed DC motor control requiring rapid turn-on/turn-off and inductive kickback suppression. IC Role / Device Role / Timing Role: LM5110-3MX/NOPB drives half-bridge N-MOSFET pair - IN_A controls upper FET (inverting), IN_B controls lower FET (noninverting) - with independent shutdown for emergency stop. Use Value: 5 A sink current ensures sub-100 ns turn-off of large gate capacitance (≥5 nF), limiting inductive voltage spikes and protecting downstream components. |
Use Scenario: Compact Class-D audio amplifier with >300 kHz switching frequency and low THD+N requirements. IC Role / Device Role / Timing Role: LM5110-3MX/NOPB delivers matched, low-jitter gate drive to half-bridge output stage - critical for minimizing crossover distortion and EMI. Use Value: Channel-to-channel propagation delay matching (<1 ns typical) and 12 ns fall time preserve PWM fidelity, supporting >100 dB PSRR at 20 kHz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5110-3M/NOPB | Same silicon, identical electrical specs; differs only in tape-and-reel packaging (LM5110-3MX/NOPB = cut-tape, LM5110-3M/NOPB = reel). | No functional difference; both support SOIC-8, same pinout, same thermal performance (RθJA = 114°C/W). | Select LM5110-3MX/NOPB for prototyping or low-volume builds; LM5110-3M/NOPB for automated SMT production. |
| UCC27524ADRV | 4-A sink / 4-A source, dual noninverting, no IN_REF pin, no negative VEE support, WSON-8 package (3 mm × 3 mm). | Lacks split-supply capability and negative gate bias; suited for single-supply, space-constrained apps where VGS(off) ≥ 0 V is acceptable. | Choose UCC27524ADRV only if board area is critical and negative VGS is unnecessary; LM5110-3MX/NOPB remains preferred for robust turn-off in high-noise environments. |
Compared with LM5110-3M/NOPB, LM5110-3MX/NOPB offers identical performance in cut-tape form for flexibility, while UCC27524ADRV trades negative drive capability and SOIC-8 compatibility for smaller footprint and symmetric sourcing - making it unsuitable for applications requiring VGS < 0 V or legacy SOIC layouts.
Availability
LM5110-3MX/NOPB is available at Aetrix Electronics and suitable for synchronous rectifier gate drivers, switch-mode power supply gate drivers, and solenoid/motor drivers requiring stable component supply, long-term manufacturability, and TI-qualified automotive-grade traceability.
Supply support for LM5110-3MX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, designing and manufacturing analog, embedded processing, and wireless chips for industrial, automotive, and consumer markets.
The LM5110 family was developed specifically for high-efficiency, high-frequency power conversion systems - emphasizing robust gate drive, negative bias capability, and thermal resilience in compact SOIC and WSON packages.
FAQ
What is the function of the IN_REF pin on the LM5110-3MX/NOPB?
The IN_REF pin on the LM5110-3MX/NOPB serves as the dedicated ground reference for all logic inputs (IN_A, IN_B, SHDN). It enables flexible supply configurations: in single-supply operation, IN_REF is tied to VEE; in split-supply operation, IN_REF connects to controller ground while VEE is biased negatively - allowing independent input referencing and true negative gate drive. This architecture is essential for noise immunity in high-dv/dt environments.
Can the LM5110-3MX/NOPB drive both high-side and low-side N-channel MOSFETs in a half-bridge?
Yes, the LM5110-3MX/NOPB is explicitly designed for half-bridge gate driving: its inverting Channel A (IN_A → OUT_A) and noninverting Channel B (IN_B → OUT_B) provide complementary logic control. When paired with appropriate bootstrap or isolated bias supplies, it safely drives high-side and low-side N-MOSFETs - with matched propagation delays (<1 ns skew) and independent shutdown (SHDN) for fault protection in the LM5110-3MX/NOPB implementation.
Does the LM5110-3MX/NOPB support negative gate drive voltage, and how is it implemented?
Yes, the LM5110-3MX/NOPB supports negative gate drive voltage via its separate VEE pin, which can be biased up to −4 V relative to IN_REF. This allows OUT_A and OUT_B to swing below ground - enabling negative VGS during MOSFET turn-off. Implementation requires connecting IN_REF to controller ground and VEE to a negative bias rail (e.g., −3 V), verified in TI's SNVS255B datasheet Figure 12 and Section 8.3.3.
What is the maximum capacitive load the LM5110-3MX/NOPB can drive while maintaining specified rise/fall times?
The LM5110-3MX/NOPB maintains 14 ns rise / 12 ns fall times with a 2-nF capacitive load per channel, as specified in Section 7.6 of the SNVS255B datasheet. For loads up to 10 nF, rise/fall times increase to ~25 ns (per Figure 7), remaining within practical limits for ≤1 MHz switching. Driving >10 nF loads requires external gate resistors to manage dV/dt and prevent oscillation - a design consideration confirmed in LM5110-3MX/NOPB application note SLVA672.
Is the LM5110-3MX/NOPB pin-compatible with other industry-standard gate drivers?
The LM5110-3MX/NOPB SOIC-8 footprint is mechanically compatible with industry-standard dual gate drivers, but pin 1 (IN_REF) is unique: it replaces the NC pin found on most competitors. To achieve drop-in replacement, connect IN_REF to VEE on the PCB - matching the pinout behavior of legacy drivers while retaining full LM5110-3MX/NOPB functionality, as documented in TI's Layout Guidelines (Section 11.1).
LM5110-3MX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 3.5V ~ 14V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.2V
- Current - Peak Output (Source, Sink):
- 3A, 5A
- Input Type:
- Inverting, Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 14ns, 12ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
LM5110-3MX/NOPB FAQ
1.How can I place an order for LM5110-3MX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5110-3MX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5110-3MX/NOPB reliable?
The price and inventory of LM5110-3MX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5110-3MX/NOPB is usually 5 days.
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LM5110-3MX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM5110-3MX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5110-3MX/NOPB?
For technical support, including LM5110-3MX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5110-3MX/NOPB requirements.
6.How does Aetrix verify that LM5110-3MX/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5110-3MX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5110-3MX/NOPB meets industry standards.
7.What is the process for return or replacement of LM5110-3MX/NOPB?
All LM5110-3MX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5110-3MX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5110-3MX/NOPB part is unused and in its original packaging.
Return procedure for LM5110-3MX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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