Texas Instruments LM5110-3SD

Overview

LM5110-3SD from Texas Instruments is a dual-channel compound gate driver IC with inverting Channel A and noninverting Channel B, designed to drive N-channel MOSFETs in high-frequency switching power stages. It delivers 5-A sink / 3-A source peak current per channel, supports negative output voltage swing (VCC to VEE), and operates across 3.5–14 V supply range with 25-ns typical propagation delay. It is used in synchronous rectifier circuits requiring robust turn-off via negative V_GS.

For engineers reviewing the LM5110-3SD datasheet, LM5110-3SD pinout, LM5110-3SD application, or LM5110-3SD equivalent, key selection criteria include confirmed dual-output polarity configuration, verified WSON-10 thermal performance (R_θJA = 40.1°C/W), negative-drive capability (VEE ≤ IN_REF − 4 V), TTL-compatible inputs with 400-mV hysteresis, and parallel-operation support for doubled drive current.

Technical Context

The LM5110-3SD implements two independent compound output stages-each combining MOS and bipolar transistors in parallel-to maintain stable peak current over temperature and output voltage swing. Its dedicated IN_REF and VEE pins enable true split-supply operation, allowing gate drive between VCC and a negative VEE rail relative to logic ground.

Channel A inverts input logic while Channel B preserves it, enabling complementary drive for synchronous buck or half-bridge topologies without external logic inversion. The shutdown pin (SHDN) disables both outputs with <25 µA quiescent current, and undervoltage lockout (UVLO) activates below 2.9 V (VCC–IN_REF) with 230-mV hysteresis.

Key Specifications

Pinout & Package

LM5110-3SD is housed in a thermally enhanced 4 mm × 4 mm WSON-10 package with exposed thermal pad (pin 10). Pins 5 and 6 are no-connect (NC) in this variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual gate driver applications.

Compared with LM5110-3M, LM5110-3SD offers 2.8× better thermal performance and smaller footprint; compared with UCC27524ADRV, it uniquely supports negative VEE operation and mixed-polarity drive - making it the only option among the three for split-supply synchronous rectifier designs.

Availability

LM5110-3SD is available at Aetrix Electronics and suitable for synchronous rectifier gate drivers, high-frequency DC-DC converters, and motor phase drivers requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for LM5110-3SD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in power management, signal chain, and high-reliability interface solutions.

The LM5110 family was developed to replace legacy gate drivers with higher peak current, improved thermal efficiency, and flexible supply configurations - specifically targeting high-density, high-efficiency power conversion systems.

FAQ

What is the exact output polarity configuration of LM5110-3SD?

The LM5110-3SD features an inverting output on Channel A (OUT_A) and a noninverting output on Channel B (OUT_B). This is confirmed in TI's Device Options table (Table 1) and Functional Block Diagram (Figure 2). Unlike LM5110-1SD (dual noninverting) or LM5110-2SD (dual inverting), LM5110-3SD provides complementary logic without external inverters - a key enabler for synchronous rectifier control where one FET requires inverted drive relative to the other.

Does LM5110-3SD support negative gate drive, and what are the limits?

Yes, LM5110-3SD supports negative gate drive via its separate VEE pin, which can be set up to 4 V below IN_REF (per Recommended Operating Conditions, Section 7.3). This allows OUT_A and OUT_B to swing from VCC down to VEE, enabling robust MOSFET turn-off with V_GS < 0 V. The absolute maximum rating permits VEE up to −0.3 V relative to IN_REF, but design guidance restricts practical use to ≤ −4 V to maintain UVLO stability and avoid exceeding IN_REF-to-VEE limits.

Can LM5110-3SD channels be paralleled, and what is required?

Yes, LM5110-3SD channels can be paralleled to deliver up to 10-A sink / 6-A source current. Per Section 9.2.2.1 and Figure 13, IN_A and IN_B must be shorted as close to the IC as possible, and OUT_A and OUT_B tied together - with equal external gate resistors if used. Input signal slew rate must exceed 20 V/µs to minimize mismatch-induced shoot-through. Parallel operation increases power dissipation by <1% versus dual-channel mode, as characterized in TI's Application Curves.

What is the thermal performance of LM5110-3SD in its WSON-10 package?

LM5110-3SD in the WSON-10 package has R_θJA = 40.1°C/W (Section 7.4), significantly lower than the SOIC-8 version (114°C/W). With a maximum junction temperature of 125°C and ambient of 85°C, it supports ~2.5 W of continuous power dissipation without heatsinking. The exposed thermal pad (pin 10) must be soldered to a PCB copper pour for optimal heat transfer - a requirement explicitly called out in Layout Guidelines (Section 11.1).

How does the shutdown function work on LM5110-3SD?

The SHDN pin on LM5110-3SD is an active-low TTL-compatible input. Pulling it below 1.5 V (typical threshold) disables both outputs and reduces VCC supply current to ≤25 µA (ICCSD, Section 7.5). The pin has an internal 18-µA pullup to VCC, so it defaults to enabled when left open or tied to VCC. TI recommends tying SHDN to VCC if unused - floating SHDN risks noise-induced erratic behavior, as noted in Layout Guidelines (Section 11.1).