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Texas Instruments LM5114ASD/NOPB
- Part No.:
- LM5114ASD/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 6-WDFN Exposed Pad
- Datasheet:
-
LM5114ASD/NOPB.pdf
- Description:
- IC GATE DRVR LOW-SIDE 6WSON
- Quantity:
- Payment:
- Shipping:
Inventory:3,436
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Product details
Overview
LM5114ASD/NOPB from Texas Instruments is a single-channel, low-side gate driver IC designed to drive enhancement-mode GaN FETs and low-side MOSFETs in high-frequency DC-DC converters. It delivers 7.6-A peak sink and 1.3-A peak source current, operates from 4-V to 12.6-V supply, features independent P_OUT/N_OUT outputs for adjustable turn-on/turn-off strength, and supports TTL/CMOS logic inputs up to 14 V regardless of VDD - enabling direct interface with PWM controllers in boost, flyback, and isolated synchronous rectifier applications.
For engineers reviewing the LM5114ASD/NOPB datasheet, LM5114ASD/NOPB pinout, LM5114ASD/NOPB application, or LM5114ASD/NOPB equivalent, key selection considerations include its split-output architecture for independent gate rise/fall control, UVLO with power-off pulldown clamp (<1 V), 12-ns typical propagation delay, and compatibility with fast-switching GaN devices requiring sub-10-ns timing precision and robust gate drive under transient supply conditions.
Technical Context
The LM5114ASD/NOPB implements dual-output CMOS buffer stages driving independent N-channel (sink) and P-channel (source) output transistors, enabling asymmetric gate impedance tuning. Its UVLO circuit disables outputs and activates an internal PNP clamp when VDD drops below 3.25 V (rising), holding N_OUT ≤0.85 V during power-down to prevent unintended FET turn-on.
Input logic thresholds are TTL-compatible (VIL = 0.8 V, VIH = 2.4 V), with 0.68-V hysteresis and 2.5-pF input capacitance, ensuring noise immunity and minimal loading on upstream controllers. The device supports operation across –40°C to 125°C junction temperature and includes ESD protection rated at ±2000 V HBM and ±1000 V CDM.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Peak Sink Current | 7.6 A - sufficient to rapidly discharge gate capacitance of parallel GaN/MOSFETs in <10 ns, minimizing switching losses in 500-kHz+ converters |
| Peak Source Current | 1.3 A - enables controlled turn-on of low-threshold GaN FETs without overshoot, supporting dVDS/dt >20 V/ns requirements |
| Propagation Delay | 12 ns typical - ensures precise timing alignment between PWM signal and gate voltage transitions in high-frequency topologies |
| VDD Operating Range | 4 V to 12.6 V - accommodates wide-input industrial supplies while maintaining full drive capability down to 4 V |
| Input Voltage Tolerance | Up to 14 V regardless of VDD - allows direct connection to 5-V or 3.3-V logic without level-shifting, simplifying controller interface |
| UVLO Threshold | 3.25 V (rising), 2.85 V (falling) - prevents erratic gate behavior during brown-out, with 0.4-V hysteresis for stable restart |
| Output Resistance | N_OUT: 0.23 Ω (typ), P_OUT: 2.0 Ω (typ) - defines minimum achievable gate loop impedance and sets practical limits on external resistor selection |
Pinout & Package
The LM5114ASD/NOPB is packaged in a 6-pin SOT-23 (DBV) with 2.90 mm × 1.60 mm body size and exposed pad for thermal enhancement. Pin 1 is VDD, Pin 2 is P_OUT, Pin 3 is N_OUT, Pin 4 is VSS, Pin 5 is INB, and Pin 6 is IN. The exposed pad must be soldered to PCB ground plane for optimal thermal performance (RθJB = 24.9°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pin 1) | Gate drive supply input | Must be decoupled locally with low-ESR/ESL capacitor; powers both output stages and internal logic |
| P_OUT (Pin 2) | Source-current output | Drives gate high via external path; resistance ~2.0 Ω enables controlled turn-on with optional series resistor |
| N_OUT (Pin 3) | Sink-current output | Drives gate low via external path; 0.23-Ω pull-down ensures fast, robust turnoff even under high capacitive load |
| VSS (Pin 4) | Ground reference | All signals referenced here; requires low-inductance connection to power ground plane |
| INB (Pin 5) | Inverting logic input | Active-high logic inverted internally; tie to VSS if unused to disable inverting path |
| IN (Pin 6) | Noninverting logic input | Active-high logic passed directly; tie to VDD if unused to disable noninverting path |
Key Features
| Feature | Design Value |
|---|---|
| Split-source/sink outputs | Enables independent optimization of gate rise time (via P_OUT + Rg_on) and fall time (via N_OUT + Rg_off) for EMI/efficiency trade-off |
| Power-off pulldown clamp | Activates internal PNP transistor when VDD < UVLO threshold, clamping N_OUT ≤0.85 V to prevent parasitic turn-on of GaN/MOSFET |
| TTL/CMOS logic compatibility | Accepts 3.3-V or 5-V controller outputs directly; 14-V absolute max input rating eliminates need for external clamping diodes |
| Low input capacitance | 2.5-pF typical - minimizes capacitive loading on PWM controller outputs, preserving signal integrity at >1-MHz edge rates |
| Thermal-enhanced SOT-23 | Exposed pad reduces junction-to-board thermal resistance to 24.9°C/W, supporting 1.5-W dissipation at 85°C ambient |
Applications
| Boost Converters | Flyback & Forward Converters |
|---|---|
Use Scenario: High-efficiency 24–66 V input to 75 V output boost stage using EPC2001 GaN FET at 500 kHz. IC Role / Device Role / Timing Role: Low-side gate driver providing 7.6-A sink/1.3-A source to control GaN FET turn-on/turn-off with <12-ns propagation delay and matched delays between IN/INB paths. Use Value: Enables 97% measured efficiency by minimizing gate charge loss and Miller-induced oscillation through split-output impedance tuning and <1-V UVLO clamp. | Use Scenario: Secondary-side synchronous rectification in isolated 48-V telecom flyback converter operating at 300 kHz. IC Role / Device Role / Timing Role: Low-side driver for SR MOSFET, accepting isolated gate drive signals via transformer-coupled or opto-isolated interface with TTL-level compatibility. Use Value: Delivers fast, low-loss turnoff (0.23-Ω N_OUT) critical for reducing conduction loss in high-duty-cycle flyback secondaries, while UVLO prevents false turn-on during startup/brownout. |
| Isolated Topology Synchronous FETs | Motor Control Half-Bridge Drivers |
Use Scenario: Driving secondary synchronous rectifiers in phase-shifted full-bridge or LLC resonant converters with tight dead-time control. IC Role / Device Role / Timing Role: Dual-input (IN/INB) low-side driver enabling inverting/noninverting configurations to match controller polarity requirements across multiple isolated rails. Use Value: Matching 12-ns propagation delay between IN and INB paths ensures symmetrical timing across paralleled drivers, eliminating shoot-through risk in multi-phase designs. | Use Scenario: Gate driving low-side switches in 24-V BLDC motor inverter half-bridges with >100-kHz PWM frequency. IC Role / Device Role / Timing Role: Robust low-side driver interfacing with MCU GPIO or dedicated gate driver IC, delivering 7.6-A peak sink to overcome Miller plateau quickly. Use Value: 0.23-Ω pulldown resistance ensures <20-ns fall time into 2-nF gate load, enabling crisp PWM edges and reduced torque ripple at high switching frequencies. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-side gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5114MX/NOPB | Same electrical specs and pinout; WSON-6 package (3.0 mm × 3.0 mm) with lower RθJA (51.0°C/W) vs SOT-23's 108.1°C/W | Better thermal performance in space-constrained, high-power-density layouts; requires different footprint and reflow profile | Select LM5114MX/NOPB when board area permits WSON and thermal margin is critical; LM5114ASD/NOPB preferred for legacy SOT-23 compatibility and cost-sensitive designs |
| MAX5048BAUT+T | Pin-to-pin compatible per TI documentation; identical 7.6-A/1.3-A drive, 12-ns delay, and UVLO; differs in input hysteresis (0.68 V vs MAX5048's 0.5 V) and thermal metrics | No layout change required; validated in TI reference designs as drop-in replacement for LM5114A variants | Choose MAX5048BAUT+T when sourcing diversity is needed or when existing MAX5048-based designs require LM5114A functionality without redesign |
Compared with LM5114MX/NOPB, the LM5114ASD/NOPB offers proven SOT-23 manufacturability and lower BOM cost but higher thermal resistance; versus MAX5048BAUT+T, it provides identical functional behavior with tighter input hysteresis for improved noise immunity in electrically noisy motor or industrial environments.
Availability
LM5114ASD/NOPB is available at Aetrix Electronics and suitable for boost converters, isolated synchronous rectifiers, GaN-based power supplies, and motor control systems requiring stable component supply, long-term lifecycle support, and traceable sourcing for production ramp-up.
Supply support for LM5114ASD/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power conversion solutions.
The LM5114ASD/NOPB belongs to TI's high-speed gate driver product line, engineered specifically for demanding high-frequency, high-efficiency power stages using GaN and silicon MOSFETs in industrial, telecom, and computing applications.
FAQ
What is the maximum input voltage the LM5114ASD/NOPB can tolerate on its IN and INB pins?
The LM5114ASD/NOPB accepts logic input voltages up to 14 V on both IN and INB pins regardless of VDD level - a key feature enabling direct interface with 5-V or 3.3-V controllers without level shifters. This rating is absolute maximum; sustained operation above VDD + 0.3 V is not recommended. The 0.68-V hysteresis improves noise rejection in electrically noisy environments where the LM5114ASD/NOPB is commonly deployed.
Does the LM5114ASD/NOPB support both inverting and noninverting gate drive configurations?
Yes, the LM5114ASD/NOPB integrates dual logic inputs - IN (noninverting) and INB (inverting) - allowing flexible configuration for either polarity without external inverters. When both inputs are driven, the truth table shows that only one output is active at a time, preventing shoot-through. This dual-input architecture makes the LM5114ASD/NOPB suitable for diverse controller interfaces in boost, flyback, and isolated topologies where signal polarity varies.
How does the UVLO function behave during power-down in the LM5114ASD/NOPB?
When VDD falls below the UVLO threshold (2.85 V falling), the LM5114ASD/NOPB disables normal output operation and activates an internal PNP transistor that clamps N_OUT to ≤0.85 V. This power-off pulldown clamp ensures the driven FET remains firmly off even as supply collapses - a critical safety feature for GaN and low-threshold MOSFETs prone to parasitic turn-on. The LM5114ASD/NOPB's UVLO hysteresis (0.4 V) prevents chatter near the threshold.
Can the LM5114ASD/NOPB drive multiple parallel GaN FETs simultaneously?
Yes, the LM5114ASD/NOPB's 7.6-A peak sink current and 1.3-A peak source current are explicitly rated for driving multiple parallel GaN FETs - a capability confirmed in TI's application notes using EPC2001 devices. Its low 0.23-Ω N_OUT resistance and split-output architecture allow distributed gate drive with external resistors to balance current sharing and suppress oscillation, making the LM5114ASD/NOPB well-suited for high-current, high-frequency GaN power stages.
What is the thermal performance difference between the SOT-23 and WSON packages of the LM5114ASD/NOPB?
The LM5114ASD/NOPB in SOT-23 (DBV) has a junction-to-ambient thermal resistance (RθJA) of 108.1°C/W, while the WSON-6 (NGG) variant achieves 51.0°C/W due to its exposed thermal pad. This means the SOT-23 version dissipates less power before reaching thermal limit - e.g., at 85°C ambient, max power is ~0.7 W vs ~1.5 W for WSON. Layout best practices (grounded exposed pad, thermal vias) are essential to realize the LM5114ASD/NOPB's full thermal capability in either package.
LM5114ASD/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Single
- Number of Drivers:
- 1
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 4V ~ 12.6V
- Logic Voltage - VIL, VIH:
- -
- Current - Peak Output (Source, Sink):
- 1.3A, 7.6A
- Input Type:
- Inverting, Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 82ns, 12.5ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (3x3)
LM5114ASD/NOPB FAQ
1.How can I place an order for LM5114ASD/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5114ASD/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5114ASD/NOPB reliable?
The price and inventory of LM5114ASD/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5114ASD/NOPB is usually 5 days.
3.What payment methods are accepted for LM5114ASD/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM5114ASD/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM5114ASD/NOPB?
LM5114ASD/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM5114ASD/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5114ASD/NOPB?
For technical support, including LM5114ASD/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5114ASD/NOPB requirements.
6.How does Aetrix verify that LM5114ASD/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5114ASD/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5114ASD/NOPB meets industry standards.
7.What is the process for return or replacement of LM5114ASD/NOPB?
All LM5114ASD/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5114ASD/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5114ASD/NOPB part is unused and in its original packaging.
Return procedure for LM5114ASD/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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