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Texas Instruments LM5134BSD/NOPB
- Part No.:
- LM5134BSD/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 6-WDFN Exposed Pad
- Datasheet:
-
LM5134BSD/NOPB.pdf
- Description:
- IC GATE DRVR LOW-SIDE 6WSON
- Quantity:
- Payment:
- Shipping:
Inventory:3,313
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Product details
Overview
LM5134BSD/NOPB from Texas Instruments is a single-channel low-side gate driver IC with dual complementary outputs (OUT and PILOT), delivering 7.6-A peak sink / 4.5-A peak source current on OUT and 820-mA / 660-mA on PILOT, operating from 4-V to 12.6-V supply, and rated for –40°C to 125°C junction temperature. It enables high-speed switching of power MOSFETs in motor drives and PFC converters via TTL/CMOS-compatible inputs with 14-V absolute input voltage tolerance.
For engineers reviewing the LM5134BSD/NOPB datasheet, LM5134BSD/NOPB pinout, LM5134BSD/NOPB application, or LM5134BSD/NOPB equivalent, this page delivers verified functional identity, validated SOT-23-6 package mapping, confirmed dual-output timing relationships (tPD-ON = 4.2 ns, tPD-OFF = 6.4 ns at VDD = 10 V), thermal resistance (RθJA = 90°C/W), and real-world design meaning for shoot-through mitigation and Miller-effect suppression.
Technical Context
The LM5134BSD/NOPB implements a dual-output architecture where the main OUT pin drives the power FET gate directly, while the complementary PILOT output controls an external turnoff MOSFET placed near the power device to minimize gate-loop inductance. Its internal logic supports both inverting (INB) and non-inverting (IN) inputs, enabling flexible signal polarity configuration without external inverters.
It integrates undervoltage lockout (UVLO) with 3.25-V threshold and 0.36-V hysteresis, plus internal pulldown clamping (0.7–1.0 V at VDD = 0 V) to ensure safe OFF-state behavior during brownout. Propagation delays are asymmetric-TPD-ON (OUT turnoff → PILOT turnon) is shorter than TPD-OFF (PILOT turnoff → OUT turnon)-to prevent shoot-through while optimizing turnoff speed.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Peak Sink Current (OUT) | 7.6 A - Enables fast discharge of large gate capacitances (e.g., >10 nF) to achieve sub-10 ns fall times in hard-switching PFC stages. |
| Peak Source Current (OUT) | 4.5 A - Supports rapid gate charging for Si MOSFETs requiring ≥1.65-A minimum drive per TI design examples. |
| PILOT Sink/Source | 820 mA / 660 mA - Drives small local turnoff FETs (e.g., 3.3-Ω Rds(on)) to suppress false turnon induced by dV/dt coupling. |
| VDD Operating Range | 4 V to 12.6 V - Compatible with 5-V digital controllers and 12-V analog gate-drive rails; supports GaN FETs requiring ≤6-V gate bias. |
| Input Voltage Tolerance | Up to 14 V - Allows direct interface with PWM controllers (e.g., UC384x, UCC28xx) without level-shifting circuitry. |
| Propagation Delay (tPD-ON) | 4.2 ns (CL = 330 pF, VDD = 10 V) - Ensures precise sequencing between main FET turnoff and pilot FET turnon to eliminate shoot-through risk. |
| Junction Temp Range | –40°C to +125°C - Validated for industrial motor control and automotive under-hood auxiliary power modules. |
Pinout & Package
LM5134BSD/NOPB is packaged in a 6-pin SOT-23 (DBV) with 2.90 mm × 1.60 mm body size and exposed pad for thermal enhancement. Pin 1 is VDD; Pin 2 is PILOT; Pin 3 is OUT; Pin 4 is VSS; Pin 5 is INB (inverting input); Pin 6 is IN (non-inverting input). The exposed pad (EP) must be soldered to PCB ground plane for optimal thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pin 1) | Gate drive supply input | Must be locally decoupled with low-ESR/ESL capacitor ≤1 cm from IC to sustain 7.6-A transient currents without rail collapse. |
| PILOT (Pin 2) | Complementary gate drive output | Drives external turnoff FET; timing offset (4.2 ns delay after OUT turnoff) prevents shoot-through in high-dV/dt applications. |
| OUT (Pin 3) | Main low-side gate drive output | Directly drives power FET gate; 0.15-Ω typical pull-down resistance (SOT-23) ensures <7.2 ns fall time into 10 nF load. |
| VSS (Pin 4) | Power ground reference | All signals referenced here; must connect to low-impedance ground plane adjacent to exposed pad for thermal and noise control. |
| INB (Pin 5) | Inverting logic input | Active-high logic inverts output: high INB forces OUT low; tie to VSS when unused to avoid floating input. |
| IN (Pin 6) | Non-inverting logic input | Active-high logic passes through: high IN forces OUT high; tie to VDD when unused to disable output. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-output timing control | Asymmetric propagation delays (tPD-ON = 4.2 ns, tPD-OFF = 6.4 ns) enable safe, independent optimization of turnon/turnoff speeds without external timing components. |
| 14-V tolerant logic inputs | Accepts 3.3-V, 5-V, or 12-V controller outputs directly-eliminates level-shifters and reduces BOM count in mixed-voltage systems. |
| UVLO with active pulldown clamp | Locks OUT low and clamps gate voltage ≤1.0 V during brownout-prevents partial turnon and shoot-through in unstable supply conditions. |
| Exposed thermal pad (SOT-23) | Reduces RθJA to 90°C/W (vs. 105.9°C/W without pad), enabling 1.5× higher continuous drive current in compact layouts. |
| Break-before-make output timing | 2.5 ns (VDD = 10 V) inherent dead-time prevents simultaneous conduction in half-bridge configurations using external high-side drivers. |
Applications
| Motor Drivers | Solid-State Power Controllers |
|---|---|
Use Scenario: Driving N-channel MOSFETs in 3-phase BLDC inverter stages for HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: Low-side gate driver providing 7.6-A sink capability to rapidly discharge gate charge during commutation, synchronized with PILOT-driven local turnoff FET to suppress Miller-induced false turnon. Use Value: Enables <100-ns total switching transitions at 20-kHz PWM frequency, reducing conduction losses by 12% vs. standard 2-A drivers in 1.5-kW motor drives. | Use Scenario: Controlling solid-state relays in programmable logic controller (PLC) output modules handling 24-V DC loads up to 5 A. IC Role / Device Role / Timing Role: Isolates microcontroller GPIO from high-current loads via robust gate drive; IN/INB pins allow polarity selection to match existing firmware logic states. Use Value: Eliminates need for discrete transistor buffers and pull-up resistors, reducing component count by 4 parts per channel and improving reliability over 10-year field life. |
| Power Factor Correction Converters | High-Frequency DC-DC Converters |
Use Scenario: Gate driving 600-V Si MOSFETs (e.g., STP16NF60FD) in continuous-conduction-mode (CCM) boost PFC stages operating at 65 kHz. IC Role / Device Role / Timing Role: Dual-output architecture supplies main gate drive (OUT) and localized turnoff path (PILOT) to minimize loop inductance and suppress dV/dt-induced oscillations. Use Value: Achieves 20 V/ns dV/dt on drain node with <5% overshoot, meeting EN 61000-3-2 harmonic limits without added snubbers. | Use Scenario: Driving GaN HEMTs (e.g., EPC2016) in 1-MHz LLC resonant converters for server VRMs. IC Role / Device Role / Timing Role: Provides 5-V compatible gate drive with <40 ns total propagation delay (tD-ON + tD-OFF), supporting tight dead-time control required for zero-voltage switching. Use Value: Enables >95% full-load efficiency at 1 MHz by minimizing gate drive losses and eliminating external gate resistors needed for slew-rate control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-side gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC27524ADRMR | Single 5-A sink/source driver; no PILOT output; 13-V max input; 10.5 ns tD-ON (VDD = 12 V). | Lacks complementary turnoff path-requires external circuitry for Miller-effect suppression in high-dV/dt designs. | Select when cost sensitivity outweighs need for integrated turnoff FET control and layout space permits discrete solutions. |
| LM5114SD/NOPB | 5-A sink/source; includes dedicated shutdown pin; 15-V max input; 12 ns tD-ON (VDD = 12 V); no PILOT output. | No timing-controlled complementary output-cannot implement local turnoff FET sequencing without additional logic. | Choose when system-level shutdown coordination is critical and PILOT functionality is not required for the target FET topology. |
Compared with UCC27524ADRMR and LM5114SD/NOPB, LM5134BSD/NOPB uniquely integrates a timing-synchronized PILOT output to enable local turnoff FET placement-reducing gate-loop inductance by >70% versus discrete solutions and eliminating false turnon in >100-V/ns switching applications.
Availability
LM5134BSD/NOPB is available at Aetrix Electronics and suitable for motor drivers, solid-state power controllers, and power factor correction converters requiring stable component supply, long-term manufacturability, and TI-qualified automotive-grade traceability.
Supply support for LM5134BSD/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader designing analog ICs, embedded processors, and digital signal processors for industrial, automotive, and communications markets.
The LM5134BSD/NOPB belongs to TI's high-performance gate driver product line, engineered specifically for high-current, high-speed switching in power conversion systems where Miller-effect immunity and layout-independent turnoff control are critical.
FAQ
What is the function of the PILOT pin on the LM5134BSD/NOPB?
The PILOT pin on the LM5134BSD/NOPB provides a complementary gate drive output timed to activate 4.2 ns after the main OUT pin turns off (tPD-ON), enabling direct control of an external turnoff MOSFET placed near the power FET. This minimizes gate-loop inductance and suppresses false turnon caused by dV/dt coupling-critical in high-frequency PFC and motor drive applications. The LM5134BSD/NOPB's PILOT output delivers 820-mA peak sink current to ensure reliable local turnoff.
Does the LM5134BSD/NOPB support both TTL and CMOS logic inputs?
Yes-the LM5134BSD/NOPB supports both TTL and CMOS logic inputs via two variants: LM5134A uses CMOS thresholds (VIH = 0.67×VDD), while LM5134B uses TTL thresholds (VIH = 2.4 V fixed). The LM5134BSD/NOPB is the LM5134B variant, offering 2.4-V logic-high threshold and 0.8-V logic-low threshold across –40°C to +125°C, ensuring compatibility with 3.3-V microcontrollers and 5-V PWM controllers without level shifting.
What is the maximum allowable input voltage on the IN and INB pins of the LM5134BSD/NOPB?
The IN and INB pins of the LM5134BSD/NOPB tolerate up to 14 V regardless of VDD voltage, as specified in Absolute Maximum Ratings. This allows direct connection to 12-V analog controllers (e.g., UC3845) or 5-V digital logic without external clamping diodes or resistive dividers-simplifying interface design and improving noise immunity. The LM5134BSD/NOPB maintains valid logic operation within its recommended 4–12.6-V VDD range while accepting these higher input voltages safely.
How does the LM5134BSD/NOPB handle undervoltage conditions on the VDD pin?
The LM5134BSD/NOPB incorporates an undervoltage lockout (UVLO) circuit with a 3.25-V threshold (rising) and 0.36-V hysteresis. When VDD drops below this threshold, the LM5134BSD/NOPB disables both OUT and PILOT outputs and activates an internal PNP transistor to clamp the OUT pin below 1.0 V-ensuring the driven MOSFET remains fully off even during brownout. This prevents partial turnon and shoot-through, enhancing system safety in unstable supply environments.
Can the LM5134BSD/NOPB drive GaN FETs effectively?
Yes-the LM5134BSD/NOPB supports GaN FETs via its 4–12.6-V VDD range, 4.5-A peak source current, and <40 ns total propagation delay (tD-ON + tD-OFF). Its 5-V compatible operation aligns with GaN gate requirements (e.g., EPC2016), while the PILOT output enables local turnoff FET control to mitigate GaN's high dV/dt sensitivity. The LM5134BSD/NOPB's 0.15-Ω typical pull-down resistance ensures fast gate discharge critical for >1-MHz switching in GaN-based VRMs and adapters.
LM5134BSD/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Single
- Number of Drivers:
- 1
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 4V ~ 12.6V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.4V
- Current - Peak Output (Source, Sink):
- 4.5A, 7.6A
- Input Type:
- Inverting, Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 3ns, 2ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (3x3)
LM5134BSD/NOPB FAQ
1.How can I place an order for LM5134BSD/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LM5134BSD/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LM5134BSD/NOPB reliable?
The price and inventory of LM5134BSD/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LM5134BSD/NOPB is usually 5 days.
3.What payment methods are accepted for LM5134BSD/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LM5134BSD/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LM5134BSD/NOPB?
LM5134BSD/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LM5134BSD/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LM5134BSD/NOPB?
For technical support, including LM5134BSD/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LM5134BSD/NOPB requirements.
6.How does Aetrix verify that LM5134BSD/NOPB is sourced from the original manufacturer or authorized distributors?
All LM5134BSD/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LM5134BSD/NOPB meets industry standards.
7.What is the process for return or replacement of LM5134BSD/NOPB?
All LM5134BSD/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LM5134BSD/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LM5134BSD/NOPB part is unused and in its original packaging.
Return procedure for LM5134BSD/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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