Texas Instruments LMG3526R030RQSR
- Part No.:
- LMG3526R030RQSR
- Manufacturer:
- Texas Instruments
- Category:
- Power Driver Modules
- Package:
- 52-VQFN Exposed Pad
- Datasheet:
-
LMG3526R030RQSR.pdf
- Description:
- 650-V 30-M GAN FET WITH INTEGRAT
- Quantity:
- Payment:

- Shipping:

Inventory:1,799
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Product details
Overview
LMG3526R030 from Texas Instruments is a 650V, 30mΩ GaN FET with integrated gate driver, cycle-by-cycle overcurrent protection (<100 ns response), zero-voltage detection (ZVD), and digital temperature PWM reporting. It operates from 7.5V–18V supply, supports up to 2 MHz switching, and delivers 20–150 V/ns slew rate control for EMI-optimized hard- and soft-switching in high-density power converters.
For engineers reviewing the LMG3526R030 datasheet, LMG3526R030 pinout, LMG3526R030 application, or LMG3526R030 equivalent, this device is selected for high-efficiency, high-frequency DC/DC and AC/DC designs where fast transient fault response, thermal monitoring, and ZVS-enabling timing signals are required - especially in telecom rectifiers, server PSUs, and solar inverters.
Technical Context
The LMG3526R030 integrates a silicon-based gate driver with precision bias generation, enabling robust 650V GaN switching with 200 V/ns hold-off capability. Its ZVD output provides a pulse-synchronized signal indicating successful zero-voltage switching, with <30 ns delay from IN rise to ZVD pulse edge and 75–140 ns pulse width.
Protection architecture includes latched short-circuit detection (75–105 A threshold), overtemperature shutdown (175°C GaN junction), and UVLO on both VDD (6.4–7.6 V) and VNEG (–13.3 to –12.1 V). Thermal management uses a 9 kHz PWM output encoding junction temperature from 0.3% duty cycle at 25°C to 82% at 150°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS Rating | 650 V maximum drain-source voltage; withstands 720 V surge during hard-switching without failure |
| RDS(on) | 35 mΩ typical at 25°C; enables low conduction loss in high-current, high-frequency topologies |
| Slew Rate Range | 20–150 V/ns via RDRV pin resistor; allows real-time EMI mitigation and switching loss trade-off |
| ZVD Pulse Timing | 15–30 ns delay from IN rise to ZVD pulse edge; confirms ZVS achievement within same switching cycle |
| Fault Response Time | <100 ns overcurrent detection; ensures sub-microsecond shutdown before destructive energy accumulation |
| Thermal Reporting | 9 kHz PWM output with duty cycle linearly encoding junction temperature (0.3–82% over –40°C to 150°C) |
| Package | 52-pin VQFN (RQS), 12 mm × 12 mm top-side cooled; separates thermal and electrical paths to minimize power loop inductance |
Pinout & Package
Package: 52-pin VQFN (RQS), 12.00 mm × 12.00 mm, top-side cooled with exposed thermal pad internally connected to SOURCE and NC2 pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DRAIN (Pins 2–15) | GaN FET drain node | High-voltage power terminal; electrically tied to NC1 anchors; handles 650 V blocking and 55 A RMS current |
| SOURCE (Pins 18–26, 28–39) | GaN FET source reference | Power return path; internally bonded to thermal pad and NC2 anchors for low-inductance thermal dissipation |
| VNEG (Pins 40, 41) | Buck-boost converter negative rail | Provides –14 V turn-off bias; requires 2.2 µF bypass capacitor to SOURCE for stable gate control |
| ZVD (Pin 48) | Zero-voltage detection output | Push-pull pulse output active only in LMG3526R030; signals ZVS event with 75–140 ns width and <30 ns latency |
| TEMP (Pin 49) | Digital temperature reporting | 9 kHz fixed-frequency PWM; duty cycle directly encodes GaN junction temperature for closed-loop thermal management |
| RDRV (Pin 50) | Slew rate programming input | Resistor-to-SOURCE sets drive strength: 0 Ω → 150 V/ns, 300 kΩ → 20 V/ns, 5 V → 90 V/ns |
Key Features
| Feature | Design Value |
|---|---|
| Integrated gate driver with precision bias | Eliminates external bias supplies and reduces layout sensitivity while improving SOA vs discrete drivers |
| Adjustable slew rate (20–150 V/ns) | Enables dynamic EMI compliance tuning without hardware change - critical for CISPR-32 Class B systems |
| Zero-voltage detection (ZVD) | Hardware-level ZVS confirmation enables adaptive dead-time control and eliminates blind timing margins in resonant converters |
| Robust fault protection suite | Simultaneous OCP, SCP, OTP, UVLO, and ZVD status reporting ensures single-event fault containment in <100 ns |
| Top-side cooled VQFN package | Thermal pad isolated from electrical pins reduces power loop inductance below 0.5 nH - essential for >1 MHz operation |
Applications
| Telecom Rectifiers | Server Power Supplies |
|---|---|
Use Scenario: High-efficiency 48 V input rectification in distributed power architectures with strict 500 kHz–1 MHz switching requirements. IC Role / Device Role / Timing Role: Primary-side GaN switch with ZVD feedback enabling precise adaptive dead-time control in LLC resonant converters. Use Value: Achieves >98% peak efficiency at 3 kW with 30% smaller magnetics due to 2 MHz capability and low RDS(on). | Use Scenario: 12 V output, 1.5 kW CRPS-compliant AC/DC front-end with multi-phase interleaving and thermal derating. IC Role / Device Role / Timing Role: High-side GaN switch with digital temperature PWM enabling per-device thermal throttling across parallel phases. Use Value: Enables 40 W/cm³ power density and 15°C lower hotspot temperature vs Si MOSFET equivalents under 40 A RMS load. |
| Solar Inverters | Industrial Motor Drives |
Use Scenario: DC-link switching in string inverters with 1000 V bus and variable MPPT voltage (600–900 V). IC Role / Device Role / Timing Role: 650 V GaN half-bridge switch with surge-rated 720 V capability and ZVD-assisted soft-switching in T-type NPC topology. Use Value: Reduces switching losses by 65% vs 650 V SiC MOSFETs at 100 kHz, extending inverter lifetime in high-temperature environments. | Use Scenario: 400 V three-phase inverter stage in servo drives requiring <500 ns fault clearance for IEC 61800-5-1 compliance. IC Role / Device Role / Timing Role: Phase-leg switch with sub-100 ns overcurrent shutdown and integrated temperature monitoring for predictive maintenance. Use Value: Eliminates need for external current sensors and analog thermal ICs, reducing BOM count by 3 components per phase. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage GaN FET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMG3522R030 | No ZVD or ZCD outputs; lacks zero-voltage/zero-current detection functionality | Suitable for hard-switched topologies without resonant or soft-switching requirements | Select when ZVS/ZCS timing signals are unnecessary and cost optimization is prioritized |
| LMG3527R030 | Replaces ZVD with ZCD output; detects positive drain current instead of zero-voltage condition | Optimized for zero-current switching (ZCS) in phase-shifted full-bridge or dual-active-bridge converters | Choose for ZCS-based isolation topologies where current zero-crossing timing is more critical than voltage zero-crossing |
Compared with LMG3522R030 and LMG3527R030, the LMG3526R030 uniquely provides ZVD output for real-time ZVS validation - enabling tighter dead-time control and higher efficiency in LLC and resonant converters where voltage-based soft-switching is dominant.
Availability
LMG3526R030 is available at Aetrix Electronics and suitable for merchant telecom rectifiers, server PSUs, and solar inverters requiring stable component supply, long-term lifecycle support, and traceable GaN sourcing.
Supply support for LMG3526R030 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and power management technologies with over 50 years of power device innovation.
The LMG352xR030 family was designed specifically for high-frequency, high-density switch-mode power conversion - targeting next-generation data center, renewable energy, and industrial motor control systems demanding integrated protection and intelligent thermal feedback.
FAQ
What is the maximum operating frequency of the LMG3526R030?
The LMG3526R030 supports up to 2 MHz switching frequency in soft-switched conditions. Maximum frequency is derated below 9 V VDD supply. Hard-switching operation is validated at lower frequencies depending on layout parasitics and thermal management - typical design targets range from 300 kHz to 1 MHz for high-power applications. The LMG3526R030's 20–150 V/ns slew rate control allows optimization for either speed or EMI at any given frequency.
How does the ZVD pin function in the LMG3526R030?
The ZVD pin on the LMG3526R030 outputs a push-pull pulse (75–140 ns wide) when zero-voltage switching is detected during the turn-on transition. This occurs after a minimum third-quadrant conduction time (42–56 ns), with 15–30 ns delay from the IN rising edge. The LMG3526R030 uses this hardware-level signal to enable adaptive dead-time control without external sensing - a feature exclusive to the LMG3526R030 within the LMG352xR030 family.
What thermal information does the TEMP pin provide for the LMG3526R030?
The TEMP pin on the LMG3526R030 delivers a fixed 9 kHz PWM signal whose duty cycle encodes the GaN FET junction temperature: 0.3–6% at 25°C, 36–44% at 85°C, 59–70% at 125°C, and 82% at 150°C. This allows direct microcontroller ADC sampling without external thermistors or signal conditioning. The LMG3526R030's thermal reporting is calibrated across –40°C to 150°C and referenced to the GaN die - not the case or PCB.
What protection features are integrated into the LMG3526R030?
The LMG3526R030 integrates cycle-by-cycle overcurrent protection (60–80 A threshold), latched short-circuit protection (75–105 A), GaN junction overtemperature shutdown (175°C), VDD UVLO (6.4–7.6 V), and VNEG UVLO (–13.3 to –12.1 V). All faults assert the FAULT pin low within <100 ns. Unlike discrete solutions, these protections operate autonomously without MCU intervention - a core safety feature of the LMG3526R030.
Can the LMG3526R030 be used in place of the LMG3527R030?
No - the LMG3526R030 and LMG3527R030 are not interchangeable. The LMG3526R030 provides ZVD output for zero-voltage detection, while the LMG3527R030 provides ZCD output for zero-current detection. Their pin 48 functions differ fundamentally: ZVD responds to VDS ≈ 0 V, ZCD responds to ID > 0 A. Substituting the LMG3526R030 for LMG3527R030 would disable ZCS timing in topologies relying on current zero-crossing, and vice versa. Both share identical pinout and package but differ in internal detection logic.
LMG3526R030RQSR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 52-VQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- MOSFET
- Configuration:
- Half Bridge Inverter
- Current:
- 55 A
- Voltage:
- 650 V
- Voltage - Isolation:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount, Wettable Flank
LMG3526R030RQSR FAQ
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7.What is the process for return or replacement of LMG3526R030RQSR?
All LMG3526R030RQSR units undergo pre-shipment inspection (PSI). If there is an issue with LMG3526R030RQSR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LMG3526R030RQSR part is unused and in its original packaging.
Return procedure for LMG3526R030RQSR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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