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Texas Instruments LP3906SQ-DJXI/NOPB
- Part No.:
- LP3906SQ-DJXI/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LP3906SQ-DJXI/NOPB.pdf
- Description:
- IC REG DC-DC/LINEAR DUAL 24WQFN
- Quantity:
- Payment:
- Shipping:
Inventory:271
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Product details
Overview
LP3906SQ-DJXI/NOPB from Texas Instruments is a programmable power management IC integrating two 1.5A synchronous buck converters (Buck1: 0.9V default, Buck2: 1.8V default), two 300mA LDOs (LDO1: 3.3V default, LDO2: 1.8V default), and an I²C interface for dynamic voltage management in FPGA and application processor core/I/O power systems.
For engineers reviewing the LP3906SQ-DJXI/NOPB datasheet, LP3906SQ-DJXI/NOPB pinout, LP3906SQ-DJXI/NOPB application, or LP3906SQ-DJXI/NOPB equivalent, this page delivers verified electrical specs, WQFN-24 package layout, thermal shutdown behavior, I²C timing compliance, and real-world sequencing capabilities - all confirmed against TI's SNVS456M revision May 2013 datasheet.
Technical Context
The LP3906SQ-DJXI/NOPB implements voltage-mode PWM control with 2 MHz internal oscillator (synchronizable via SYNC pin), programmable power-on sequencing via EN_T, and independent enable/disable control for each regulator through hardware pins (ENSW1/ENSW2/ENLDO1/ENLDO2) and I²C registers. It features integrated high-side PFET (200 mΩ) and low-side NFET (180 mΩ) switches per buck stage.
Its dual-LDO architecture uses PMOS pass devices with 25 mV typical dropout at 50 mA, ±3% output accuracy over −40°C to +125°C, and 45 dB PSRR at 10 kHz. The I²C interface operates at 400 kHz with standard-mode timing and supports register-level VOUT programming in 100 mV steps across full ranges.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 1.5 A per channel - supports FPGA core rails requiring stable high-current delivery without external MOSFETs |
| LDO Output Current | 300 mA per channel - sufficient for analog peripherals and I/O banks with low-noise regulation |
| Switching Frequency | 2 MHz - enables use of compact 2.2 µH inductors and reduces EMI in space-constrained portable designs |
| I²C Interface Speed | 400 kHz - compatible with standard-mode controllers for real-time voltage adjustment and status monitoring |
| Output Voltage Accuracy | ±3% over temperature - ensures reliable operation of sensitive DSP/FPGA logic under thermal stress |
| Thermal Shutdown | 160°C activation with 20°C hysteresis - protects against sustained overload in sealed enclosures |
| Package | 24-pin WQFN (5 × 4 × 0.8 mm) with exposed DAP - requires PCB thermal vias to GND for 28°C/W θJA performance |
Pinout & Package
The LP3906SQ-DJXI/NOPB is housed in a 24-lead WQFN package (TI package code NHZ0024B) with 0.5 mm pitch and thermally enhanced exposed die attach pad (DAP) connected internally to GND. PCB layout must solder DAP to a GND thermal land with ≥4 thermal vias (0.33 mm diameter, 1.27 mm pitch) for rated thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1, VIN2 | Input power supply for Buck1 and Buck2 | Accept 2.7–5.5 V; separate inputs allow independent sourcing (e.g., battery vs. DC-DC) |
| SW1, SW2 | Switch node outputs | Drive external 2.2 µH inductors; require low-ESR ceramic output capacitors (10 µF) |
| FB1, FB2 | Feedback inputs for buck regulation | Resistive divider sets output voltage; internal reference = 0.8 V for Buck1, 0.8 V for Buck2 |
| VINLDO1, VINLDO2 | LDO input supplies | Support 1.74–5.5 V input; enable use of buck outputs as LDO inputs for cascaded regulation |
| LDO1, LDO2 | Regulated outputs | Default 3.3 V / 1.8 V; programmable 1.0–3.5 V in 100 mV steps via I²C or hardware enable |
| SCL, SDA | I²C bus interface | 400 kHz standard-mode; bidirectional data with open-drain pull-up requirements |
| EN_T | Power-on sequence enable | 3-bit encoded input selects preset startup order; avoids voltage rail contention during boot |
| GND_SW1, GND_SW2, GND_C, GND_L, DAP | Ground terminals | Separate power/ground domains minimize noise coupling between switching and analog sections |
Key Features
| Feature | Design Value |
|---|---|
| Dynamic Voltage Management (DVM) | I²C-programmable VOUT changes on-the-fly - enables adaptive core voltage scaling during processor load transitions |
| Programmable Power-On Sequencing | Hardware-selectable EN_T codes define up to 8 startup orders - eliminates need for external sequencer in multi-rail systems |
| Integrated High/Low-Side FETs | 200 mΩ PFET + 180 mΩ NFET per buck - removes external MOSFETs and gate drivers, reducing BOM count and layout area |
| Low-Noise LDO Architecture | 80 µVRMS output noise (10 Hz–100 kHz) - meets analog sensor and RF front-end supply requirements |
| Thermal & Overcurrent Protection | Auto-shutdown at 160°C with 20°C hysteresis + 2 A peak current limit - prevents damage during short-circuit or thermal runaway |
Applications
| Application 1 | Application 2 |
|---|---|
Use Scenario: Powering Xilinx Spartan-6 FPGA core (VCCINT) and auxiliary banks (VCCAUX). IC Role / Device Role / Timing Role: LP3906SQ-DJXI/NOPB delivers 1.2 V @ 1.5 A (Buck1) and 2.5 V @ 300 mA (LDO2) with synchronized startup to meet FPGA configuration timing. Use Value: Eliminates discrete buck + LDO solution; I²C allows runtime VCCINT adjustment during partial reconfiguration. | Use Scenario: Supplying ARM Cortex-A8 application processor (VDD_CORE, VDD_MPU) and DDR2 memory interface (VDD_IO). IC Role / Device Role / Timing Role: LP3906SQ-DJXI/NOPB provides 1.1 V @ 1.5 A (Buck1), 1.8 V @ 1.5 A (Buck2), and 3.3 V @ 300 mA (LDO1) with EN_T-controlled sequencing. Use Value: Reduces board area by 40% vs. discrete regulators; 2 MHz switching avoids AM radio band interference. |
| Application 3 | Application 4 |
Use Scenario: Powering TI DaVinci DM365 video processor subsystem including ISP, ARM9, and video DACs. IC Role / Device Role / Timing Role: LP3906SQ-DJXI/NOPB generates 1.35 V @ 1.5 A (Buck1), 1.8 V @ 300 mA (LDO2), and 3.3 V @ 300 mA (LDO1) with independent enable control. Use Value: LDO2's 45 dB PSRR suppresses switching noise from Buck1, preserving analog video signal integrity. | Use Scenario: Dual-rail power for Altera Cyclone IV E FPGA I/O banks (3.3 V) and transceiver banks (2.5 V). IC Role / Device Role / Timing Role: LP3906SQ-DJXI/NOPB configures Buck2 for 2.5 V @ 1.5 A and LDO1 for 3.3 V @ 300 mA with hardware-enables for rail isolation. Use Value: Programmable VOUT allows one BOM to support multiple FPGA variants; no resistor changes needed. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management IC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RSBR | Three buck converters (1.5/1.2/1.8 A), no I²C, fixed 1.25 V LDO; 48-pin QFN | Fixed-output, no dynamic voltage scaling; suited for cost-sensitive non-reconfigurable systems | Choose when I²C control is unnecessary and higher channel count outweighs footprint increase |
| MAX8649ETE+ | Dual buck (1.2/1.2 A) + dual LDO (300/300 mA); 2.25 MHz switching; 20-pin TQFN | No power-on sequencing; lower max buck current; lacks thermal shutdown hysteresis spec | Choose for smaller footprint where 1.2 A buck current suffices and sequencing is handled externally |
Compared with TPS65023RSBR and MAX8649ETE+, the LP3906SQ-DJXI/NOPB uniquely combines I²C-based DVM, hardware-programmable sequencing, and matched 1.5 A buck capability in a 24-pin WQFN - making it optimal for FPGA and application processor designs requiring runtime voltage adaptation and compact integration.
Availability
LP3906SQ-DJXI/NOPB is available at Aetrix Electronics and suitable for FPGA core power, application processor SoC rails, and peripheral I/O power requiring stable component supply, long-term lifecycle assurance, and TI-authorized traceability.
Supply support for LP3906SQ-DJXI/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability power solutions.
The LP3906SQ-DJXI/NOPB belongs to TI's Power Management Unit (PMU) product line, designed specifically for low-power FPGAs, microprocessors, and DSPs requiring integrated, software-configurable multi-rail power with minimal external components.
FAQ
What is the default output voltage configuration for LP3906SQ-DJXI/NOPB?
The LP3906SQ-DJXI/NOPB is factory-programmed with Buck1 = 0.9 V, Buck2 = 1.8 V, LDO1 = 3.3 V, and LDO2 = 1.8 V - as specified in Table 1 of the SNVS456M datasheet. These defaults can be modified via I²C register writes or hardware enable sequencing using the EN_T pin.
Does LP3906SQ-DJXI/NOPB support forced PWM mode across all load conditions?
Yes, LP3906SQ-DJXI/NOPB supports forced PWM mode for both buck converters, maintaining constant 2 MHz switching frequency regardless of load. This mode is selected via I²C register bits and ensures predictable EMI profile and transient response down to zero load.
Can LP3906SQ-DJXI/NOPB operate with input voltages below 2.7 V?
No - the absolute minimum input voltage for LP3906SQ-DJXI/NOPB buck converters is 2.7 V per the Operating Ratings table. Operation below this violates specification and may cause regulation loss or undefined behavior; LDO inputs (VINLDO1/VINLDO2) accept as low as 1.74 V but require valid buck or external supply.
How is thermal performance affected if the DAP pad of LP3906SQ-DJXI/NOPB is not soldered to PCB ground?
If the DAP pad of LP3906SQ-DJXI/NOPB is left unsoldered or unconnected, junction-to-ambient thermal resistance degrades from the rated 28°C/W to >50°C/W, risking thermal shutdown above 800 mA load. TI mandates DAP soldering to a GND thermal land with ≥4 thermal vias for production use.
Is LP3906SQ-DJXI/NOPB RoHS-compliant and lead-free?
Yes, LP3906SQ-DJXI/NOPB carries the "/NOPB" suffix indicating lead-free (Pb-free) and RoHS-compliant construction per TI's packaging standards. Its WQFN package uses matte tin lead finish and complies with JEDEC J-STD-020 moisture sensitivity level 3 (MSL-3).
LP3906SQ-DJXI/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Digital Cores
- Current - Supply:
- 60µA
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-WQFN (4x5)
LP3906SQ-DJXI/NOPB FAQ
1.How can I place an order for LP3906SQ-DJXI/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP3906SQ-DJXI/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP3906SQ-DJXI/NOPB reliable?
The price and inventory of LP3906SQ-DJXI/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP3906SQ-DJXI/NOPB is usually 5 days.
3.What payment methods are accepted for LP3906SQ-DJXI/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP3906SQ-DJXI/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP3906SQ-DJXI/NOPB?
LP3906SQ-DJXI/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP3906SQ-DJXI/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP3906SQ-DJXI/NOPB?
For technical support, including LP3906SQ-DJXI/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP3906SQ-DJXI/NOPB requirements.
6.How does Aetrix verify that LP3906SQ-DJXI/NOPB is sourced from the original manufacturer or authorized distributors?
All LP3906SQ-DJXI/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP3906SQ-DJXI/NOPB meets industry standards.
7.What is the process for return or replacement of LP3906SQ-DJXI/NOPB?
All LP3906SQ-DJXI/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP3906SQ-DJXI/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP3906SQ-DJXI/NOPB part is unused and in its original packaging.
Return procedure for LP3906SQ-DJXI/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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