Texas Instruments LP3913SQ-ADJ/NOPB
- Part No.:
- LP3913SQ-ADJ/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
LP3913SQ-ADJ/NOPB.pdf
- Description:
- IC POWER MGMT 48WQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LP3913SQ-ADJ/NOPB from Texas Instruments is a programmable power management IC optimized for flash-based portable media players, integrating two 150 mA LDOs (LDO1 adjustable 1.8 V–3.3 V, LDO2 fixed 3.3 V), three DVS buck converters (Buck1 adjustable 0.8 V–2.0 V, Buck2 adjustable 1.8 V–3.3 V, Buck3 fixed 3.3 V), an 8-bit 4-channel ADC, and a linear Li-ion charger with USB/adapter dual-source support and LED status drivers.
For engineers reviewing the LP3913SQ-ADJ/NOPB datasheet, LP3913SQ-ADJ/NOPB pinout, LP3913SQ-ADJ/NOPB application, or LP3913SQ-ADJ/NOPB equivalent, this device serves as a system-level PMIC for battery-powered multimedia SoC platforms requiring dynamic voltage scaling, precise charge control, analog monitoring, and low-noise analog rail generation - especially where I²C-programmable output voltages and thermal/battery supervision are critical.
Technical Context
The LP3913SQ-ADJ/NOPB implements a multi-rail power architecture with independent enable/control of each regulator via I²C interface (400 kHz), supporting dynamic voltage scaling for CPU, memory, and display subsystems. Its integrated Li-ion charger features selectable termination voltages (4.1 V / 4.2 V / 4.38 V), ±0.35% accuracy at 4.2 V, and programmable end-of-charge current (0.05C / 0.1C).
Battery supervision includes continuous voltage monitoring, thermistor-based temperature sensing (TS pin), over-temperature interrupt (115 °C alert, 160 °C shutdown), and 10-hour safety timer. The 4-channel ADC measures battery voltage (ADC1), charge current (via ISENSE), and two user-defined analog inputs (ADC2, optional channels) with ±1 LSB INL/DNL performance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| LDO1 Output | Adjustable 1.8 V–3.3 V in 100 mV steps; supports core logic or I/O rails requiring low-noise, stable bias |
| LDO2 Output | Fixed 3.3 V, 150 mA; optimized for low-noise analog circuits (e.g., audio codec, touchscreen controller) |
| Buck1 Output | Adjustable 0.8 V–2.0 V in 50 mV steps; supplies CPU cores with DVS capability and ≤3% static output tolerance |
| Buck2 Output | Adjustable 1.8 V–3.3 V; powers SDRAM/DDR interfaces or display backlight drivers with PFM/PWM auto-mode switching |
| Charger Full-Rate Current | 100 mA (USB-limited) or 1000 mA (wall adapter); supports single-cell Li-ion/polymer with 50 mΩ internal path resistance |
| ADC Resolution | 8-bit dual-slope; measures battery voltage, charge current, and two auxiliary analog signals with ±1 LSB linearity |
| I²C Interface | 400 kHz compatible; enables real-time configuration of all regulators, charger parameters, and interrupt masks |
Pinout & Package
LP3913SQ-ADJ/NOPB is housed in a thermally enhanced 6 mm × 6 mm × 0.8 mm 48-pin WQFN package (NJV0048A), with exposed thermal pad for PCB heat dissipation and 25°C/W junction-to-ambient thermal resistance.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| TS | Battery temperature sense input | Connects to NTC thermistor; enables thermal regulation and charge suspension above 115 °C |
| VIN1–VIN4 | Power inputs for LDOs and bucks | VIN1 feeds LDO1/LDO2; VIN2–VIN4 feed Buck1–Buck3; all require external shorting to shared VDD rails |
| VLDO1 / VLDO2 | LDO output terminals | VLDO1 is adjustable (1.8 V–3.3 V); VLDO2 is fixed 3.3 V; both rated for 150 mA continuous load |
| VBUCK1–VBUCK3 | Buck converter outputs | VBUCK1 (0.8 V–2.0 V), VBUCK2 (1.8 V–3.3 V), VBUCK3 (fixed 3.3 V); each supports up to 600/600/500 mA |
| I2C_SDA / I2C_SCL | I²C bidirectional data/clock | 400 kHz interface for full register access; supports read/write of voltage settings, charger config, ADC results, and IRQ status |
| CHG / STAT | LED status outputs | CHG (red) indicates active charging; STAT (green) blinks at 1 Hz during CV phase and stays high when fully charged |
| IRQB | Open-drain interrupt output | Active-low signal with 8 configurable sources (e.g., thermal fault, EOC, battery low, ADC threshold) |
Key Features
| Feature | Design Value |
|---|---|
| Dual-source Li-ion charging | Seamlessly switches between USB (100/500/800 mA limit) and wall adapter (up to 1000 mA) with priority to adapter and no system interruption |
| Dynamic Voltage Scaling (DVS) | Three independent buck converters support real-time voltage adjustment via I²C to match SoC performance states and reduce dynamic power |
| Integrated analog monitoring | 4-channel 8-bit ADC measures battery voltage, charge current (via 4.64 kΩ sense resistor), and two user analog inputs for fuel gauging or thermal profiling |
| Thermal and battery supervision | On-die thermal sensor, 115 °C alert + 160 °C shutdown, battery voltage monitoring, and 10-hour safety timer prevent overcharge and thermal runaway |
| Low-noise analog LDO | LDO2 delivers 3.3 V with 50 µVrms output noise (10 Hz–100 kHz) and 50 dB PSRR at 1 kHz - suitable for audio, RF, or precision analog circuitry |
Applications
| Portable Media Player Power System | Handheld Gaming Device PMIC |
|---|---|
|
Use Scenario: Powering ARM-based SoC with separate CPU, GPU, DDR, and audio subsystems in a flash-memory-based MP4 player. IC Role / Device Role / Timing Role: Central PMIC managing sequencing, DVS for CPU/GPU, low-noise 3.3 V for audio codec, and Li-ion charge control with LED status feedback. Use Value: Reduces BOM count by integrating 5 regulators, charger, ADC, and supervisor; eliminates need for discrete charge IC and analog monitor IC. |
Use Scenario: Supplying variable-voltage rails to application processor, LCD backlight driver, and touch controller in a battery-powered gaming handheld. IC Role / Device Role / Timing Role: Provides dynamically scaled core voltage (Buck1), I/O voltage (Buck2), display rail (Buck3), and clean analog supply (LDO2) while monitoring battery health. Use Value: Enables runtime optimization of processor performance vs. battery life; built-in ADC supports battery fuel gauging without external coulomb counter. |
| Portable Navigation System PMU | USB-Powered Portable Audio Recorder |
|
Use Scenario: Managing power for GPS baseband, RF front-end, TFT display, and SD card interface in a vehicle-independent navigation device. IC Role / Device Role / Timing Role: Delivers low-noise 3.3 V (LDO2) to RF section, DVS-adjusted core voltage (Buck1), and regulated 3.3 V (Buck3) to display; monitors battery temp/voltage via ADC. Use Value: Prevents RF interference from switching noise; thermal sensing ensures safe operation during extended GPS use in hot environments. |
Use Scenario: Powering stereo audio ADC/DAC, microSD interface, and OLED display in a field recorder that charges via USB or AC adapter. IC Role / Device Role / Timing Role: Supplies clean 3.3 V (LDO2) to audio circuitry, adjustable 1.8 V (Buck2) to SDIO, and manages dual-source charging with automatic source selection. Use Value: Eliminates audible switching noise in audio path; USB suspend detection (USBSUSP) reduces quiescent current to 30 µA during idle. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management IC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LP3910SQX-AA/NOPB | Pin-for-pin and software-compatible; fixed-output variant (LDO1 = 2.0 V, LDO2 = 3.3 V, Buck1 = 1.2 V, Buck2 = 3.3 V, Buck3 = 3.3 V); no adjustable outputs | Suitable for cost-sensitive designs where voltage flexibility is unnecessary and fixed rails suffice | Select LP3910SQX-AA/NOPB only if system requires no runtime voltage adjustment and uses identical fixed rail assignments |
| TPS65023RSBR | Triple buck (600/600/300 mA), dual LDO (250/250 mA), integrated USB/DC charger, but lacks ADC and battery temperature sensing; 48-QFN package | Targets broader portable applications (e.g., smartphones) but omits analog monitoring functions critical for fuel gauging | Choose TPS65023RSBR when higher current bucks or additional LDO headroom are needed, but accept loss of integrated ADC and TS functionality |
Compared with LP3913SQ-ADJ/NOPB, LP3910SQX-AA/NOPB offers identical integration and footprint but sacrifices programmability, while TPS65023RSBR trades analog monitoring for higher current capacity and broader market targeting - making LP3913SQ-ADJ/NOPB uniquely suited for flash-media devices requiring adaptive voltage control and battery telemetry.
Availability
LP3913SQ-ADJ/NOPB is available at Aetrix Electronics and suitable for portable media players, handheld gaming devices, and portable navigation systems requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for LP3913SQ-ADJ/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in battery-powered portable electronics.
The LP3913 product line was designed specifically for flash-memory-based portable media players, integrating power conversion, battery charging, analog monitoring, and system supervision into a single compact PMIC to replace multiple discrete ICs.
FAQ
What output voltages are adjustable on the LP3913SQ-ADJ/NOPB?
The LP3913SQ-ADJ/NOPB supports adjustable outputs on LDO1 (1.8 V–3.3 V in 100 mV steps), Buck1 (0.8 V–2.0 V in 50 mV steps), and Buck2 (1.8 V–3.3 V). LDO2 and Buck3 are fixed at 3.3 V. All adjustments are made via I²C register writes - no external resistors required. This configurability allows LP3913SQ-ADJ/NOPB to adapt to varying SoC voltage requirements across design iterations.
Does the LP3913SQ-ADJ/NOPB support simultaneous USB and wall adapter charging?
No - the LP3913SQ-ADJ/NOPB implements source priority: when both USBPWR and CHG_DET are valid, the wall adapter takes precedence and USB is automatically disabled. The transition is seamless with no system reset or power interruption. LP3913SQ-ADJ/NOPB does not parallel charge sources; it selects one active source based on voltage and detection timing per TI's power routing architecture.
How does the LP3913SQ-ADJ/NOPB handle battery temperature monitoring?
The LP3913SQ-ADJ/NOPB uses the TS pin to interface with an external NTC thermistor, measuring battery temperature continuously. Internal comparators trigger alerts at 115 °C (TTH-ALERT) and thermal shutdown at 160 °C (TSD), with 20 °C hysteresis. The measured temperature also influences charge current derating and can be read via the ADC - a key function for safe fast-charging in LP3913SQ-ADJ/NOPB-based designs.
What is the role of the ISENSE pin on the LP3913SQ-ADJ/NOPB?
The ISENSE pin on LP3913SQ-ADJ/NOPB connects to a 4.64 kΩ resistor between the pin and AGND, enabling the internal ADC to measure charge current by sensing the voltage drop across the resistor. This provides real-time current feedback for CC/CV charging control, end-of-charge detection, and fuel gauging - eliminating the need for an external current-sense amplifier in LP3913SQ-ADJ/NOPB implementations.
Can the LP3913SQ-ADJ/NOPB operate without I²C communication after initial configuration?
Yes - LP3913SQ-ADJ/NOPB retains all register settings (including output voltages, charger parameters, and interrupt masks) in volatile registers powered by VDDIO. While I²C is required for reconfiguration, the device operates autonomously once powered and initialized. Default values are loaded at POR, and the LP3913SQ-ADJ/NOPB maintains regulation, charging, and supervision functions without ongoing I²C traffic.
LP3913SQ-ADJ/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Handheld/Mobile Devices
- Current - Supply:
- -
- Voltage - Supply:
- 2.5V ~ 6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-WQFN (6x6)
LP3913SQ-ADJ/NOPB FAQ
1.How can I place an order for LP3913SQ-ADJ/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP3913SQ-ADJ/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP3913SQ-ADJ/NOPB reliable?
The price and inventory of LP3913SQ-ADJ/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP3913SQ-ADJ/NOPB is usually 5 days.
3.What payment methods are accepted for LP3913SQ-ADJ/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP3913SQ-ADJ/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP3913SQ-ADJ/NOPB?
LP3913SQ-ADJ/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP3913SQ-ADJ/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP3913SQ-ADJ/NOPB?
For technical support, including LP3913SQ-ADJ/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP3913SQ-ADJ/NOPB requirements.
6.How does Aetrix verify that LP3913SQ-ADJ/NOPB is sourced from the original manufacturer or authorized distributors?
All LP3913SQ-ADJ/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP3913SQ-ADJ/NOPB meets industry standards.
7.What is the process for return or replacement of LP3913SQ-ADJ/NOPB?
All LP3913SQ-ADJ/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP3913SQ-ADJ/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP3913SQ-ADJ/NOPB part is unused and in its original packaging.
Return procedure for LP3913SQ-ADJ/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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