Texas Instruments LP3923TL/NOPB
- Part No.:
- LP3923TL/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 30-WFBGA
- Datasheet:
-
LP3923TL/NOPB.pdf
- Description:
- PMU+CHGR+8 LDO+1 BUCK 30USMD
- Quantity:
- Payment:

- Shipping:

Inventory:500
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Product details
Overview
LP3923TL/NOPB from Texas Instruments is a fully integrated cellular phone power management unit (PMU) featuring one synchronous buck regulator (700 mA), eight low-noise LDOs (including two LILO-type), and a programmable Li-Ion battery charger (50–1200 mA) with 28 V OVP, thermal regulation, and I2C interface. It targets CDMA handset baseband processor power domains including RF, memory, and peripherals.
For engineers reviewing the LP3923TL/NOPB datasheet, LP3923TL/NOPB pinout, LP3923TL/NOPB application, or LP3923TL/NOPB equivalent, this device requires attention to SEL pin configuration for LDO1/LDO2 supply routing (VBATT vs. buck output), IMON analog current monitoring, ACOK_N status signaling, and buck feedback resistor selection for output voltage setting.
Technical Context
The LP3923TL/NOPB integrates three functional blocks: a thermally regulated linear Li-Ion charger with integrated FET, reverse-blocking diode, and sense resistor; a high-efficiency synchronous buck converter operating at 2 MHz with auto PFM/PWM mode switching; and eight digitally controllable LDOs-two LILO (LDO1/LDO2), three A-type (low-noise, 10 µV RMS), and three D-type-with independent enable inputs (RX_EN, TX_EN, TCXO_EN) and I2C programmability.
Its 30-bump 3.0 × 2.5 mm DSBGA package supports compact layout in space-constrained mobile designs. The device uses VBATT as primary input for LDO3–LDO8 and buck, while VIN1 supplies LDO1/LDO2-configurable via SEL pin to accept either VBATT (3.0 V default) or buck output (1.8 V default), enabling pre-regulated low-input operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 700 mA typical; sufficient to power digital baseband or supply LDO1/LDO2 in LILO mode |
| LDO Output Accuracy | ±2% typical; ensures stable core/RF voltage under load and temperature variation |
| Charging Current Range | 50–1200 mA in 50 mA steps; enables precise CC/CV battery charging across cell chemistries |
| Input Voltage Range | 3.0–5.5 V for VBATT; 4.5–6.8 V for CHG_IN; supports USB and AC adapter inputs |
| Dropout Voltage (LDO1/LDO2) | 135 mV @ 300 mA; maintains regulation even with tight input-output margins in LILO mode |
| Output Noise (A-type LDOs) | 10 µVRMS (10 Hz–100 kHz); critical for powering noise-sensitive RF and TCXO circuits |
| OVP Threshold | 28 V on CHG_IN; eliminates need for external overvoltage protection circuitry |
Pinout & Package
LP3923TL/NOPB is housed in a 30-bump, 3.0 mm × 2.5 mm, 0.5 mm pitch DSBGA package with exposed thermal pad. Pin assignment follows a 5×6 grid (A1–F5), with dedicated power, analog, digital I/O, and control terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1–A5, B1, B5, C1, C5, D1, E1, F5 | LDO outputs (LDO4–LDO8, LDO2, LDO3, LDO1, SW, CHG_IN) | Eight regulated voltage outputs plus buck switch node and charger input; each assigned fixed function per pin |
| B2–B4, D2, D3, E2–E3, E4, F4 | Digital control inputs/outputs (TCXO_EN, RX_EN, TX_EN, SEL, PON_N, HF_PWR, PWR_ON, SCL, ACOK_N) | Enable, sequencing, and status signaling; all logic-level compatible with 3.0 V LDO3 domain |
| C4, F3 | Analog monitor/feedback (IMON, FB) | IMON provides proportional voltage for real-time charge current measurement; FB sets buck output via external resistor divider |
| C5, D5, F2, F1, A4, C1, E5 | Power and ground connections (LDO8, GND, GNDB, VINB, VIN2, VIN1, BATT) | Dedicated power rails per functional block: VIN1 for LDO1/LDO2, VIN2 for LDO3–LDO8, VINB for buck, BATT for battery sensing |
Key Features
| Feature | Design Value |
|---|---|
| I2C-compatible serial interface | Enables dynamic on/off control and voltage programming of all LDOs and charger parameters without hardware changes |
| Integrated Li-Ion charger with thermal regulation | Delivers safe, adaptive CC/CV charging up to 1200 mA while preventing overheating across ambient temperatures |
| LILO LDO architecture (LDO1/LDO2) | Supports dual-supply routing (VBATT or buck output) to optimize efficiency and noise performance in baseband subsystems |
| Low-noise A-type LDOs (10 µVRMS) | Meets stringent RF section requirements for TCXO, RX, and TX power domains with minimal phase noise impact |
| Early-warning thermal shutdown | Provides system-level fault indication before full thermal shutdown, enabling graceful power-down sequences |
Applications
| CDMA Baseband Power Domain | RF Front-End Supply |
|---|---|
|
Use Scenario: Powering baseband processor cores, flash memory, and digital peripherals in CDMA handsets. IC Role / Device Role / Timing Role: LP3923TL/NOPB acts as central PMU, delivering six independently controlled LDO outputs (LDO1–LDO3, LDO7) and buck-regulated voltage to digital subsystems. Use Value: SEL pin configuration allows LDO1/LDO2 to operate as LILO regulators when supplied by buck output, reducing overall system power loss and heat generation. |
Use Scenario: Supplying low-noise bias to TCXO, RX path LNA, and TX power amplifier stages. IC Role / Device Role / Timing Role: LP3923TL/NOPB provides three A-type LDOs (LDO4, LDO5, LDO6) with 10 µVRMS noise and 75 dB PSRR at 10 kHz for RF signal integrity. Use Value: TCXO_EN, RX_EN, and TX_EN pins enable precise power gating synchronized with RF transmit/receive states, minimizing standby leakage. |
| Li-Ion Battery Charging System | Vibrator & Peripheral Power |
|
Use Scenario: Managing single-cell Li-Ion battery charging from USB or AC adapter inputs in portable handsets. IC Role / Device Role / Timing Role: LP3923TL/NOPB integrates charger FET, OVP (28 V), IMON current monitor, and ACOK_N adapter detection for autonomous charging control. Use Value: Programmable termination voltage (4.1–4.4 V) and restart threshold (50–200 mV below VTERM) support aging compensation and extended cycle life. |
Use Scenario: Delivering regulated 3.0 V to haptic feedback (vibrator), GPIO peripherals, and general-purpose analog blocks. IC Role / Device Role / Timing Role: LP3923TL/NOPB supplies LDO8 (150 mA, D-type) and LDO7 (150 mA, A-type) with fast start-up (<35 µs) and low dropout (125 mV). Use Value: Independent enable control via SI (serial interface) or direct pin assertion allows dynamic peripheral power management during low-power modes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management unit applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RGZR | Three buck converters + six LDOs; no integrated Li-Ion charger; 4.0 × 4.0 mm QFN package | Requires external charger IC; better suited for multi-rail systems needing higher buck current or wider input range | Select when charger integration is unnecessary and higher buck output flexibility is required |
| LP3971TL/NOPB | Single buck + five LDOs + Li-Ion charger; lower max charge current (500 mA); same DSBGA package size | Targeted at simpler GSM/GPRS handsets; lacks TCXO_EN/RX_EN/TX_EN dedicated enables | Select for cost-sensitive designs where 500 mA charging and reduced LDO count suffice |
Compared with TPS65023RGZR and LP3971TL/NOPB, the LP3923TL/NOPB uniquely combines eight LDOs-including dual LILO regulators and three ultra-low-noise A-type variants-with integrated 1200 mA charger and I2C control in a compact DSBGA, making it optimal for feature-rich CDMA handset PMU consolidation.
Availability
LP3923TL/NOPB is available at Aetrix Electronics and suitable for CDMA handset design, battery-powered portable instrumentation, and embedded wireless modules requiring stable component supply, long-term lifecycle support, and automotive-grade reliability validation.
Supply support for LP3923TL/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of experience in mobile power solutions.
The LP3923TL/NOPB belongs to TI's Cellular PMU product line, engineered specifically for CDMA handset power architecture consolidation-integrating charger, buck, and multiple LDOs to minimize board area and improve battery runtime.
FAQ
What is the maximum charging current supported by the LP3923TL/NOPB?
The LP3923TL/NOPB supports a programmable charging current range from 50 mA to 1200 mA in 50 mA increments. This is achieved via I2C register settings, with default CC mode current set to 400 mA. The charger includes thermal regulation to maintain safe operation across ambient conditions, and its 28 V OVP protects against input overvoltage events. The LP3923TL/NOPB's IMON pin provides an analog voltage proportional to actual charge current for closed-loop monitoring.
How does the SEL pin affect LDO1 and LDO2 operation in the LP3923TL/NOPB?
The SEL pin on the LP3923TL/NOPB determines the input source for LDO1 and LDO2: when grounded (SEL = GND), they are supplied directly from VBATT and deliver 3.0 V; when tied to VBATT (SEL = VBATT), they draw from the buck regulator output and deliver 1.8 V in LILO mode. This dual-supply capability allows system designers to trade off noise performance (VBATT supply) versus efficiency (buck supply), and is a defining feature of the LP3923TL/NOPB's flexible power architecture.
Can the LP3923TL/NOPB buck regulator be used simultaneously to power external loads and supply LDO1/LDO2?
No-the LP3923TL/NOPB buck regulator cannot simultaneously power external loads and supply LDO1/LDO2. When configured to feed LDO1/LDO2 (SEL = VBATT), the buck output is internally routed only to those two LDOs and is not available as a standalone power channel. If external loading is required, LDO1/LDO2 must be supplied from VBATT (SEL = GND), freeing the buck to deliver up to 700 mA to external circuitry with user-defined output voltage set via the FB pin and external resistor divider.
What is the purpose of the IMON pin on the LP3923TL/NOPB?
IMON is an analog current monitor output on the LP3923TL/NOPB that delivers a voltage proportional to the instantaneous battery charging current (typically 1 V per 1 A). It enables real-time charge current measurement without external sense resistors, supporting fuel gauging, thermal derating algorithms, and safety-critical charge termination verification. The LP3923TL/NOPB datasheet specifies IMON accuracy and linearity across the full 50–1200 mA range, making it integral to robust battery management implementations.
Does the LP3923TL/NOPB support I2C clock stretching or multi-master arbitration?
The LP3923TL/NOPB implements an I2C-compatible interface compliant with standard mode (100 kHz) and fast mode (400 kHz) timing, but does not support clock stretching or multi-master arbitration. Its SDA and SCL pins are strictly slave-only, with open-drain outputs requiring external pull-ups. All register reads/writes are acknowledged, and the device resets its internal address pointer after each STOP condition. This simplifies host-side firmware but requires master-controlled transaction sequencing without bus contention handling.
LP3923TL/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 30-WFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Applications:
- Cellular, CDMA Handset
- Current - Supply:
- -
- Voltage - Supply:
- 3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 30-DSBGA
LP3923TL/NOPB FAQ
1.How can I place an order for LP3923TL/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for LP3923TL/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LP3923TL/NOPB reliable?
The price and inventory of LP3923TL/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LP3923TL/NOPB is usually 5 days.
3.What payment methods are accepted for LP3923TL/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LP3923TL/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LP3923TL/NOPB?
LP3923TL/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LP3923TL/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LP3923TL/NOPB?
For technical support, including LP3923TL/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LP3923TL/NOPB requirements.
6.How does Aetrix verify that LP3923TL/NOPB is sourced from the original manufacturer or authorized distributors?
All LP3923TL/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LP3923TL/NOPB meets industry standards.
7.What is the process for return or replacement of LP3923TL/NOPB?
All LP3923TL/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with LP3923TL/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LP3923TL/NOPB part is unused and in its original packaging.
Return procedure for LP3923TL/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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