Analog Devices Inc. LT1162CSW#PBF
- Part No.:
- LT1162CSW#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Gate Drivers
- Package:
- 24-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
LT1162CSW#PBF.pdf
- Description:
- IC GATE DRVR HALF-BRIDGE 24SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:413
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1162CSW#PBF from Analog Devices (formerly Linear Technology) is a dual high-voltage N-channel MOSFET gate driver IC for half-bridge and full-bridge topologies. It integrates two independent drivers, supports up to 60V floating top-side operation, delivers 1.5A peak output current, features adaptive nonoverlapping gate control to prevent shoot-through, and operates from 10V to 15V supply voltage - used in synchronous buck regulators and motor drives.
For engineers reviewing the LT1162CSW#PBF datasheet, LT1162CSW#PBF pinout, LT1162CSW#PBF application, or LT1162CSW#PBF equivalent, key selection considerations include bootstrap-based high-side drive capability, TTL/CMOS-compatible inputs with 1.4V logic low threshold, undervoltage lockout on both V+ and BOOST rails, and separate gate drive/feedback pins per channel for robust MOSFET control under dynamic load conditions.
Technical Context
The LT1162CSW#PBF implements two fully independent, noninverting gate driver channels with integrated logic that prevents simultaneous top/bottom FET conduction. Each channel uses dual-pin gate interface: high-current drive pins (T GATE DR / B GATE DR) and direct gate feedback pins (T GATE FB / B GATE FB) to monitor VGS and enforce safe turn-off-before-turn-on sequencing.
Its floating high-side driver relies on external bootstrap capacitors connected between BOOST and T SOURCE pins, enabling operation with top-FET sources up to 60V above ground. Undervoltage protection operates separately on main supply (V+) and bootstrap supply (VBOOST–VT SOURCE), with 0.5V hysteresis on each threshold to ensure stable startup and fault recovery.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 10V to 15V - defines minimum operating headroom and maximum allowable rail for reliable internal biasing and gate drive swing |
| Top-Side Floating Voltage | Up to 60V - enables direct driving of high-side N-MOSFETs in buck, half-bridge, and H-bridge configurations without level-shifting circuitry |
| Peak Output Current | 1.5A - sufficient to rapidly charge/discharge gate capacitance of multiple paralleled power MOSFETs (e.g., IRFZ44) |
| Input Logic Thresholds | VIL = 0.8V max, VIH = 1.7V min - ensures compatibility with standard TTL and CMOS logic families across temperature |
| Undervoltage Lockout | V+UVL = 8.3V, V+UVH = 8.9V - prevents partial turn-on of power devices during brown-out or soft-start, protecting MOSFETs from thermal runaway |
| Rise/Fall Times | tr(top) = 130–200ns, tf(top) = 60–140ns - enables efficient switching at PWM frequencies up to 100kHz with 3000pF gate load |
| Package Type | 24-pin SO Wide (SW) - surface-mount package with 0.300" body width, optimized for thermal dissipation and layout separation of power/signal grounds |
Pinout & Package
LT1162CSW#PBF is housed in a 24-pin plastic SO Wide (SW) package with exposed pad thermal enhancement. Pin spacing follows JEDEC MS-013AC standard; pin 1 marked by notch or dot.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SV+ (Pins 1, 7) | Main signal supply input | Provides bias for logic and low-side driver circuits; must be decoupled to GND A/B with 10µF capacitor |
| IN TOP A/B (Pins 2, 8) | Top driver enable input | TTL/CMOS-compatible; disables when corresponding IN BOTTOM is high - enforces mutual exclusivity |
| IN BOTTOM A/B (Pins 3, 9) | Bottom driver enable input | Same logic behavior as IN TOP; internal logic prevents concurrent activation of top/bottom outputs |
| UV OUT A/B (Pins 4, 10) | Open-collector undervoltage flag | Sinks current when V+ drops below lockout threshold; used to disable upstream PWM controller or trigger system reset |
| GND A/B (Pins 5, 11) | Signal ground reference | Separate ground return for logic section; must be routed independently from power grounds to avoid noise coupling |
| B GATE FB A/B (Pins 6, 12) | Bottom gate voltage feedback | Direct connection to MOSFET gate; inhibits top driver until VGS falls below 2.5V - ensures dead-time enforcement |
| PV+ A/B (Pins 14, 20) | Bottom driver supply | Connected to same rail as SV+; powers bottom-side driver stage and associated logic |
| T SOURCE A/B (Pins 15, 21) | Top driver return node | Connects to source of high-side MOSFET and low side of bootstrap capacitor - defines floating reference for top driver |
| T GATE FB A/B (Pins 16, 22) | Top gate voltage feedback | Monitors VGS of high-side FET; blocks bottom driver until VGS < 2.9V - prevents shoot-through during transition |
| T GATE DR A/B (Pins 17, 23) | Top gate drive output | High-current source/sink output (1.5A peak); connects via optional series resistor to gate of high-side N-MOSFET |
| BOOST A/B (Pins 18, 24) | Top driver bootstrap supply | Connects to high side of bootstrap capacitor; supplies floating rail for top driver - must exceed T SOURCE by ≥8.7V to enable operation |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive nonoverlapping gate drive | Eliminates need for external dead-time circuitry by monitoring gate feedback voltages and enforcing turn-off-before-turn-on sequencing |
| Floating top driver with 60V capability | Enables use of cost-effective N-channel MOSFETs on high-side switch positions without requiring P-channel or isolated gate drivers |
| Dual independent channels | Allows implementation of full-bridge (H-bridge) motor control or dual-phase synchronous buck converters using single IC |
| Separate V+ and BOOST undervoltage detection | Prevents erratic switching or latch-up during bootstrap capacitor charging faults or main supply sag - critical for reliability in industrial systems |
| TTL/CMOS input compatibility with clamped inputs | Accepts logic signals up to V+; internal 3kΩ resistors and 5V clamps protect against overvoltage and ESD on control lines |
Applications
| Motor Control | Synchronous Buck Regulator |
|---|---|
Use Scenario: Bidirectional DC motor control in robotics and actuation systems requiring rapid plugging braking and coast-to-stop behavior. IC Role / Device Role / Timing Role: LT1162CSW#PBF provides complementary high- and low-side gate drive for H-bridge power stage, with adaptive dead-time control ensuring zero shoot-through during direction reversal. Use Value: Enables precise torque and speed control via PWM while eliminating external timing components and reducing PCB area versus discrete driver solutions. | Use Scenario: High-efficiency 10A, 40V-to-5V step-down converter for telecom and industrial power supplies targeting >90% efficiency. IC Role / Device Role / Timing Role: LT1162CSW#PBF drives synchronous rectifier (bottom) and main switch (top) MOSFETs with matched timing and bootstrap-recharged high-side supply. Use Value: Replaces lossy Schottky diode with low-RDS(ON) N-MOSFET, reducing conduction losses and enabling continuous conduction mode down to light loads. |
| Class D Audio Amplifier | Three-Phase BLDC Drive |
Use Scenario: 200W, 10Hz–1kHz audio amplifier with carrier frequency of 100kHz, requiring low-distortion switching and thermal stability. IC Role / Device Role / Timing Role: LT1162CSW#PBF controls two half-bridge legs in bridge-tied-load (BTL) configuration, delivering fast edge rates and shoot-through immunity at high carrier frequency. Use Value: Delivers clean square-wave drive with minimal propagation delay mismatch (<100ns), preserving audio fidelity and minimizing electromagnetic interference. | Use Scenario: Sensorless three-phase brushless DC motor drive for HVAC blowers and industrial fans operating at 25–100krpm. IC Role / Device Role / Timing Role: LT1162CSW#PBF drives two phases directly; third phase driven by second LT1162CSW#PBF or companion LT1160, with commutation controlled by microcontroller. Use Value: Supports trapezoidal or sinusoidal excitation schemes with programmable dead time, enabling smooth torque delivery and reduced acoustic noise. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel half/full-bridge gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRS21844PbF | Higher VBS rating (600V), integrated bootstrap diode, no gate feedback pins - relies on fixed dead time | Better suited for high-voltage AC-DC PFC or inverter stages; lacks adaptive shoot-through protection | Select when operating above 60V HV rail or when simplified bootstrap design outweighs need for adaptive gate monitoring |
| LM5109BMAX/NOPB | Single-channel, 100V floating capability, 1.5A drive, no UVLO on bootstrap rail, lower quiescent current (2mA) | Optimized for space-constrained single-phase buck or boost; requires external logic for dual-channel coordination | Choose for cost-sensitive, single-output DC-DC designs where dual-channel integration is unnecessary |
Compared with IRS21844PbF and LM5109BMAX/NOPB, LT1162CSW#PBF uniquely combines dual-channel integration, adaptive gate feedback-based dead-time control, and dual-rail undervoltage lockout - making it optimal for precision motor control and high-reliability synchronous buck converters where shoot-through prevention is critical.
Availability
LT1162CSW#PBF is available at Aetrix Electronics and suitable for synchronous buck regulators, H-bridge motor drives, Class D amplifiers, and three-phase BLDC controllers requiring stable component supply, long-term industrial lifecycle support, and traceable sourcing.
Supply support for LT1162CSW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through the acquisition of Linear Technology in 2017.
The LT1162CSW#PBF belongs to Linear's legacy high-voltage gate driver product line, designed specifically for robust, shoot-through-immune control of N-channel power MOSFETs in demanding industrial, automotive, and computing power systems.
FAQ
What is the maximum floating voltage capability of the LT1162CSW#PBF high-side driver?
The LT1162CSW#PBF high-side driver supports operation with its T SOURCE pin referenced up to +60V relative to ground, enabling direct drive of N-channel MOSFETs in high-voltage half-bridge configurations. This rating is specified in the Absolute Maximum Ratings table and validated under conditions where VBOOST – VT SOURCE remains within 75V. Exceeding 60V on T SOURCE risks permanent damage to the internal level-shifting circuitry of LT1162CSW#PBF.
Does the LT1162CSW#PBF require external bootstrap diodes?
No, the LT1162CSW#PBF does not integrate bootstrap diodes and requires an external diode (e.g., 1N4148) between PV+ and BOOST pins to recharge the bootstrap capacitor during low-side conduction. This discrete approach allows optimization of reverse recovery and leakage characteristics - a design choice confirmed in all LT1162CSW#PBF typical application schematics including Figure 1 and Figure 4 in the official datasheet.
How does the LT1162CSW#PBF prevent shoot-through in half-bridge configurations?
The LT1162CSW#PBF prevents shoot-through using adaptive gate feedback monitoring: it holds the top driver off until the bottom MOSFET's gate feedback voltage (B GATE FB) falls below 2.5V, and vice versa. This hardware-enforced sequencing eliminates reliance on fixed dead-time timers or external logic, ensuring robust protection across temperature, voltage, and MOSFET parameter variations - a core feature explicitly documented in the Functional Diagram and Applications Information sections for LT1162CSW#PBF.
What is the purpose of the UV OUT pin on the LT1162CSW#PBF?
The UV OUT pin on LT1162CSW#PBF is an open-collector NPN output that actively pulls low when the main supply voltage (V+) drops below the undervoltage lockout threshold (≈8.3V). It serves as a system-level fault indicator and can be wired to disable upstream PWM controllers or trigger microcontroller interrupts - a function verified in the PIN FUNCTIONS section and demonstrated in application circuits like Figure 2 and Figure 4 of the LT1162CSW#PBF datasheet.
Can the LT1162CSW#PBF drive multiple parallel MOSFETs per channel?
Yes, the LT1162CSW#PBF is rated to drive up to five parallel N-channel MOSFETs per channel, as confirmed in the Applications Information section under "Paralleling MOSFETs". Gate drive performance remains acceptable with minor rise/fall time degradation, provided individual gate resistors (10Ω–47Ω) are used to suppress high-frequency oscillation - a capability validated with IRFZ44 devices in typical performance curves and application figures for LT1162CSW#PBF.
LT1162CSW#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Half-Bridge
- Channel Type:
- Independent
- Number of Drivers:
- 4
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 10V ~ 15V
- Logic Voltage - VIL, VIH:
- 0.8V, 2V
- Current - Peak Output (Source, Sink):
- 1.5A, 1.5A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- 60 V
- Rise / Fall Time (Typ):
- 130ns, 60ns
- Operating Temperature:
- 0°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SOIC
LT1162CSW#PBF FAQ
1.How can I place an order for LT1162CSW#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1162CSW#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1162CSW#PBF reliable?
The price and inventory of LT1162CSW#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1162CSW#PBF is usually 5 days.
3.What payment methods are accepted for LT1162CSW#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1162CSW#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1162CSW#PBF?
LT1162CSW#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1162CSW#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1162CSW#PBF?
For technical support, including LT1162CSW#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1162CSW#PBF requirements.
6.How does Aetrix verify that LT1162CSW#PBF is sourced from the original manufacturer or authorized distributors?
All LT1162CSW#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1162CSW#PBF meets industry standards.
7.What is the process for return or replacement of LT1162CSW#PBF?
All LT1162CSW#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1162CSW#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1162CSW#PBF part is unused and in its original packaging.
Return procedure for LT1162CSW#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1162CSW#PBF Tags

-
ZXGD3009E6TA
Diodes Incorporated

-
1EDN7512BXTSA1
Infineon Technologies
-
UCC27517DBVR
Texas Instruments

-
MCP1416T-E/OT
Microchip Technology

-
MCP1402T-E/OT
Microchip Technology

-
MCP1415T-E/OT
Microchip Technology

-
MCP1401T-E/OT
Microchip Technology

-
IX4428NTR
Littelfuse Inc.

-
IRS2005STRPBF
Infineon Technologies

-
IRS2008STRPBF
Infineon Technologies

-
IX4310TTR
Littelfuse Inc.

-
2EDN7524RXTMA1
Infineon Technologies
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

