My Inquiry
My Account
Analog Devices Inc. LT1336CS#PBF
- Part No.:
- LT1336CS#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Gate Drivers
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LT1336CS#PBF.pdf
- Description:
- IC GATE DRVR HALF-BRIDGE 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:214
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LT1336CS#PBF from Analog Devices (formerly Linear Technology) is a half-bridge N-channel power MOSFET driver with integrated boost regulator for high-side gate drive up to 60V HV rail. It delivers 1.5A peak output current, supports 100% PWM duty cycle via adaptive bootstrap charging, and features TTL/CMOS-compatible inputs with 1.4V logic threshold and 300mV hysteresis. It is used in synchronous step-down regulators and 3-phase brushless motor control where shoot-through prevention and high-voltage floating drive are critical.
For engineers reviewing the LT1336CS#PBF datasheet, LT1336CS#PBF pinout, LT1336CS#PBF application, or LT1336CS#PBF equivalent, key selection considerations include its 16-pin SO package, 10–15V supply range, 180ns gate transition times into 10,000pF load, adaptive nonoverlapping gate control, and dual undervoltage lockout (V+ and VBOOST–VTSOURCE) with hysteresis.
Technical Context
The LT1336CS#PBF implements two independent noninverting gate drivers - top-side floating and bottom-side grounded - each with dedicated Gate Drive (TGATEDR/BGATEDR) and Gate Feedback (TGATEFB/BGATEFB) pins enabling precise VGS monitoring and adaptive dead-time enforcement. Its internal switching regulator operates at ~700kHz in boost topology to maintain VBOOST–VTSOURCE at 10.6V during high-duty-cycle operation.
Shoot-through protection is implemented via input logic interlock and dynamic feedback-based release timing: top driver activation is inhibited until TGATEFB–TSOURCE falls below 2.9V, and bottom driver activation is inhibited until BGATEFB falls below 2.5V. Undervoltage lockout engages both outputs low when V+ drops below 7.8V (shutdown) or rises above 9.75V (start-up), and separately disables top drive when VBOOST–VTSOURCE falls below 8.2V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 10V to 15V - ensures stable operation across industrial SMPS input rails without external regulation |
| Top-Side Floating Voltage | Up to 60V - enables direct drive of high-side N-MOSFETs in buck, half-bridge, and motor phases |
| Peak Output Current | 1.5A - sufficient to charge/discharge ≥10,000pF gate capacitance within 180ns transitions |
| VBOOST Regulation | 10.6V ±0.6V - maintains reliable top-gate overdrive even at 100% duty cycle via internal hysteretic boost controller |
| Input Logic Threshold | 1.4V (low), 2.0V (high) with 300mV hysteresis - compatible with TTL/CMOS logic and immune to noise on noisy PCBs |
| ISENSE Threshold | 480mV typical - sets peak boost inductor current at 2Ω sense resistor for robust current limiting |
| UVLO Hysteresis | 0.5V - prevents oscillation during slow-ramping supplies or brown-out recovery |
Pinout & Package
LT1336CS#PBF is housed in a 16-lead plastic SO (S package) with θJA = 110°C/W, rated for 0°C to 70°C operation. Pin 1 is ISENSE; Pin 2 is SV+; Pins 3 and 4 are INTOP and INBOTTOM; Pin 5 is open-collector UVOUT; Pin 6 is SGND; Pin 7 is PGND; Pin 8 is BGATEFB; Pin 9 is BGATEDR; Pin 10 is PV+; Pin 11 is TSOURCE; Pin 12 is TGATEFB; Pin 13 is TGATEDR; Pin 14 is BOOST; Pin 15 is SWGND; Pin 16 is SWITCH.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ISENSE (1) | Boost regulator current sense input | Connects to 2Ω resistor to set 1.5A peak inductor current; open if boost not used |
| SV+ (2) | Main signal supply | 10–15V rail powering logic, UVLO, and gate drivers; requires local 1µF decoupling to SGND |
| INTOP (3) / INBOTTOM (4) | Noninverting TTL/CMOS inputs | Enable top/bottom drivers independently; interlocked to prevent simultaneous conduction |
| UVOUT (5) | Open-collector undervoltage indicator | Sinks current when V+ or VBOOST–VTSOURCE falls below threshold; used for system fault signaling |
| TGATEDR (13) / BGATEDR (9) | High-current gate drive outputs | Deliver 1.5A peak to MOSFET gates; series gate resistors recommended for EMI control |
| TGATEFB (12) / BGATEFB (8) | Direct gate voltage feedback inputs | Monitor VGS in real time to enforce adaptive nonoverlap; must connect directly to MOSFET gate |
| TSOURCE (11) | Floating return for top driver | Connects to source of high-side MOSFET and low side of bootstrap capacitor |
| BOOST (14) | Floating supply for top driver | Output of internal boost regulator; connects to high side of bootstrap capacitor |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive nonoverlapping gate drive | Prevents shoot-through by dynamically delaying opposite driver activation until VGS falls below 2.5V/2.9V thresholds |
| Integrated boost regulator | Maintains 10.6V VBOOST–VTSOURCE at 100% duty cycle using external inductor/diode/capacitor network |
| Dual undervoltage lockout | Independent monitoring of V+ (7.8–9.75V window) and VBOOST–VTSOURCE (8.2–9.8V window) with hysteresis |
| Separate signal and power grounds | SGND (Pin 6), PGND (Pin 7), and SWGND (Pin 15) enable clean layout separation for noise-sensitive analog and power paths |
| 180ns gate transitions into 10,000pF | Enables high-frequency switching (>100kHz) in synchronous buck and Class D amplifier designs |
Applications
| Motor Control | Synchronous Buck Regulator |
|---|---|
Use Scenario: Driving high-current 3-phase BLDC motors in HVAC blowers and industrial pumps. IC Role / Device Role / Timing Role: Half-bridge gate driver providing isolated top/bottom N-MOSFET control with adaptive dead-time to prevent shoot-through during commutation. Use Value: Eliminates need for external shoot-through protection circuitry and enables use of cost-effective unmatched MOSFET pairs. | Use Scenario: High-efficiency 12V-to-3.3V/5V point-of-load converter in telecom and server power supplies. IC Role / Device Role / Timing Role: Synchronous rectifier driver delivering 1.5A peak gate current to low-RDS(ON) N-MOSFETs at >200kHz switching frequency. Use Value: Maintains top-gate drive at 95–100% duty cycle via integrated boost regulator, improving light-load efficiency. |
| Class D Audio Amplifier | Industrial Inverter Stage |
Use Scenario: Full-bridge output stage in 100W+ audio amplifiers requiring low-distortion PWM switching. IC Role / Device Role / Timing Role: Dual-channel gate driver controlling complementary N-MOSFET half-bridges with matched rise/fall times (90–200ns). Use Value: TTL/CMOS inputs simplify microcontroller interface; 0.5V UVLO hysteresis ensures clean startup under varying supply conditions. | Use Scenario: DC-to-AC inverter for solar microinverters or UPS systems operating from 40–60V DC bus. IC Role / Device Role / Timing Role: High-voltage floating driver enabling top-side N-MOSFET switching up to 60V with integrated bootstrap management. Use Value: Reduces BOM count by integrating boost regulator control, eliminating need for external charge pump ICs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar half-bridge N-channel gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRS21844STRPBF | Higher 600V HV rating; no integrated boost regulator; relies solely on external bootstrap diode/capacitor | Requires external bootstrap design; unsuitable for sustained 100% duty cycle; better for <90% duty cycle inverters | Select when HV rail exceeds 60V or when external bootstrap simplicity outweighs duty-cycle flexibility |
| LM5109BMAX/NOPB | 100V HV rating; built-in 12V gate drive clamp; no ISENSE or boost regulator; faster 25ns propagation delay | Lacks adaptive shoot-through protection and VBOOST regulation; requires external dead-time control | Select when ultra-fast switching (<50ns) is prioritized and system-level dead-time management is available |
Compared with IRS21844STRPBF and LM5109BMAX/NOPB, the LT1336CS#PBF uniquely integrates a 700kHz hysteretic boost regulator and adaptive gate feedback–based nonoverlap, enabling robust 100% duty cycle operation without external timing components or matched MOSFETs - a critical advantage in synchronous buck and high-duty-cycle motor control.
Availability
LT1336CS#PBF is available at Aetrix Electronics and suitable for synchronous buck regulators, 3-phase BLDC motor drives, Class D audio amplifiers, and industrial inverters requiring stable component supply across commercial temperature range (0°C to 70°C).
Supply support for LT1336CS#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for legacy Linear products including the LT1336 family.
The LT1336 product line was designed specifically for high-reliability, high-voltage half-bridge gate driving in power conversion systems where shoot-through immunity, bootstrap reliability at extreme duty cycles, and integrated protection are mandatory.
FAQ
What is the maximum high-voltage rail voltage supported by the LT1336CS#PBF?
The LT1336CS#PBF supports a maximum top-source voltage of 60V (absolute maximum rating). This allows direct drive of high-side N-channel MOSFETs in buck converters and motor phases operating from 40–60V DC buses. Exceeding 60V risks permanent damage; for >40V HV rails, the flyback topology must be used for the internal boost regulator per Linear's Applications Information section.
How does the LT1336CS#PBF prevent shoot-through in half-bridge configurations?
The LT1336CS#PBF prevents shoot-through using dual mechanisms: hardware interlock logic that disables one input when the other is active, and adaptive feedback-based timing - top driver activation is blocked until TGATEFB–TSOURCE falls below 2.9V, and bottom driver activation is blocked until BGATEFB falls below 2.5V. This eliminates reliance on matched MOSFETs or external dead-time circuits.
Can the LT1336CS#PBF operate at 100% duty cycle, and how is this achieved?
Yes, the LT1336CS#PBF sustains 100% duty cycle operation via its integrated hysteretic boost regulator, which activates when VBOOST–VTSOURCE drops below 10.6V. Unlike conventional bootstrap methods that fail above ~90% duty cycle, this internal 700kHz switching regulator recharges the bootstrap capacitor continuously, maintaining gate drive for the high-side MOSFET even with zero off-time.
What are the thermal limitations of the LT1336CS#PBF in SO package?
The LT1336CS#PBF in 16-lead SO package has θJA = 110°C/W. At 12V supply and 31mA total current, junction temperature reaches 126°C - exceeding the 125°C absolute maximum. Derating is required: for continuous operation at 70°C ambient, max dissipation must stay below 300mW. Layout with thermal vias and copper pour on PV+/PGND/SGND pads is strongly recommended.
Which external components are mandatory for basic LT1336CS#PBF operation with boost regulator enabled?
With boost regulator enabled, LT1336CS#PBF requires four mandatory external components: a 2Ω current-sense resistor (RSENSE) between ISENSE and SV+, a 200µH inductor between SWITCH and HV rail, a 1N4148 diode from BOOST to HV, and a 1µF bootstrap capacitor between BOOST and TSOURCE. Omitting any invalidates boost functionality and risks top-driver failure at high duty cycles.
LT1336CS#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Half-Bridge
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 10V ~ 15V
- Logic Voltage - VIL, VIH:
- 0.8V, 2V
- Current - Peak Output (Source, Sink):
- 1.5A, 1.5A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- 60 V
- Rise / Fall Time (Typ):
- 130ns, 60ns
- Operating Temperature:
- 0°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
LT1336CS#PBF FAQ
1.How can I place an order for LT1336CS#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT1336CS#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT1336CS#PBF reliable?
The price and inventory of LT1336CS#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT1336CS#PBF is usually 5 days.
3.What payment methods are accepted for LT1336CS#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT1336CS#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT1336CS#PBF?
LT1336CS#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT1336CS#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT1336CS#PBF?
For technical support, including LT1336CS#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT1336CS#PBF requirements.
6.How does Aetrix verify that LT1336CS#PBF is sourced from the original manufacturer or authorized distributors?
All LT1336CS#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT1336CS#PBF meets industry standards.
7.What is the process for return or replacement of LT1336CS#PBF?
All LT1336CS#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT1336CS#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT1336CS#PBF part is unused and in its original packaging.
Return procedure for LT1336CS#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LT1336CS#PBF Tags
-
ZXGD3009E6TA
Diodes Incorporated
-
1EDN7512BXTSA1
Infineon Technologies
-
UCC27517DBVR
Texas Instruments
-
MCP1416T-E/OT
Microchip Technology
-
MCP1402T-E/OT
Microchip Technology
-
MCP1415T-E/OT
Microchip Technology
-
MCP1401T-E/OT
Microchip Technology
-
IX4428NTR
Littelfuse Inc.
-
IRS2005STRPBF
Infineon Technologies
-
IRS2008STRPBF
Infineon Technologies
-
IX4310TTR
Littelfuse Inc.
-
2EDN7524RXTMA1
Infineon Technologies
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
