Analog Devices Inc. LT4275CHDD#PBF
- Part No.:
- LT4275CHDD#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LT4275CHDD#PBF.pdf
- Description:
- IC POE CNTRL 1 CHANNEL 10DFN
- Quantity:
- Payment:

- Shipping:

Inventory:370
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Product details
Overview
LT4275CHDD#PBF from Analog Devices (formerly Linear Technology) is an IEEE 802.3af-compliant Type 1 Powered Device (PD) controller for Power over Ethernet, delivering up to 13W at the RJ45 connector, featuring integrated signature resistor, 100V absolute maximum input voltage, –40°C to 125°C operating junction temperature, and external N-channel MOSFET gate drive. It enables PoE-powered IP phones and low-power surveillance cameras.
For engineers reviewing the LT4275CHDD#PBF datasheet, LT4275CHDD#PBF pinout, LT4275CHDD#PBF application, or LT4275CHDD#PBF equivalent, key selection criteria include IEEE 802.3af compliance, 13W power delivery capability, DFN-10 package with exposed thermal pad, auxiliary supply override support, and hot-swap MOSFET control logic for inrush current management.
Technical Context
The LT4275CHDD#PBF implements IEEE 802.3af detection and classification using a precision 24.4kΩ signature resistor and programmable RCLASS-based current sourcing (up to 28mA for Class 3), with VPORT operating range of 23V–60V and hot-swap turn-on threshold of 27V–37V. It supports single-event classification only and lacks RCLASS++ and T2P pins-confirmed by datasheet pin mapping and family table.
Its internal charge pump drives an external N-channel MOSFET via HSGATE, enabling low RDS(ON) implementation; startup inrush is controlled by external CGATE capacitor, and PWRGD provides open-drain power-good signaling after gate voltage reaches ~7V above HSSRC. Thermal protection activates above 150°C junction temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Standard Compliance | IEEE 802.3af Type 1 only; no LTPoE++ or 802.3at support - confirmed by grade C designation and missing RCLASS++/T2P pins |
| Max Delivered Power | 13W at PD RJ45 connector - corresponds to Class 3 (28mA classification current) per Table 1 |
| VPORT Operating Range | 23V to 60V - defines valid input voltage window for powered operation and classification |
| Signature Resistance | 24.4kΩ ±0.7kΩ - precision, temperature-compensated value enabling reliable 25kΩ detection by PSE |
| Hot Swap Thresholds | VHSON = 27–37V, VHSOFF = 21.5–31V - controls external MOSFET turn-on/turn-off during power-up/down |
| Junction Temp Range | –40°C to 125°C - validated operating range for industrial-grade deployment in harsh environments |
| Absolute Max Voltage | 100V on VPORT/HSSRC - ensures robustness against transient surges and cable discharge events |
Pinout & Package
LT4275CHDD#PBF uses a 10-lead (3mm × 3mm) plastic DFN package with exposed thermal pad (Pin 11) electrically connected to GND and requiring soldering to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1: IEEEUVLO | Hot swap UVLO threshold control | Ground for IEEE-compliant turn-on/turn-off thresholds (27–37V ON, 21.5–31V OFF); open for lower thresholds |
| Pin 2: AUX | Auxiliary supply sense input | Enables auxiliary power takeover when voltage exceeds 6.3V threshold; pulls down HSGATE and floats PWRGD when asserted |
| Pin 3: RCLASS | Classification current programming | Connects to GND via resistor (e.g., 49.9Ω for Class 3) to set classification current per Table 1 |
| Pin 4: RCLASS++/NC* | Not connected | No internal connection - unused in LT4275C variant per datasheet footnote |
| Pin 5: GND | Ground reference | Main signal and power ground; exposed pad (Pin 11) must be soldered to same PCB net |
| Pin 6: T2P/NC* | Not connected | No internal connection - absent in LT4275C per datasheet pin function table |
| Pin 7: PWRGD | Power good indicator | Open-drain output pulled low until HSGATE reaches ~7V above HSSRC; used to delay isolated supply startup |
| Pin 8: HSSRC | MOSFET source reference | Connects to source of external N-channel MOSFET; forms source-follower configuration with HSGATE |
| Pin 9: HSGATE | MOSFET gate driver output | Drives external N-MOSFET gate via charge pump; IGPU = 18–27µA enables controlled inrush ramp |
| Pin 10: VPORT | PD interface upper rail | Connects to Ethernet port power rail and MOSFET drain; handles full input voltage (up to 100V abs max) |
Key Features
| Feature | Design Value |
|---|---|
| N-channel MOSFET control | Eliminates need for costly P-channel FET; enables use of low RDS(ON) devices to maximize delivered power and efficiency |
| Integrated signature resistor | 24.4kΩ ±0.7kΩ, temperature-compensated - meets IEEE 25kΩ detection requirement while accounting for bridge losses |
| Programmable inrush current | Set via external CGATE capacitor and IGPU current (18–27µA); enables precise IINRUSH ≈ 100mA per IEEE spec |
| Auxiliary supply override | VAUXT = 6.3V ±0.2V with 4–8µA hysteresis current - allows seamless switchover to 9–60V auxiliary input |
| Thermal protection | Active shutdown above 150°C junction temperature - protects device during abnormal overloads without external circuitry |
Applications
| IP Telephony Endpoint | Low-Power Surveillance Camera |
|---|---|
Use Scenario: VoIP phone receiving DC power and data over single Cat5e cable in enterprise office environment. IC Role / Device Role / Timing Role: IEEE 802.3af PD controller managing detection, classification, inrush, and power-good sequencing. Use Value: Enables compact, fanless design with 13W headroom for LCD display, speaker amplifier, and USB peripheral support. | Use Scenario: Indoor fixed-focus security camera deployed in retail or hospitality settings with centralized PoE switch infrastructure. IC Role / Device Role / Timing Role: PD interface IC providing compliant 802.3af handshake, hot-swap control, and auxiliary fallback for battery backup. Use Value: Ensures reliable startup under varying cable lengths and PSE types while supporting VAUX override for uninterrupted operation during mains failure. |
| Smart Building Sensor Node | Industrial Control Panel Display |
Use Scenario: Wireless gateway or environmental sensor node mounted in ceiling plenum with PoE-powered Ethernet backhaul. IC Role / Device Role / Timing Role: Powered device controller handling 25kΩ signature detection, Class 0–3 classification, and thermal-safe power delivery. Use Value: Supports extended temperature operation (–40°C to 125°C) and eliminates need for local AC/DC adapter in space-constrained enclosures. | Use Scenario: Human-machine interface (HMI) display in factory automation cabinet powered via PoE from upstream switch. IC Role / Device Role / Timing Role: PD controller managing IEEE-compliant power handshaking, inrush limiting, and PWRGD coordination with isolated DC-DC converter. Use Value: Reduces BOM count by integrating signature resistor and UVLO logic, while exposed DFN pad ensures stable thermal performance at 125°C ambient. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Powered Device controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC4257-1 | Integrated 100V/400mA P-channel switch; no external MOSFET required; supports dual current limit | Delivers up to 12.95W (Class 3); lacks auxiliary override and LTPoE++/802.3at compatibility | Preferred where board space is constrained and external MOSFET layout complexity must be avoided |
| LT4275CIMS#PBF | Same IEEE 802.3af functionality and specs, but in MSOP-10 package (4.9mm × 3.0mm) with θJC = 45°C/W vs. DFN's 5°C/W | Identical electrical behavior; differs only in thermal performance and footprint - suitable for less thermally demanding layouts | Select when thermal requirements permit higher junction rise or when MSOP-compatible assembly is preferred |
Compared with LTC4257-1, LT4275CHDD#PBF offers superior thermal dissipation via DFN exposed pad and external MOSFET flexibility, while LT4275CIMS#PBF provides identical functionality in a larger, less thermally efficient package - making LT4275CHDD#PBF optimal for high-density, high-ambient industrial deployments.
Availability
LT4275CHDD#PBF is available at Aetrix Electronics and suitable for IP telephony endpoints, low-power surveillance cameras, smart building sensor nodes, and industrial control panel displays requiring stable component supply across extended temperature ranges.
Supply support for LT4275CHDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-reliability analog/power IC portfolio. The company specializes in precision signal conditioning, power management, and interface solutions for demanding industrial and communications applications.
The LT4275 family belongs to Linear's Power over Ethernet interface product line, designed specifically for IEEE 802.3af/at and proprietary LTPoE++ powered device implementations with emphasis on efficiency, thermal resilience, and interoperability across PSE generations.
FAQ
What is the maximum power delivery capability of the LT4275CHDD#PBF?
The LT4275CHDD#PBF is an IEEE 802.3af Type 1 Powered Device controller rated for up to 13W delivered power at the RJ45 connector. This corresponds to Class 3 operation (28mA classification current) and is confirmed by its LT4275C grade designation, absence of RCLASS++ and T2P pins, and family datasheet Table 1. It does not support 802.3at (25.5W) or LTPoE++ (38.7W–90W) modes.
Does the LT4275CHDD#PBF support auxiliary power supply override?
Yes, the LT4275CHDD#PBF supports auxiliary power override via its AUX pin. When the voltage at AUX exceeds the 6.3V threshold (VAUXT), the device disconnects the signature resistor, disables classification, pulls down HSGATE to disable the external MOSFET, and floats the PWRGD pin. This allows seamless transition to a 9V–60V auxiliary input, as specified in the Electrical Characteristics table and Applications Information section.
What package type and thermal characteristics does the LT4275CHDD#PBF use?
The LT4275CHDD#PBF uses a 10-lead (3mm × 3mm) plastic DFN package with an exposed thermal pad (Pin 11) connected internally to GND. Its thermal resistance is θJC = 5°C/W, significantly lower than the MSOP variant's 45°C/W, enabling robust operation at junction temperatures up to 125°C ambient. The exposed pad must be soldered to PCB ground for both thermal and electrical integrity.
Which pins are not connected on the LT4275CHDD#PBF and why?
On the LT4275CHDD#PBF, Pin 4 (RCLASS++) and Pin 6 (T2P) are not connected. This is inherent to the LT4275C grade, which supports IEEE 802.3af only and excludes LTPoE++ classification (requiring RCLASS++) and Type 2 PSE identification (requiring T2P). The datasheet explicitly states "RCLASS++ is not connected in the LT4275B/C versions" and "T2P is not connected in the LT4275C version."
How does the LT4275CHDD#PBF implement inrush current control?
The LT4275CHDD#PBF controls inrush current using its internal charge pump to source 18–27µA (IGPU) into an external CGATE capacitor connected to HSGATE. This ramps the gate voltage of the external N-channel MOSFET, thereby controlling the rate at which the output bulk capacitor (CPORT) charges. The relationship IINRUSH = IGPU × CPORT / CGATE allows precise design targeting ~100mA inrush, as required by IEEE 802.3af.
LT4275CHDD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- Controller (PD)
- Number of Channels:
- 1
- Power - Max:
- 13 W
- Internal Switch(s):
- No
- Auxiliary Sense:
- Yes
- Standards:
- 802.3af (PoE)
- Voltage - Supply:
- 23V ~ 60V
- Current - Supply:
- 2mA (Max)
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
LT4275CHDD#PBF FAQ
1.How can I place an order for LT4275CHDD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT4275CHDD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT4275CHDD#PBF reliable?
The price and inventory of LT4275CHDD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT4275CHDD#PBF is usually 5 days.
3.What payment methods are accepted for LT4275CHDD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT4275CHDD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT4275CHDD#PBF?
LT4275CHDD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT4275CHDD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT4275CHDD#PBF?
For technical support, including LT4275CHDD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT4275CHDD#PBF requirements.
6.How does Aetrix verify that LT4275CHDD#PBF is sourced from the original manufacturer or authorized distributors?
All LT4275CHDD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT4275CHDD#PBF meets industry standards.
7.What is the process for return or replacement of LT4275CHDD#PBF?
All LT4275CHDD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT4275CHDD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT4275CHDD#PBF part is unused and in its original packaging.
Return procedure for LT4275CHDD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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