Analog Devices Inc. LT4275CIMS#PBF
- Part No.:
- LT4275CIMS#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LT4275CIMS#PBF.pdf
- Description:
- IC POE CNTRL 1 CHANNEL 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LT4275CIMS#PBF from Analog Devices (formerly Linear Technology) is an IEEE 802.3af-compliant Type 1 Powered Device (PD) controller for Power over Ethernet systems, delivering up to 13W at the RJ45 connector, featuring integrated signature resistor, 100V absolute maximum input voltage, –40°C to 85°C operating junction temperature range, and external N-channel MOSFET gate drive for high-efficiency power delivery in outdoor security cameras and commercial displays.
For engineers reviewing the LT4275CIMS#PBF datasheet, LT4275CIMS#PBF pinout, LT4275CIMS#PBF application, or LT4275CIMS#PBF equivalent, this page provides verified technical context, confirmed pin functions, real-world PoE system integration details, thermal protection behavior, and validated alternative parts for IEEE 802.3af PD designs requiring stable 13W power delivery with auxiliary supply override support.
Technical Context
The LT4275CIMS#PBF implements IEEE 802.3af Type 1 detection and classification using a precision 24.4kΩ temperature-compensated signature resistor between VPORT and GND, with classification current thresholds of 10.5mA (Class 1), 18.5mA (Class 2), and 28mA (Class 3). It supports only single-event classification and lacks RCLASS++ and T2P functionality-confirmed by datasheet pin definitions stating "RCLASS++ is not connected" and "T2P is not connected in the LT4275C version."
Its Hot Swap control uses an internal charge pump to drive an external N-channel MOSFET via HSGATE, with programmable inrush current via external CGATE capacitor, VHSON = 27V (min), VHSOFF = 21.5V (min), and overtemperature shutdown activating above TJ = 150°C. The AUX pin enables auxiliary supply takeover at VAUXT = 6.3V (typ), with hysteresis provided by IAUXH = 5.8µA (typ).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| IEEE Standard | IEEE 802.3af Type 1 compliant - guarantees interoperability with legacy PoE PSEs and defines 13W max delivered power. |
| Max Delivered Power | 13W at RJ45 connector - sets upper limit for isolated DC-DC stage design and thermal budget in end equipment. |
| VPORT Input Range | 23V to 60V - defines minimum startup voltage and maximum continuous operating rail for PoE interface. |
| Absolute Max VPORT | 100V - determines required TVS clamping level (e.g., SMAJ58A) and surge withstand capability. |
| Junction Temp Range | –40°C to 85°C - specifies industrial-grade operation without derating; full electrical specs valid across this range. |
| Signature Resistance | 24.4kΩ (typ) - precise value ensures reliable 25kΩ detection by PSE despite bridge diode series resistance. |
| Classification Support | Classes 0–3 only - no LTPoE++ or 802.3at 2-event signaling; RCLASS++ and T2P pins are unconnected. |
Pinout & Package
LT4275CIMS#PBF is housed in a 10-Lead Plastic MSOP package (3.00mm × 3.00mm footprint, 0.5mm pitch), with exposed pad not present (DFN-only feature). Pin 5 (GND) and pin 11 (exposed pad) are GND in DFN variants, but MSOP variant has no exposed pad - all thermal dissipation occurs through leads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IEEEUVLO (1) | Hot Swap UVLO threshold control | Grounded for IEEE-compliant 27V/21.5V turn-on/turn-off; open for lower thresholds - affects startup timing and fault recovery. |
| AUX (2) | Auxiliary supply enable input | Sinks 5.8µA at 6.3V threshold; asserts override mode when >VAUXT - disconnects signature, disables classification, floats PWRGD. |
| RCLASS (3) | Programmable classification resistor terminal | Accepts 1% resistor to GND (e.g., 49.9Ω for Class 3); floating for Class 0 - sets PD power class per IEEE 802.3af Table 33-3. |
| RCLASS++ (4) | LTPoE++ classification terminal | No connection in LT4275C - unused and must be left unconnected; not functional in this grade. |
| GND (5) | Power and signal reference | Main ground return path; requires low-impedance PCB plane connection - critical for noise immunity and thermal conduction. |
| T2P (6) | PSE type indicator output | No connection in LT4275C - pin is NC; cannot indicate PSE type or power level - limits system-level power negotiation visibility. |
| PWRGD (7) | Open-drain power good flag | Pulls low during classification/inrush; floats after HSGATE reaches ~7V above HSSRC - used to enable downstream isolated supply. |
| HSSRC (8) | External MOSFET source reference | Connects to source of N-channel MOSFET - establishes local ground for gate drive and current sensing. |
| HSGATE (9) | Gate drive output | Charge-pump-driven gate driver (VGOC = 10–18V); sources 22µA (typ) to charge external CGATE - controls inrush ramp rate. |
| VPORT (10) | PD input power rail | Connects to Ethernet transformer center tap or bridge output - carries full PoE current; must handle 100V transients. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 24.4kΩ signature resistor | Eliminates external precision resistor; maintains <±0.3kΩ drift over –40°C to 85°C - ensures reliable PSE detection across temperature. |
| N-channel MOSFET gate drive | Charge-pump-based HSGATE output reduces conduction loss vs. P-channel solution - enables <5mΩ RDS(ON) FET selection for >92% system efficiency. |
| Programmable inrush current | Set via CGATE capacitor (e.g., 47nF) and IGPU = 22µA - allows precise IINRUSH ≈ 100mA compliance with IEEE 802.3af Section 33.3.2.2. |
| Auxiliary supply override | VAUXT = 6.3V with 5.8µA hysteresis - enables seamless switchover from PoE to 9–60V auxiliary input without reboot or reclassification. |
| Overtemperature protection | Shuts down HSGATE and PWRGD above TJ = 150°C - prevents latch-up or permanent damage during sustained overload or poor heatsinking. |
Applications
| Outdoor Security Camera | Commercial Digital Signage |
|---|---|
|
Use Scenario: IP camera deployed on building exterior with limited AC access, powered and networked via single Cat5e cable. IC Role / Device Role / Timing Role: IEEE 802.3af PD controller managing detection, classification, inrush, and power-good sequencing for isolated flyback converter. Use Value: Enables 13W delivery within IEEE spec while supporting auxiliary 24VAC fallback during PoE outage - ensures continuous video streaming and IR illumination. |
Use Scenario: Wall-mounted retail display with integrated Ethernet connectivity and local 12V backup supply. IC Role / Device Role / Timing Role: Primary PoE interface IC that initiates signature, classifies as Class 3 (13W), and asserts PWRGD only after CPORT is fully charged. Use Value: Guarantees safe inrush (<100mA) and eliminates brownout risk during hot-plug - prevents display flicker or firmware reset during network cable insertion. |
| Industrial IoT Gateway | VoIP Desk Phone with Aux Port |
|
Use Scenario: DIN-rail mounted gateway collecting sensor data in factory environment with wide ambient temperature swings. IC Role / Device Role / Timing Role: Robust PD interface handling –40°C to 85°C operation, undervoltage lockout, and thermal shutdown without external supervision. Use Value: Maintains guaranteed 13W delivery across full industrial temp range - avoids unexpected shutdown during summer peak loads or winter cold starts. |
Use Scenario: Enterprise VoIP phone with USB-C aux port for headset charging, requiring dual-power-source arbitration. IC Role / Device Role / Timing Role: Auxiliary override enabler using AUX pin to detect 9V–60V external supply and seamlessly disable PoE path. Use Value: Prevents backfeed between PoE and USB-C supplies - eliminates risk of damaging upstream PSE or violating USB PD specifications. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar IEEE 802.3af PD controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC4257-1 | Integrates 100V/400mA internal switch; no external MOSFET required; supports dual current limit and programmable class. | Reduces BOM count and layout area but limits max current to 400mA - insufficient for 13W at 5V output without boost stage. | Select LTC4257-1 when board space is constrained and output current ≤400mA; choose LT4275CIMS#PBF when higher efficiency, lower heat, or >400mA load is needed. |
| LTC4265 | IEEE 802.3at-compliant (25.5W); includes 2-event classification logic and internal 100V/1A switch; no external MOSFET needed. | Supports Type 2 PSEs and higher power, but incompatible with LT4275CIMS#PBF's pinout and classification-only behavior - not drop-in. | Select LTC4265 only if future-proofing for PoE+ is required; LT4275CIMS#PBF remains optimal for cost-sensitive, strictly 802.3af deployments. |
Compared with LTC4257-1, LT4275CIMS#PBF trades integrated switching for superior thermal performance and flexibility with discrete N-channel MOSFETs; compared with LTC4265, it offers lower system cost and simpler layout for 13W applications where PoE+ compatibility is unnecessary.
Availability
LT4275CIMS#PBF is available at Aetrix Electronics and suitable for outdoor security camera equipment, commercial digital signage, and industrial IoT gateways requiring stable component supply, long-term lifecycle support, and guaranteed RoHS-compliant sourcing.
Supply support for LT4275CIMS#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for the LT4275 family.
The LT4275 product line delivers IEEE-compliant PoE Powered Device interfaces with scalable power levels (13W/25.5W/90W) and robust thermal, surge, and classification reliability for industrial and infrastructure applications.
FAQ
What is the maximum power delivery capability of the LT4275CIMS#PBF?
The LT4275CIMS#PBF is an IEEE 802.3af Type 1 Powered Device controller rated for up to 13W delivered power at the RJ45 connector. This is achieved under standard conditions with a 48V PSE, accounting for losses in the bridge rectifier and cabling. It does not support IEEE 802.3at (25.5W) or LTPoE++ (up to 90W) modes - those require LT4275B or LT4275A variants respectively. The LT4275CIMS#PBF's classification circuitry is limited to Classes 0–3 per IEEE 802.3af Table 33-3.
Does the LT4275CIMS#PBF support auxiliary power override, and how is it implemented?
Yes, the LT4275CIMS#PBF supports auxiliary power override via its AUX pin (Pin 2). When the voltage at AUX exceeds VAUXT = 6.3V (typ), the device enters override mode: the signature resistor disconnects, classification is disabled, HSGATE is pulled low to disable the external MOSFET, and PWRGD is allowed to float. Hysteresis is provided by IAUXH = 5.8µA (typ), ensuring clean transition. This enables seamless switchover from PoE to an external 9–60V DC or 24V AC supply without system reset - a key feature in the LT4275CIMS#PBF design.
What package type and pin count does the LT4275CIMS#PBF use?
The LT4275CIMS#PBF uses a 10-Lead Plastic MSOP package (3.00mm × 3.00mm body, 0.5mm lead pitch), with no exposed thermal pad. This differs from the DFN variants (e.g., LT4275CIDD#PBF) which include an exposed pad connected to GND. The MSOP variant is compatible with standard surface-mount assembly processes and offers easier visual inspection than DFN. Pin functions match the family-wide assignment: Pins 1–10 correspond to IEEEUVLO, AUX, RCLASS, RCLASS++, GND, T2P, PWRGD, HSSRC, HSGATE, and VPORT - though RCLASS++ and T2P are NC in the LT4275CIMS#PBF.
Can the LT4275CIMS#PBF be used in designs requiring thermal protection?
Yes, the LT4275CIMS#PBF includes built-in overtemperature protection that activates when junction temperature exceeds 150°C. Upon activation, it pulls down both HSGATE and PWRGD, disabling the external MOSFET and halting power delivery to protect itself and downstream circuitry. This feature operates independently of external monitoring and is specified across the full –40°C to 85°C operating junction temperature range. The LT4275CIMS#PBF's thermal shutdown behavior is documented in the datasheet's Electrical Characteristics table and Applications Information section - confirming its suitability for unventilated or high-ambient environments.
Is the LT4275CIMS#PBF pin-compatible with other members of the LT4275 family?
The LT4275CIMS#PBF shares identical pinout and package dimensions with LT4275A and LT4275B variants in the same MSOP configuration, making it physically pin-compatible. However, functional pin compatibility is limited: RCLASS++ (Pin 4) and T2P (Pin 6) are explicitly marked "not connected" in the LT4275CIMS#PBF datasheet, meaning those pins must remain unconnected in layout. While VPORT, HSGATE, PWRGD, and other core pins retain identical function, substituting LT4275CIMS#PBF into an LT4275A design will disable LTPoE++ and PSE-type indication - requiring schematic and firmware updates to maintain correct operation.
LT4275CIMS#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- Controller (PD)
- Number of Channels:
- 1
- Power - Max:
- 13 W
- Internal Switch(s):
- No
- Auxiliary Sense:
- Yes
- Standards:
- 802.3af (PoE)
- Voltage - Supply:
- 23V ~ 60V
- Current - Supply:
- 2mA (Max)
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
LT4275CIMS#PBF FAQ
1.How can I place an order for LT4275CIMS#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LT4275CIMS#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LT4275CIMS#PBF reliable?
The price and inventory of LT4275CIMS#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LT4275CIMS#PBF is usually 5 days.
3.What payment methods are accepted for LT4275CIMS#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LT4275CIMS#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LT4275CIMS#PBF?
LT4275CIMS#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LT4275CIMS#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LT4275CIMS#PBF?
For technical support, including LT4275CIMS#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LT4275CIMS#PBF requirements.
6.How does Aetrix verify that LT4275CIMS#PBF is sourced from the original manufacturer or authorized distributors?
All LT4275CIMS#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LT4275CIMS#PBF meets industry standards.
7.What is the process for return or replacement of LT4275CIMS#PBF?
All LT4275CIMS#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LT4275CIMS#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LT4275CIMS#PBF part is unused and in its original packaging.
Return procedure for LT4275CIMS#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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