Analog Devices Inc. LTC1623CS8#PBF

Overview

LTC1623CS8#PBF from Analog Devices (formerly Linear Technology) is an SMBus/I²C-compatible dual high-side N-channel MOSFET switch controller that drives external power switches using integrated charge pumps. It operates from 2.7V to 5.5V, delivers gate drive voltage up to VCC + 6V, maintains strict SMBus input thresholds (VIL = 0.6V, VIH = 1.4V), and supports eight unique addresses via AD0/AD1 pins for multi-device bus systems - used in laptop power plane switching and portable equipment load control.

For engineers reviewing the LTC1623CS8#PBF datasheet, LTC1623CS8#PBF pinout, LTC1623CS8#PBF application, or LTC1623CS8#PBF equivalent, key selection criteria include its dual independent gate drive capability, 14µA standby current at 3.3V, built-in power-on reset and undervoltage lockout, absence of external pull-up requirements on DATA/CLK, and compatibility with standard SMBus Send Byte Protocol for deterministic switch control.

Technical Context

The LTC1623CS8#PBF implements a synchronous SMBus slave interface with Start/Stop detection logic, address decoding, and command-byte interpretation to independently enable GA and GB outputs. Its internal 300kHz charge pump oscillator generates boosted gate drive voltages without requiring secondary supplies.

It features programmable three-state address inputs (AD0, AD1), internal UVLO with ~3% hysteresis, and power-on reset with 300–1000µs delay. The device uses double-buffered output latching synchronized to the Stop condition, enabling synchronous execution across daisy-chained devices.

Key Specifications

Pinout & Package

Package: 8-lead plastic SO (Small Outline, narrow 0.150"), JEDEC MS-012AC, thermal resistance θJA = 110°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual high-side switch controller applications.

Compared with TPS23861RGE and MAX14721ATP+, the LTC1623CS8#PBF uniquely combines SMBus addressability, internal VCC-boosted gate drive for standard N-MOSFETs, and sub-15µA standby current - making it optimal for battery-sensitive, multi-device power rail control where external boost circuitry must be avoided.

Availability

LTC1623CS8#PBF is available at Aetrix Electronics and suitable for laptop computer power plane switching, portable equipment load control, and industrial control systems requiring stable component supply with long-term lifecycle support.

Supply support for LTC1623CS8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for legacy Linear products including the LTC1623 family.

The LTC1623 product line was designed specifically for SMBus/I²C-controlled high-side power switching in portable and embedded systems - emphasizing ultra-low quiescent current, robust bus interface compliance, and elimination of external gate drive components.

FAQ

What is the maximum gate drive voltage provided by the LTC1623CS8#PBF?

The LTC1623CS8#PBF generates gate drive voltages ranging from VCC + 2.7V to VCC + 6V, depending on supply voltage - e.g., 7.7V to 11.5V when VCC = 5.5V. This ensures full enhancement of standard N-channel MOSFETs without external boost circuitry. The internal feedback network clamps maximum VGS to prevent gate oxide overstress, and the LTC1623CS8#PBF datasheet specifies absolute maximum ratings of –0.3V to (VCC + 7V) on GA/GB pins.

Does the LTC1623CS8#PBF require external pull-up resistors on the DATA and CLK lines?

Yes, the LTC1623CS8#PBF requires external pull-up resistors on both DATA and CLK lines to VCC, as specified in the datasheet. The device does not include internal pull-ups; instead, it relies on external resistors sized to limit pull-up current to ≤350µA for SMBus compliance. The LTC1623CS8#PBF's open-drain DATA pin and CMOS CLK input depend on these external resistors to establish valid high logic levels and meet SMBus timing requirements including tHIGH and tr.

How many unique SMBus addresses can be configured on the LTC1623CS8#PBF?

The LTC1623CS8#PBF supports eight unique SMBus slave addresses via two three-state address pins (AD0 and AD1), each configurable to GND, VCC, or VCC/2. Table 1 in the datasheet confirms valid combinations yield addresses 1011000 through 1011111 (0xB0–0xB7). The LTC1623CS8#PBF does not support floating address pins, and tying both AD0 and AD1 to VCC/2 is explicitly prohibited as it produces an unused address.

What is the purpose of the internal power-on reset and undervoltage lockout in the LTC1623CS8#PBF?

The LTC1623CS8#PBF incorporates internal power-on reset (POR) and undervoltage lockout (UVLO) to ensure reliable startup and prevent erroneous switching during supply ramp-up or brownout conditions. POR delays operation for 300–1000µs after VCC exceeds the UVLO threshold (~2.0V typical), while UVLO disables outputs if VCC falls below ~1.5–2.5V with ~3% hysteresis. This guarantees the LTC1623CS8#PBF remains in a known safe state until stable supply is confirmed - critical for protecting downstream loads.

Can the LTC1623CS8#PBF drive both high-side and low-side N-channel MOSFETs simultaneously?

The LTC1623CS8#PBF is designed exclusively for high-side N-channel MOSFET control using its internal charge pumps to generate VCC-boosted gate drive. While Figure 12 in the datasheet shows a configuration driving a low-side switch (Si6954DQ) via GA/GB, this requires connecting the MOSFET source to GND and drain to load - effectively repurposing the output as a low-side driver. However, the LTC1623CS8#PBF lacks dedicated low-side logic or sinking capability; such use depends on external layout and may compromise timing or noise immunity compared to purpose-built low-side drivers.