Analog Devices Inc. LTC1693-1IS8#PBF

Overview

LTC1693-1IS8#PBF from Analog Devices (formerly Linear Technology) is a dual noninverting N-channel MOSFET driver in an 8-lead SOIC package, featuring 1.5A peak output current, 16ns rise/fall times at V_CC = 12V with 1nF load, and 1GΩ electrical isolation between drivers. It enables high-side/low-side gate drive in isolated DC/DC converters and synchronous rectifiers.

For engineers reviewing the LTC1693-1IS8#PBF datasheet, LTC1693-1IS8#PBF pinout, LTC1693-1IS8#PBF application, or LTC1693-1IS8#PBF equivalent, this device is selected for high-speed switching power stages requiring rail-to-rail CMOS-compatible inputs, undervoltage lockout, thermal shutdown, and independent ground-referenced drivers in industrial and telecom power supplies.

Technical Context

The LTC1693-1IS8#PBF integrates two fully independent, electrically isolated noninverting drivers-each with its own V_CC and GND pins-enabling operation across ±100V ground potential differences. Its input stage uses a 4V internal regulator to maintain V_CC-independent thresholds (V_IL = 1.4V, V_IH = 2.6V) with 1.2V hysteresis for noise immunity.

The output stage employs adaptive predriver logic with 6ns nonoverlapping timing to minimize cross-conduction, delivering 1.7A sink and 1.4A source peak currents. Undervoltage lockout activates below 4V, and thermal shutdown engages at 145°C with 20°C hysteresis-both disabling outputs and pulling them low.

Key Specifications

Pinout & Package

Package: 8-lead plastic SOIC (SO-8, narrow 0.150"), JEDEC MS-012, θ_JA = 135°C/W, TJ_MAX = 150°C.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual N-channel MOSFET driver applications.

Compared with IXDN604PI and TPS28225DR, the LTC1693-1IS8#PBF uniquely delivers dual isolated channels with integrated UVLO, thermal shutdown, and V_CC-independent hysteresis-making it the only option among the three suitable for industrial isolated DC/DC converters requiring robust fault protection and ground separation.

Availability

LTC1693-1IS8#PBF is available at Aetrix Electronics and suitable for industrial power supplies, telecom DC/DC converters, and motor control systems requiring stable component supply, long-term lifecycle support, and guaranteed I-grade temperature performance.

Supply support for LTC1693-1IS8#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains full product continuity, documentation, and technical support for the LTC portfolio.

The LTC1693 family was designed specifically for high-efficiency, high-density isolated and synchronous switching power supplies-emphasizing low quiescent current, fast edge rates, and robust isolation between gate drive channels.

FAQ

What is the maximum allowable voltage difference between GND1 and GND2 on the LTC1693-1IS8#PBF?

The LTC1693-1IS8#PBF specifies a maximum GND1–GND2 voltage difference of ±100V under steady-state conditions, with isolation resistance ≥0.075GΩ at 75V bias. This rating enables safe use in high-side gate drive applications where the high-side switch source floats at bus voltage. Exceeding ±100V may compromise isolation integrity or trigger latch-up.

Does the LTC1693-1IS8#PBF support driving both high-side and low-side N-channel MOSFETs simultaneously in a half-bridge configuration?

Yes, the LTC1693-1IS8#PBF supports simultaneous high-side and low-side N-MOSFET drive via its electrically isolated drivers: IN1/OUT1/GND1/V_CC1 can control the high-side FET (with GND1 tied to the switch node), while IN2/OUT2/GND2/V_CC2 controls the low-side FET (with GND2 tied to system ground). The 1GΩ isolation ensures no ground-loop coupling.

What is the purpose of the 1.2V input hysteresis on the LTC1693-1IS8#PBF, and how does it improve system reliability?

The 1.2V hysteresis between VIH (2.6V) and VIL (1.4V) prevents oscillation or false triggering during ground bounce events common in high-dI/dt switching nodes. For example, during MOSFET turn-off, transient ground shifts up to 1V will not cause unintended re-triggering-directly improving noise immunity in dense power PCB layouts without adding external Schmitt triggers.

Can the LTC1693-1IS8#PBF operate with V_CC below 4.5V, and what happens if V_CC drops during operation?

No-the absolute minimum V_CC is 4.5V per specifications; operation below this risks undefined behavior. If V_CC drops below 4V during operation, the undervoltage lockout (UVLO) circuit disables both drivers and pulls OUT1 and OUT2 low, preventing partial gate drive and potential shoot-through in the power stage. Recovery occurs only after V_CC rises above 4.2V (typ).

How does the LTC1693-1IS8#PBF achieve 16ns rise/fall times with only 12V V_CC, and what load condition is this specified at?

The LTC1693-1IS8#PBF achieves 16ns (typ) rise/fall times by delivering 1.7A sink and 1.4A source peak currents into a 1nF capacitive load at V_CC = 12V-matching typical gate capacitance of medium-power N-MOSFETs (e.g., Si4420, Qg ≈ 15nC). This is measured with input rise/fall <10ns and verified by design (not production tested) per datasheet Note 4.