Analog Devices Inc. LTC3589EUJ-1#PBF
- Part No.:
- LTC3589EUJ-1#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Power Management - Specialized
- Package:
- 40-WFQFN Exposed Pad
- Datasheet:
-
LTC3589EUJ-1#PBF.pdf
- Description:
- IC DC/DC CONV 8-OUTPUT 40QFN
- Quantity:
- Payment:

- Shipping:

Inventory:238
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Product details
Overview
LTC3589EUJ-1#PBF from Analog Devices (formerly Linear Technology) is a highly integrated 8-rail power management IC for ARM-based application processors, featuring three step-down DC/DC converters (1.6A, 1.0A, 1.0A), one 1.2A buck-boost regulator (1.8V–5.0V), three 250mA LDOs, and an always-on 25mA LDO. It supports i.MX53/51, PXA, and OMAP processors in handheld instruments and portable industrial devices.
For engineers reviewing the LTC3589EUJ-1#PBF datasheet, LTC3589EUJ-1#PBF pinout, LTC3589EUJ-1#PBF application, or LTC3589EUJ-1#PBF equivalent, key selection criteria include I²C-programmable rail voltages, dynamic voltage scaling, pushbutton-controlled sequencing, 8µA standby current, and 40-pin 6mm × 6mm QFN packaging with exposed thermal pad.
Technical Context
The LTC3589EUJ-1#PBF implements independent I²C-controlled regulation across eight output rails: BUCK1 (1.6A), BUCK2/BUCK3 (1.0A each), BB_OUT (1.2A buck-boost), and LDO1–LDO4 (25mA/250mA/250mA/250mA). Its sequenced startup supports both pin-strapped and I²C-programmed power-on/off/reset timing.
It integrates Burst Mode® operation for ultra-low quiescent current (8µA), selectable 1.12MHz/2.25MHz switching frequency, slew-rate-controlled dynamic voltage scaling, and fault reporting via PGOOD, RSTO, IRQ, PBSTAT, and WAKE pins - all coordinated through a single 400kHz I²C interface.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | VIN = 2.7V to 5.5V - supports single-cell Li-ion or dual-cell NiMH input without pre-regulation |
| Standby Current | 8µA - enables multi-week battery life in always-on system states |
| Switching Frequency | Selectable 1.12MHz or 2.25MHz - balances efficiency vs. size for 1µH–2.7µH inductors |
| BUCK1 Output Current | 1.6A - powers CPU core rails at up to 1.2V with <250mV dropout |
| BB_OUT Range | 1.8V to 5.0V - supplies configurable I/O voltage for SDIO, USB PHY, or display interfaces |
| LDO2–LDO4 Current | 250mA each - delivers low-noise analog bias for ADCs, sensors, or RF front-ends |
| I²C Interface | 400kHz Fast Mode - enables real-time rail reconfiguration during system runtime |
Pinout & Package
The LTC3589EUJ-1#PBF is housed in a thermally enhanced 40-pin 6mm × 6mm × 0.75mm plastic QFN package with exposed GND pad (Pin 41), requiring soldering to PCB for thermal and electrical integrity. θJA = 33°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN_LDO2 (Pin 1) | LDO2 input supply | Accepts 1.7V–VIN; powers LDO2 independently for noise isolation |
| LDO2 (Pin 2) | LDO2 regulated output | 250mA, I²C-adjustable 0.36V–VIN; bypassed with ≥1µF ceramic |
| LDO3 (Pin 3) | LDO3 regulated output | 250mA fixed 1.8V or 2.8V (LTC3589-1 variant); low-noise analog rail |
| LDO4 (Pin 4) | LDO4 regulated output | 250mA, I²C-selectable 1.2V–3.3V (LTC3589-1); supports multiple I/O standards |
| VIN_LDO34 (Pin 5) | LDO3/LDO4 input supply | Accepts 1.7V–VIN (LTC3589) or 3.0V–VIN (LTC3589-1); shared input domain |
| PVIN1–PVIN4 (Pins 6, 17, 22, 30) | Buck/buck-boost input supplies | Independent inputs per regulator; enable local decoupling and loss reduction |
| SW1–SW3 (Pins 7, 21, 19) | Buck switch node outputs | Connect to external inductors; require low-ESR ceramic output capacitors |
| SW4AB/SW4CD (Pins 28, 39) | Buck-boost switch nodes | Four-switch topology enabling bidirectional voltage conversion |
| EN1–EN4 (Pins 12, 23, 24, 25) | Regulator enable inputs | Logic-level control for pin-strapped sequencing; threshold 0.42V–1.2V |
| VSTB (Pin 14) | Standby rail toggle | Simultaneously switches up to four rails between run/standby voltages on command |
| PWR_ON (Pin 1) | Power-on trigger | Active-low input initiating full-system wake; 2ms response time (LTC3589-1) |
| PGOOD (Pin 13) | Power-good status | Open-drain output asserting when all enabled rails are within ±6% tolerance |
| RSTO (Pin 10) | Reset output | Open-drain reset signal synchronized to LDO1 power-good threshold |
| IRQ (Pin 38) | Interrupt request | Flags faults including overtemperature, undervoltage, or short-circuit events |
| SDA/SCL (Pins 16, 15) | I²C data/clock | 400kHz interface with 0.7×DVDD/0.3×DVDD thresholds; address 0x68 (write) |
Key Features
| Feature | Design Value |
|---|---|
| I²C-controlled dynamic voltage scaling | Enables real-time CPU core voltage adjustment during DVFS, reducing active power by >30% in burst workloads |
| Programmable soft-start rate | Adjustable slew control (0.8–2.0 V/ms) prevents inrush current damage to downstream FETs and capacitors |
| Pushbutton ON/OFF with hard reset | Single physical button manages full system power state, including 5s hard reset initiation without MCU involvement |
| Always-on 25mA LDO (LDO1_STBY) | Maintains RTC, memory retention, or wake logic during deep sleep, drawing only 8µA total system standby current |
| VSTB simultaneous rail toggling | Reduces software overhead by atomically transitioning up to four rails between high-performance and low-power states |
Applications
| Handheld Instruments | Portable Industrial Devices |
|---|---|
Use Scenario: Battery-powered multimeters and thermal imagers requiring precise analog sensor bias and low-noise ADC reference. IC Role / Device Role / Timing Role: LTC3589EUJ-1#PBF provides isolated 2.5V/3.3V LDO rails for op-amps and 1.8V for microcontroller I/O while managing buck converter sequencing during measurement bursts. Use Value: 250mA LDOs with 0.01%/V line regulation ensure <100µV offset drift across battery discharge; 8µA standby extends field use to >120 hours. | Use Scenario: Ruggedized barcode scanners and portable HMI terminals operating in wide temperature ranges (-40°C to 125°C). IC Role / Device Role / Timing Role: LTC3589EUJ-1#PBF powers ARM Cortex-A8 SoC cores (BUCK1), DDR memory (BUCK2), and display backlight drivers (BB_OUT) with coordinated start-up and thermal fault shutdown. Use Value: Integrated overtemperature protection and 150°C junction rating enable reliable operation in unventilated enclosures; VSTB pin simplifies transition to low-power scan mode. |
| Automotive Infotainment | Medical Devices |
Use Scenario: In-vehicle navigation systems with touchscreens, audio codecs, and GPS modules sharing a 12V automotive supply. IC Role / Device Role / Timing Role: LTC3589EUJ-1#PBF generates 1.2V CPU core, 1.8V memory, 3.3V I/O, and 5.0V USB PHY rails from a 5V intermediate bus, using I²C to adapt voltages per operational mode. Use Value: Selectable 2.25MHz switching frequency allows compact 1.0µH inductors; 400kHz I²C interface synchronizes rail changes with CAN bus activity to avoid EMI spikes. | Use Scenario: Portable ultrasound probes and patient monitors needing ultra-low EMI, high PSRR, and fail-safe power sequencing. IC Role / Device Role / Timing Role: LTC3589EUJ-1#PBF delivers clean 2.8V for analog front-end amplifiers and 1.8V for FPGA configuration while asserting RSTO only after all LDOs stabilize. Use Value: 250mA LDOs with <0.05% load regulation prevent gain error in transducer signal chains; PGOOD monitoring ensures no firmware execution until analog rails settle. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65910A3RSLR | TI device with 3 buck + 6 LDOs; lacks buck-boost; uses I²C but no VSTB rail toggle | Targeted at OMAP4; no native support for i.MX53/51 dynamic voltage scaling profiles | Choose for OMAP4 designs where buck-boost is unnecessary and higher LDO count is required |
| MAX20029ATI+T | Analog Devices part with 4 buck + 3 LDOs; integrated watchdog; operates up to 42V input | Designed for automotive 12V/24V systems; not qualified for portable battery-operated use | Choose for automotive infotainment with harsh environment requirements, not for handheld or medical battery-powered systems |
Compared with TPS65910A3RSLR and MAX20029ATI+T, the LTC3589EUJ-1#PBF uniquely combines buck-boost I/O regulation, VSTB atomic rail control, and sub-10µA standby - making it optimal for ARM-based portable systems requiring flexible voltage domains and long battery life.
Availability
LTC3589EUJ-1#PBF is available at Aetrix Electronics and suitable for handheld instruments, portable industrial devices, and medical electronics requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC3589EUJ-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors.
The LTC3589 product line was designed specifically for advanced portable microprocessor systems - delivering tightly regulated, sequenced, and dynamically scalable power to ARM-based SoCs in space-constrained, battery-sensitive applications.
FAQ
What is the maximum output current capability of the buck-boost regulator in LTC3589EUJ-1#PBF?
The buck-boost regulator (BB_OUT) in LTC3589EUJ-1#PBF delivers up to 1.2A continuous output current across its 1.8V–5.0V range. Peak switch current limits are 2.3A (SW4AB) and 1.0A reverse limit (SW4CD), verified under 3.8V input and 25°C conditions per the official datasheet Electrical Characteristics table.
Does LTC3589EUJ-1#PBF support dynamic voltage scaling via I²C?
Yes, LTC3589EUJ-1#PBF supports full dynamic voltage scaling (DVS) via its 400kHz I²C interface. Each buck and LDO output voltage is programmable in discrete steps (e.g., 12.5mV LSB for BUCKx feedback), enabling real-time adaptation of CPU core, memory, and I/O voltages during workload transitions without external components.
What is the operating temperature range for LTC3589EUJ-1#PBF?
LTC3589EUJ-1#PBF is rated for –40°C to +125°C junction temperature. This grade (E-grade) is confirmed in the Order Information table, where "LTC3589EUJ-1#PBF" is explicitly listed with "–40°C to 125°C" temperature range and UJ-1 package marking.
How does the VSTB pin function in LTC3589EUJ-1#PBF?
The VSTB pin in LTC3589EUJ-1#PBF serves as a synchronous rail toggle control: when asserted, it simultaneously shifts up to four preconfigured rails (e.g., BUCK1, LDO2, LDO3, LDO4) between their programmed "run" and "standby" output voltages. This hardware-accelerated feature eliminates software polling and reduces transition latency to <100µs.
Is LTC3589EUJ-1#PBF pin-compatible with other variants like LTC3589EUJ#PBF or LTC3589EUJ-2#PBF?
No, LTC3589EUJ-1#PBF is not pin-compatible with LTC3589EUJ#PBF or LTC3589EUJ-2#PBF. While all share the same 40-pin QFN package and pinout, functional differences exist - notably LDO3/LDO4 output voltages and VIN_LDO34 input ranges - requiring board-level validation before substitution. The datasheet explicitly states these are distinct variants, not drop-in replacements.
LTC3589EUJ-1#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 40-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Applications:
- Handheld/Mobile Devices, OMAP™
- Current - Supply:
- 8µA
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-QFN (6x6)
LTC3589EUJ-1#PBF FAQ
1.How can I place an order for LTC3589EUJ-1#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3589EUJ-1#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3589EUJ-1#PBF reliable?
The price and inventory of LTC3589EUJ-1#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3589EUJ-1#PBF is usually 5 days.
3.What payment methods are accepted for LTC3589EUJ-1#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3589EUJ-1#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3589EUJ-1#PBF?
LTC3589EUJ-1#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3589EUJ-1#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3589EUJ-1#PBF?
For technical support, including LTC3589EUJ-1#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3589EUJ-1#PBF requirements.
6.How does Aetrix verify that LTC3589EUJ-1#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3589EUJ-1#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3589EUJ-1#PBF meets industry standards.
7.What is the process for return or replacement of LTC3589EUJ-1#PBF?
All LTC3589EUJ-1#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3589EUJ-1#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3589EUJ-1#PBF part is unused and in its original packaging.
Return procedure for LTC3589EUJ-1#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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