Analog Devices Inc. LTC3625EDE-1#PBF

Overview

LTC3625EDE-1#PBF from Analog Devices (formerly Linear Technology) is a 1A dual-cell supercapacitor charger IC designed to charge two series-connected supercapacitors with automatic cell balancing, programmable 4.0V/4.5V output, 2.7V–5.5V input range, and <1µA shutdown current. It operates in dual-inductor mode to achieve fast charging for high-peak-power backup supplies in solid-state storage and wireless meters.

For engineers reviewing the LTC3625EDE-1#PBF datasheet, LTC3625EDE-1#PBF pinout, LTC3625EDE-1#PBF application, or LTC3625EDE-1#PBF equivalent, key selection criteria include per-cell voltage regulation (2.05V/2.30V), buck-boost topology with independent current control, integrated cell-balancing logic without external resistors, and DFN-12 package thermal performance under 125°C junction temperature.

Technical Context

The LTC3625EDE-1#PBF implements a synchronous buck converter regulating CBOT current via PROG-pin resistor (IBUCK = 1.2V × 118,000 / RPROG), and a synchronous boost converter delivering fixed 2A typical input current to CTOP. Both converters operate independently in dual-inductor mode, enabling simultaneous charging and minimizing total charge time.

Cell balancing is achieved by real-time monitoring of VMID and VOUT to dynamically enable/disable buck (CBOT regulation) and boost (CTOP regulation) stages - no external balancing components required. The device enters ultra-low-power sleep (<25µA VOUT current) upon reaching target voltage and reactivates on >135mV output droop.

Key Specifications

Pinout & Package

The LTC3625EDE-1#PBF is housed in a 12-lead 3mm × 4mm × 0.75mm DFN package with exposed GND pad (Pin 13) requiring PCB soldering for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar supercapacitor charging applications.

Compared with LTC3625EDE#PBF, the LTC3625EDE-1#PBF offers tighter per-cell regulation (2.05V/2.30V) ideal for 2.5V supercapacitors, while MAX17599ATP+T lacks native balancing and demands external components - making LTC3625EDE-1#PBF optimal for space-constrained, high-reliability backup systems.

Availability

LTC3625EDE-1#PBF is available at Aetrix Electronics and suitable for server backup power, industrial SSDs, and wireless smart meter applications requiring stable component supply, long-term lifecycle support, and guaranteed industrial-temperature operation.

Supply support for LTC3625EDE-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (including legacy Linear Technology products) is a global leader in high-performance analog, mixed-signal, and power management semiconductors.

The LTC3625 family is designed specifically for high-efficiency, low-component-count supercapacitor backup systems where automatic cell balancing, ultra-low quiescent current, and dual-inductor fast charging are critical.

FAQ

What is the maximum supercapacitor voltage imbalance the LTC3625EDE-1#PBF can correct during charging?

The LTC3625EDE-1#PBF corrects imbalance by actively regulating each cell's voltage via independent buck and boost stages. With CTL = GND (dual-inductor mode), it maintains ≤50mV offset between CTOP and CBOT after charging - verified at 100mV max offset under mismatched 10F/50F conditions per datasheet Figure TA01b. This ensures neither cell exceeds its 2.05V/2.30V rating.

How does the LTC3625EDE-1#PBF enter and exit sleep mode?

The LTC3625EDE-1#PBF enters sleep mode automatically when VOUT reaches its programmed value (4.0V or 4.5V) and remains there until output voltage drops >135mV below target - e.g., from self-discharge or load. Upon droop detection, it resumes charging the appropriate cell. Sleep current is 23µA typical from VIN and <25µA from VOUT, preserving stored energy.

Can the LTC3625EDE-1#PBF operate with only one inductor?

No - the LTC3625EDE-1#PBF is configured for dual-inductor operation only. Its CTL pin must be tied to GND (logic low) per datasheet Table 1 and Pin Functions. The "LTC3625EDE-1#PBF" part number explicitly denotes the -1 variant, which is factory-set for dual-inductor mode; single-inductor operation requires the base LTC3625EDE#PBF with CTL = VIN.

What is the role of the VMID pin in the LTC3625EDE-1#PBF balancing algorithm?

The VMID pin provides the midpoint voltage between the two series supercapacitors. The LTC3625EDE-1#PBF continuously compares VMID to VOUT to determine which cell needs charging: if VMID is low relative to VOUT, the boost stage activates to charge CTOP; if VMID is high, the buck stage activates to charge CBOT. This closed-loop feedback enables passive balancing without resistors.

Does the LTC3625EDE-1#PBF require external MOSFETs or diodes?

No. The LTC3625EDE-1#PBF integrates all power switches: a 120mΩ PMOS and 100mΩ NMOS for the buck stage (SW1 path), and complementary switches for the boost stage (SW2 path). Only two external inductors, one input capacitor, and the PROG resistor are required - achieving minimum external component count per datasheet Feature list.