Analog Devices Inc. LTC4259ACGW#PBF
- Part No.:
- LTC4259ACGW#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 36-BSOP (0.295", 7.50mm Width)
- Datasheet:
-
LTC4259ACGW#PBF.pdf
- Description:
- IC POE CNTRL 4 CHANNEL 36SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC4259ACGW#PBF from Analog Devices (formerly Linear Technology) is a quad-channel –48V Hot Swap™ controller for IEEE 802.3af-compliant Power Sourcing Equipment (PSE), integrating independent PD detection, classification, current limiting, short-circuit protection, and AC/DC disconnect per port. It supports autonomous or I²C-controlled operation with 4-bit programmable address (up to 64 ports), operates from –48V to –57V VEE, and delivers 2.5–5 mA VDD supply current at 3.3V. It is deployed in IP phone systems and midspan Ethernet power distribution infrastructure.
For engineers reviewing the LTC4259ACGW#PBF datasheet, LTC4259ACGW#PBF pinout, LTC4259ACGW#PBF application, or LTC4259ACGW#PBF equivalent, key selection criteria include IEEE 802.3af compliance per port, 36-pin SSOP package compatibility, –48V PSE system integration, and support for both autonomous and I²C-managed port control with interrupt-driven fault reporting.
Technical Context
The LTC4259ACGW#PBF implements four fully independent PSE channels, each with dedicated DETECTn, SENSEn, GATEn, and OUTn pins enabling discrete MOSFET control and sensing. Its architecture includes dual-mode UVLO (VEE turn-on at –31V, turn-off at –28V), programmable tSTART/tICUT/tDIS timing via register 16h, and integrated AC disconnect using OSCIN-driven signal injection onto DETECT pins with ±600 µA output capability.
It features a split-ground design (DGND/AGND), internal –20V BYP regulator, open-drain INT pin with maskable event sources (tSTART, tICUT, disconnect, class/detect complete), and I²C interface compliant with 400 kHz clock frequency, 1.3 µs SCL low time, and 200 ns data setup time - all specified over 0°C to 70°C ambient.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDD Supply Voltage | 3.0–4.0 V - powers digital logic and I²C interface; requires local 0.1 µF bypass to DGND |
| VEE Supply Range | –48 V to –57 V - defines operational window for IEEE 802.3af-compliant port voltage regulation |
| Detection Current (First Point) | 235–300 µA at VDETECT = –10 V - ensures reliable signature resistance measurement per IEEE 802.3af |
| Classification Threshold (Class 0–1) | 5.5–7.5 mA - sets minimum current for Class 0/1 PD identification during classification phase |
| Overcurrent Sense Voltage (VCUT) | 166–199 mV - triggers foldback current limit when external sense resistor exceeds threshold |
| I²C Clock Frequency | 400 kHz - enables high-speed register access without violating timing constraints (t3 = 1.3 µs min) |
| Operating Temperature | 0°C to 70°C - specifies commercial-grade ambient range for stable PSE operation in telecom environments |
Pinout & Package
Package: 36-pin plastic SSOP (GW), 0.025" pitch, JEDEC MS-012AC, body size 10.2 mm × 5.3 mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RESET (1) | Active-low chip reset | Holds all ports off and registers in power-up state until pulled high; immune to <1 µs glitches |
| BYP (2) | Internal –20 V regulator output | Requires external 0.1 µF/100 V X7R capacitor; not for general-purpose use |
| INT (3) | Open-drain interrupt output | Asserts on configurable events (e.g., tICUT fault, disconnect); updated only between I²C transactions |
| SCL (4) | I²C serial clock input | High-impedance input; must be connected directly to I²C bus with pull-up to VDD |
| SDAOUT (5) | I²C serial data output | Open-drain output; used with SDAIN for opto-isolated bidirectional SDA implementation |
| AD0–AD3 (7–10) | I²C address bits | Set 4-bit slave address (010A3A2A1A0)b; ≤10 kΩ pull-up/down required |
| DETECT1–4 (11–14) | PD signature sensing inputs | Monitor port impedance for detection/classification; support AC disconnect via OSCIN coupling |
| GATE1–4 (23,26,30,33) | External MOSFET gate drivers | Clamped to 10–15 V above VEE; provide fast pull-down (100 mA) during short-circuit |
| SENSE1–4 (22,25,29,32) | Current sense inputs | Measure voltage across external sense resistor (e.g., 0.5 Ω); trigger VCUT/VLIM thresholds |
| OSCIN (36) | AC disconnect oscillator input | Accepts ~100 Hz sine wave (2 VPP, –0.3 V to 2.5 V); drives amplified signal to DETECT pins |
Key Features
| Feature | Design Value |
|---|---|
| Quad independent IEEE 802.3af PSE ports | Each port implements full detection, classification, current limiting, and disconnect-no shared resources or cross-port interference |
| Programmable AC/DC disconnect | Configurable per port via Disconnect Enable register (13h); AC mode uses OSCIN-driven impedance sensing, DC mode monitors VSENSEn threshold (2.52–4.97 mV) |
| Autonomous or I²C-managed operation | Auto pin (35) selects startup mode (Auto/Semiauto/Manual); I²C allows dynamic reconfiguration of timing, enable states, and interrupt masking |
| Interrupt-driven fault reporting | INT pin signals 8 distinct events (e.g., tSTART timeout, tICUT fault, disconnect); maskable per-event via Int Mask register (01h) |
| Scalable external FET control | GATE pins drive discrete N-channel MOSFETs; current sense resistors and diodes allow power-level scaling and ESD/transient protection |
Applications
| IP Phone Power Distribution | Midspan Ethernet Switch |
|---|---|
Use Scenario: Powering VoIP phones across unshielded twisted-pair cabling in enterprise LANs with centralized power management. IC Role / Device Role / Timing Role: Quad-channel PSE controller managing up to four concurrent PoE ports, performing IEEE 802.3af detection/classification and delivering regulated –48V power. Use Value: Enables single-chip control of multiple PoE ports with autonomous startup (Auto pin), eliminating need for host MCU during initial deployment. |
Use Scenario: Adding PoE capability to legacy non-PoE Ethernet switches via midspan injectors supporting 4-port aggregation. IC Role / Device Role / Timing Role: Hot-swap controller implementing IEEE 802.3af-compliant power sourcing with AC disconnect for safety-critical remote device removal. Use Value: Provides per-port fault isolation and fast gate pull-down (<1 ms) during short-circuit, protecting upstream power supplies and cabling. |
| Industrial IoT Edge Gateway | Network Video Surveillance Hub |
Use Scenario: Powering ruggedized sensors and wireless modules in factory automation networks where reliability and thermal margin are critical. IC Role / Device Role / Timing Role: PSE controller operating in semiauto mode-detecting and classifying devices but awaiting host command before power application. Use Value: Supports deterministic power sequencing and firmware-controlled port enable/disable, reducing risk of inrush-induced brownouts. |
Use Scenario: Centralized powering of multiple IP cameras over Cat5e/Cat6 cabling in security installations requiring continuous uptime. IC Role / Device Role / Timing Role: Four-port PSE with programmable tDIS (300–800 ms) and tVMIN (0.02–1 ms) for precise DC disconnect timing during camera hot-swap. Use Value: Ensures safe, standards-compliant disconnection without arcing or transient voltage spikes on live Ethernet pairs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-port Power over Ethernet controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC4259IGW#PBF | Extended temperature grade (–40°C to 85°C); identical pinout, register map, and electrical specs except junction temp rating (150°C same) | Required for industrial or outdoor deployments where ambient exceeds 70°C | Select LTC4259IGW#PBF when operating in extended temperature environments; otherwise LTC4259ACGW#PBF suffices for commercial telecom gear |
| MAX5969B | Quad-port PSE controller with integrated 100BASE-TX PHY interface; no external OSCIN required for AC disconnect; different I²C register layout and timing | Targets designs needing integrated PHY and simplified AC disconnect without external oscillator | Choose MAX5969B only if PHY integration and reduced external component count outweigh register compatibility requirements |
Compared with LTC4259IGW#PBF, the LTC4259ACGW#PBF offers lower cost and sufficient thermal margin for indoor telecom equipment, while MAX5969B trades register compatibility for built-in PHY and oscillator-free AC disconnect-making it suitable only when those features directly reduce BOM or layout complexity.
Availability
LTC4259ACGW#PBF is available at Aetrix Electronics and suitable for IP phone systems, midspan Ethernet switches, and industrial IoT edge gateways requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for LTC4259ACGW#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its portfolio of high-performance analog and mixed-signal ICs for power management, signal conditioning, and interface applications.
The LTC4259A product line was designed specifically for IEEE 802.3af-compliant Power Sourcing Equipment, emphasizing robust hot-swap control, per-port autonomy, and flexible I²C configurability in telecom and enterprise networking infrastructure.
FAQ
What is the primary function of the LTC4259ACGW#PBF in a Power over Ethernet system?
The LTC4259ACGW#PBF serves as a quad-channel Power Sourcing Equipment (PSE) controller that implements IEEE 802.3af-compliant detection, classification, power application, and fault management for up to four Ethernet ports. It interfaces with external N-channel MOSFETs and sense resistors to deliver –48V power while monitoring for overcurrent, short-circuit, and disconnect events. The LTC4259ACGW#PBF supports both autonomous operation (via AUTO pin) and I²C-based host control, making it suitable for midspan injectors and integrated switch solutions.
Does the LTC4259ACGW#PBF require an external oscillator for AC disconnect functionality?
Yes, the LTC4259ACGW#PBF requires an external ~100 Hz sine-wave signal applied to the OSCIN pin (Pin 36) to enable AC disconnect. This signal is internally amplified and driven onto the DETECT pins to measure PD AC impedance. The specification mandates 2 VPP amplitude, negative peaks above –0.3 V, and positive peaks below 2.5 V. Without this input, AC disconnect cannot be activated-even if the AC Disconnect Enable bits in register 13h are set. The LTC4259ACGW#PBF does not generate the oscillator signal internally.
How does the LTC4259ACGW#PBF handle port shutdown during fault conditions?
Upon detecting overcurrent (exceeding VLIM threshold), the LTC4259ACGW#PBF initiates foldback current limiting and starts the tICUT timer. If the condition persists beyond the programmed tICUT duration (configurable via register 16h), the GATE pin is actively pulled down with 100 mA sink current to turn off the external MOSFET. Simultaneously, the corresponding tICUT Fault bit is set in the Fault Event register (06h), and the INT pin asserts if masked. The LTC4259ACGW#PBF does not auto-retry; recovery requires host intervention or RESET assertion.
Can the LTC4259ACGW#PBF operate without an I²C host controller?
Yes, the LTC4259ACGW#PBF supports fully autonomous operation when the AUTO pin (Pin 35) is asserted high. In Auto mode, it performs detection, classification, and power application without I²C interaction-using internal register defaults. All four ports can be enabled independently via SHDNn pins (17–20), and fault events still trigger the INT pin. However, real-time status monitoring, timing reconfiguration, and interrupt masking require I²C access. The LTC4259ACGW#PBF is designed for both standalone and host-managed deployments.
What is the significance of the VEE UVLO thresholds (–31 V turn-on, –28 V turn-off) for the LTC4259ACGW#PBF?
The VEE UVLO thresholds define the valid operating window for the –48V supply rail: the LTC4259ACGW#PBF enables port operation only when VEE rises above –31 V (VEEMINON), and disables ports if VEE drops below –28 V (VEEMINOFF). This hysteresis prevents oscillation near the compliance boundary and ensures the port voltage remains within IEEE 802.3af's –46.6 V to –57 V range after accounting for MOSFET, diode, and sense-resistor drops. Operation outside this window risks noncompliance or unsafe power delivery.
LTC4259ACGW#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 36-BSOP (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- Controller (PSE)
- Number of Channels:
- 4
- Power - Max:
- 15.4 W
- Internal Switch(s):
- No
- Auxiliary Sense:
- No
- Standards:
- 802.3af (PoE)
- Voltage - Supply:
- 48V ~ 57V
- Current - Supply:
- 2mA
- Operating Temperature:
- 0°C ~ 70°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-SSOP
LTC4259ACGW#PBF FAQ
1.How can I place an order for LTC4259ACGW#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC4259ACGW#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC4259ACGW#PBF reliable?
The price and inventory of LTC4259ACGW#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC4259ACGW#PBF is usually 5 days.
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Once your LTC4259ACGW#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC4259ACGW#PBF?
For technical support, including LTC4259ACGW#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC4259ACGW#PBF requirements.
6.How does Aetrix verify that LTC4259ACGW#PBF is sourced from the original manufacturer or authorized distributors?
All LTC4259ACGW#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC4259ACGW#PBF meets industry standards.
7.What is the process for return or replacement of LTC4259ACGW#PBF?
All LTC4259ACGW#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC4259ACGW#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC4259ACGW#PBF part is unused and in its original packaging.
Return procedure for LTC4259ACGW#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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