Analog Devices Inc. LTC4263CS#PBF
- Part No.:
- LTC4263CS#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
LTC4263CS#PBF.pdf
- Description:
- IC POE CNTRL 1 CHANNEL 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:260
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC4263CS#PBF from Analog Devices (formerly Linear Technology) is a single-channel IEEE 802.3af-compliant Power Sourcing Equipment (PSE) controller with integrated power MOSFET, autonomous PD detection/classification, and AC/DC disconnect sensing. It operates from a single –48V supply, delivers up to 15.4W per port, supports class-dependent current limiting (ICUT = 95–395 mA), and implements robust fault protection including foldback, thermal shutdown, and high-speed short-circuit limiting (IFAULT = 500–800 mA). It is used in standalone or multi-port Ethernet power injectors for IP phones and wireless access points.
For engineers reviewing the LTC4263CS#PBF datasheet, LTC4263CS#PBF pinout, LTC4263CS#PBF application, or LTC4263CS#PBF equivalent, key selection criteria include IEEE 802.3af compliance level, internal MOSFET RON (1.5–3.0 Ω), programmable power management across multiple ports, midspan/endpoint mode configuration, and LED-driven port status indication with fault-code blinking.
Technical Context
The LTC4263CS#PBF implements fully autonomous PSE operation using force-current two-point signature detection (IDET = 160–275 μA) and voltage-based classification (VCLASS = 16.5–20.5 V), eliminating need for host microcontroller. Its control architecture integrates inrush management via internal sense resistor, configurable detection backoff timing (tDBO = 3.0–3.4 s), and dual-mode disconnect sensing-AC disconnect enabled via OSC/ACOUT pins with 0.15 μF capacitance threshold, or DC disconnect via OUT pin monitoring.
Power allocation uses analog current-source-based PWRMGT signaling (–17.9 to –75.6 μA per class), where shared RC network sets system-wide power budget. Fault response includes hierarchical current limiting: high-speed IFAULT activation (500–800 mA), followed by ILIM clamping (405–445 mA), then foldback (IFB = 30–180 mA) and thermal protection, all coordinated without external intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| IEEE Compliance | Fully compliant with IEEE 802.3af Endpoint/Midspan PSE requirements, including detection, classification, and maintain-power-signature (MPS) timing. |
| VDD48 Supply Range | 33–66 V (typical 48 V); UVLO turn-off at 29–33 V ensures reliable startup under brownout conditions. |
| Internal MOSFET RON | 1.5–3.0 Ω (at 350 mA); enables efficient 15.4 W delivery with minimal conduction loss and thermal rise. |
| Class-Dependent ICUT | Configurable overload threshold: 95 mA (Class 1), 175 mA (Class 2), 375 mA (Class 0/3/4); enforced when ENFCLS = high. |
| LED Port Status | Open-drain LED pin pulses at 6% duty cycle when powered; blinks specific patterns for faults (e.g., invalid signature, short circuit). |
| Package & Temp Range | 14-pin SO package; commercial temperature range (0°C to 70°C); exposed pad not present (DFN only has EP). |
| Power Management | Analog current-source PWRMGT output (–17.9 to –75.6 μA) enables simple RC-based multi-port power budgeting without digital bus. |
Pinout & Package
Package: 14-lead plastic SO (Small Outline), 0°C to 70°C operating range. Pin 15 (exposed pad) is absent - only DFN variants include exposed VSS pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| LED (1) | Open-drain port status indicator | Pulled low during normal operation; blinks diagnostic codes for faults (e.g., open circuit, short, invalid class); supports 6% duty-cycle drive from 48V supply to minimize LED dissipation. |
| LEGACY (2) | Legacy PD detection mode select | High = enable legacy capacitor detection; low = IEEE-only; floating = force-power-on mode (non-compliant but useful for differential detection schemes). |
| MIDSPAN (3) | Midspan backoff enable | High = 3.2 s delay after failed detection (except open circuit); low = no delay; required for interoperability with endpoint PSEs on same cable. |
| PWRMGT (4) | Analog power budget node | Sources class-proportional current (–17.9 to –75.6 μA); voltage <1 V indicates available power; tied across multiple LTC4263s with RC network for system-level allocation. |
| VSS (5,6) | Negative 48V return | Common ground reference for all signals and power paths; pins 5 and 6 must be shorted on PCB for low-impedance return. |
| OSC (7) | AC disconnect oscillator | Connect 0.1 μF X7R cap to VSS to enable AC disconnect; tie to VSS to disable AC and use DC disconnect instead. |
| ACOUT (8) | AC disconnect sense input | Monitors port capacitance via RC network (1 kΩ + 0.47 μF); triggers disconnect if capacitance drops below ~0.15 μF for >350 ms (tMPDO). |
| OUT (9,10) | Main port power output | Drives PD through internal MOSFET; pins 9 and 10 tied together; supports DC disconnect directly or AC disconnect via external diode/resistor network. |
| VDD48 (11) | 48V supply input | Bypass with 0.1 μF capacitor to VSS; absolute max rating –80 V ensures robustness against transients (e.g., SMAJ58A clamp). |
| SD (12) | Shutdown control | Active-low; halts detection and powers down port; 4 s restart delay after release prevents rapid cycling. |
| ENFCLS (13) | Class enforcement enable | High = reduce ICUT for Class 1/2 (to 100/175 mA); low = fixed 375 mA ICUT for all classes - enforces IEEE power limits. |
| VDD5 (14) | Logic supply / regulator input | Accepts external 5 V or enables internal regulator via 0.1 μF bypass; powers digital logic and gate driver; max 5.5 V input. |
Key Features
| Feature | Design Value |
|---|---|
| Fully autonomous IEEE 802.3af operation | Eliminates need for microcontroller: integrated detection, classification, power-up sequencing, and fault recovery execute in hardware. |
| Internal MOSFET with thermal protection | On-resistance of 1.5–3.0 Ω enables 15.4 W delivery while built-in thermal shutdown prevents damage during sustained overload. |
| Programmable multi-port power management | Current-source PWRMGT pin allows analog sharing of 48 V supply across multiple LTC4263s using only resistor and capacitor - no digital interface required. |
| Configurable AC/DC disconnect sensing | Selectable via OSC pin: AC disconnect monitors port capacitance for hot-plug reliability; DC disconnect uses voltage threshold for simpler implementation. |
| LED-driven port diagnostics | Open-drain LED pin provides real-time status (on/off) and fault identification (blink patterns) without external logic or firmware. |
| Robust fault hierarchy | Three-tier current limiting (IFAULT → ILIM → IFB) plus thermal and UVLO/OVLO protection ensures safe operation under short, overload, and transient conditions. |
Applications
| IP Telephony Power Injector | Wireless Access Point Midspan |
|---|---|
Use Scenario: Standalone wall-mounted or rack-mounted injector supplying power to VoIP phones over existing Cat 5e cabling in enterprise offices. IC Role / Device Role / Timing Role: Acts as single-port PSE controller performing IEEE 802.3af detection (tDET = 270–310 ms), classification (tPDC = 34–39 ms), and controlled power application (tPON = 135–155 ms). Use Value: Enables zero-footprint deployment - no AC adapters or local power - while ensuring compatibility with legacy and IEEE-compliant phones via LEGACY pin configuration. | Use Scenario: Midspan PSE inserted between legacy Ethernet switch and Wi-Fi AP to add PoE capability without replacing core infrastructure. IC Role / Device Role / Timing Role: Implements midspan backoff (tDBO = 3.0–3.4 s) to avoid detection conflict with endpoint PSEs; uses AC disconnect (tMPDO = 320–380 ms) for reliable hot-plug detection. Use Value: Prevents simultaneous detection corruption with upstream switches, enabling seamless integration into mixed PSE environments while maintaining full IEEE compliance. |
| Industrial IoT Edge Gateway | Smart Building Sensor Hub |
Use Scenario: Embedded PoE port in gateway device powering connected sensors (e.g., temperature, occupancy) in factory or warehouse settings. IC Role / Device Role / Timing Role: Provides isolated 48 V power with DC disconnect sensing; leverages SD pin for remote port shutdown and ENFCLS for strict Class 1 current limiting (ICUT = 95–105 mA). Use Value: Ensures predictable 3.84 W delivery to low-power sensors while supporting scheduled maintenance via hardware-controlled shutdown without software stack dependency. | Use Scenario: Centralized hub powering multiple HVAC thermostats, lighting controllers, and door sensors over structured cabling in commercial buildings. IC Role / Device Role / Timing Role: Uses PWRMGT pin-sharing across four LTC4263CS#PBF units to allocate total 61.6 W (4 × 15.4 W) from single 48 V supply with RC-set budgeting. Use Value: Eliminates need for complex digital power management ICs or firmware - analog current summation ensures deterministic, glitch-free power distribution across all ports. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PSE controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS23753APWR | Single-channel IEEE 802.3af PSE controller with external MOSFET drive; requires external high-side switch; no integrated MOSFET. | Used where higher voltage tolerance (>60 V) or discrete FET selection is needed; lacks internal RON optimization and thermal protection integration. | Select TPS23753APWR when design requires >60 V operation or custom MOSFET selection; LTC4263CS#PBF preferred for compact, self-contained solutions. |
| LTC4270CDE#PBF | IEEE 802.3at (PoE+) compatible dual-port PSE controller; supports up to 30 W/port; includes I²C interface and advanced power budgeting. | Targets higher-power applications (e.g., PTZ cameras, thin clients); adds digital control complexity and larger footprint vs. single-port LTC4263CS#PBF. | Select LTC4270CDE#PBF for PoE+ systems requiring >15.4 W/port or multi-port coordination; LTC4263CS#PBF remains optimal for cost-sensitive, single-port 802.3af designs. |
Compared with TPS23753APWR, LTC4263CS#PBF reduces BOM count and layout area by integrating the power MOSFET and thermal protection, while compared with LTC4270CDE#PBF, it offers lower system cost and simpler analog power management for basic 802.3af deployments.
Availability
LTC4263CS#PBF is available at Aetrix Electronics and suitable for IP telephony injectors, wireless access point midspans, industrial IoT gateways, and smart building sensor hubs requiring stable component supply and long-term industrial availability.
Supply support for LTC4263CS#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC4263CS#PBF belongs to Linear's Power over Ethernet (PoE) PSE controller product line, designed specifically for simplified, autonomous, single-port IEEE 802.3af power injection in cost-sensitive and space-constrained networking equipment.
FAQ
What is the operating temperature range for the LTC4263CS#PBF?
The LTC4263CS#PBF is specified for commercial temperature operation from 0°C to 70°C. This distinguishes it from the 'I' grade (LTC4263IS#PBF), which supports –40°C to 85°C. The 'C' suffix in LTC4263CS#PBF explicitly denotes the commercial grade, validated across this range for stability in office and light-industrial environments.
Does the LTC4263CS#PBF include an integrated power MOSFET?
Yes, the LTC4263CS#PBF integrates a power MOSFET with guaranteed on-resistance of 1.5–3.0 Ω (at 350 mA). This eliminates the need for external switching components, simplifies layout, and enables direct connection of the OUT pins to Ethernet magnetics. Thermal protection is built-in to safeguard the MOSFET during sustained overload or short-circuit events.
How does the LTC4263CS#PBF handle IEEE 802.3af classification and current limiting?
The LTC4263CS#PBF performs automatic classification by applying ~18 V and measuring current draw (ICLASS = 55–75 mA), identifying Classes 0–4. When ENFCLS is high, it enforces class-specific ICUT thresholds: 95 mA (Class 1), 175 mA (Class 2), and 375 mA (Class 0/3/4). If ENFCLS is low, ICUT remains fixed at 375 mA regardless of detected class.
Can the LTC4263CS#PBF support both endpoint and midspan PSE configurations?
Yes, the LTC4263CS#PBF supports both modes via the MIDSPAN pin. When MIDSPAN is pulled high, it enables 3.2-second detection backoff for midspan operation to prevent conflicts with endpoint PSEs on the same link. When MIDSPAN is low, it operates as an endpoint PSE with no backoff delay - allowing immediate re-detection after failure.
What is the purpose of the PWRMGT pin on the LTC4263CS#PBF?
The PWRMGT pin on the LTC4263CS#PBF sources a class-proportional current (–17.9 to –75.6 μA) to implement analog power budgeting across multiple ports. By tying PWRMGT pins together with a shared RC network to VSS, designers allocate total 48 V supply capacity without digital communication - the LTC4263CS#PBF checks PWRMGT voltage (<1 V) before enabling each port.
LTC4263CS#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- Controller (PSE)
- Number of Channels:
- 1
- Power - Max:
- 15.4 W
- Internal Switch(s):
- Yes
- Auxiliary Sense:
- No
- Standards:
- 802.3af (PoE)
- Voltage - Supply:
- 33V ~ 66V
- Current - Supply:
- 2mA
- Operating Temperature:
- 0°C ~ 70°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SO
LTC4263CS#PBF FAQ
1.How can I place an order for LTC4263CS#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC4263CS#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC4263CS#PBF reliable?
The price and inventory of LTC4263CS#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC4263CS#PBF is usually 5 days.
3.What payment methods are accepted for LTC4263CS#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC4263CS#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC4263CS#PBF?
LTC4263CS#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC4263CS#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC4263CS#PBF?
For technical support, including LTC4263CS#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC4263CS#PBF requirements.
6.How does Aetrix verify that LTC4263CS#PBF is sourced from the original manufacturer or authorized distributors?
All LTC4263CS#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC4263CS#PBF meets industry standards.
7.What is the process for return or replacement of LTC4263CS#PBF?
All LTC4263CS#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC4263CS#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC4263CS#PBF part is unused and in its original packaging.
Return procedure for LTC4263CS#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC4263CS#PBF Tags

-
TPS2378DDAR
Texas Instruments

-
TPS23753APWR
Texas Instruments

-
TPS23756PWPR
Texas Instruments

-
TPS23750PWPR
Texas Instruments

-
MP8007GV-Z
Monolithic Power Systems Inc.

-
TPS23861PWR
Texas Instruments

-
TPS23753PWR
Texas Instruments

-
PD69201ILD-TR
Microchip Technology

-
SI3402-B-GM
Skyworks Solutions Inc.

-
SI3402-B-GMR
Skyworks Solutions Inc.

-
SI34071-A01-GMR
Skyworks Solutions Inc.

-
SI3404-A-GMR
Skyworks Solutions Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
