Analog Devices Inc. LTC4265CDE#PBF

Overview

LTC4265CDE#PBF from Analog Devices (formerly Linear Technology) is a IEEE 802.3at-compliant Powered Device (PD) interface controller for high-power Power-over-Ethernet applications up to 25.5W. It integrates a rugged 100V internal MOSFET, on-board 25kΩ signature resistor, 2-event classification recognition, programmable classification current via RCLASS, and complementary PWRGD outputs. It enables robust PD front-end operation in VoIP video phones and PTZ security cameras.

For engineers reviewing the LTC4265CDE#PBF datasheet, LTC4265CDE#PBF pinout, LTC4265CDE#PBF application, or LTC4265CDE#PBF equivalent, key selection considerations include 2-event classification support, 100mA controlled inrush current, ±3.5% classification accuracy, thermal/UVLO/OVLO protection, and DFN-12 (4mm × 3mm) package compatibility with LTC4264.

Technical Context

The LTC4265CDE#PBF implements IEEE 802.3at Layer 1 2-event classification detection using its T2PSE open-drain output and internal state machine that distinguishes mark events between classification cycles. Its signature resistance is actively corrupted during mark voltage windows to comply with IEEE 802.3at requirements.

It features dual power-good signaling: PWRGD (open-collector, referenced to VOUT, 14V clamped) and complementary PWRGD (open-drain, referenced to VIN), enabling direct interface with DC/DC converter RUN and SHDN pins. The integrated 100V MOSFET provides 0.7–1.0Ω on-resistance and 100mA inrush current limiting during power-up.

Key Specifications

Pinout & Package

The LTC4265CDE#PBF is housed in a 12-lead (4mm × 3mm) plastic DFN package with an exposed thermal pad (Pin 13) that must be soldered to VIN and PCB heat sink. Pins 5/6 (VIN) and 7/8 (VOUT) are internally paired and require external shorting at the board level.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Powered Device (PD) controller applications.

Compared with LT4275AIMSE#PBF and MAX5984DETE+T, the LTC4265CDE#PBF offers the most direct, pin-compatible migration path from LTC4264 while delivering autonomous 2-event classification in the smallest footprint-making it ideal for space-constrained 802.3at PDs where simplicity and reliability outweigh the need for 802.3bt or digital interfaces.

Availability

LTC4265CDE#PBF is available at Aetrix Electronics and suitable for 802.11n access points, PTZ security cameras, and high-power VoIP video phones requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across production batches.

Supply support for LTC4265CDE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains its high-reliability analog/power IC portfolio. Linear's legacy design ethos emphasizes precision, ruggedness, and application-specific integration for demanding industrial and communications systems.

The LTC4265CDE#PBF belongs to Linear's Power-over-Ethernet PD controller product line, engineered specifically to simplify IEEE 802.3at front-end implementation with minimal external components while guaranteeing interoperability with all certified PSEs.

FAQ

What is the operating temperature range for the LTC4265CDE#PBF?

The LTC4265CDE#PBF is rated for 0°C to 70°C ambient operation (Commercial grade). This range is specified in the Absolute Maximum Ratings table and applies to all electrical characteristics marked with "l", including signature resistance, classification accuracy, and inrush current. Designs intended for extended temperature environments should consider the industrial-grade LTC4265IDE#PBF variant instead.

How does the LTC4265CDE#PBF implement 2-event classification detection?

The LTC4265CDE#PBF uses an internal state machine to detect two complete classification-mark cycles: first classification (14.5–20.5V), followed by mark (6.9–10V), then second classification and mark. Only after confirming this exact sequence does it assert the T2PSE pin low. This hardware-based detection requires no external timing components or firmware, ensuring deterministic Type-2 PSE identification per IEEE 802.3at Section 33.3.2.2.

Can the LTC4265CDE#PBF be used with an auxiliary power source?

Yes-the LTC4265CDE#PBF supports auxiliary power via the SHDN pin. Driving SHDN high disables the PD interface, corrupts the signature resistance to <11kΩ (invalidating detection), and disconnects VOUT from VIN. This allows external power to safely supply downstream circuitry without interference. When SHDN is high, PWRGD becomes high-impedance to avoid conflicting with auxiliary-run logic.

What is the purpose of the exposed pad (Pin 13) on the LTC4265CDE#PBF?

The exposed pad (Pin 13) on the LTC4265CDE#PBF must be soldered to VIN and a PCB copper pour acting as a heat sink. It serves as the primary thermal conduction path-reducing θJA to 43°C/W-and also functions as an additional VIN connection to handle high inrush currents. Leaving it unconnected degrades thermal performance and risks junction overheating during sustained 100mA inrush or overload conditions.

Does the LTC4265CDE#PBF support IEEE 802.3af as well as 802.3at?

Yes-the LTC4265CDE#PBF is fully backward-compatible with IEEE 802.3af. It performs standard 25kΩ detection and 1-event classification for Type-1 PSEs, while adding autonomous 2-event classification for Type-2 PSEs. Its UVLO (30V min), OVLO (71V max), and signature resistance (23.25–26kΩ) meet both standards' requirements, enabling single-BOM deployment across af/at infrastructure.