Analog Devices Inc. LTC4367CDD#PBF
- Part No.:
- LTC4367CDD#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Power Management - Specialized
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
LTC4367CDD#PBF.pdf
- Description:
- SUPPLY PROTECTION CONTROLLER
- Quantity:
- Payment:

- Shipping:

Inventory:5,735
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC4367CDD#PBF from Analog Devices is a high-voltage, precision overvoltage/undervoltage/reverse supply protection controller for back-to-back N-channel MOSFETs. It operates from 2.5V to 60V input, withstands –40V to 100V fault transients, and delivers 13.1V gate drive enhancement with 70µA quiescent current - enabling robust automotive load-dump and industrial surge protection in compact 3mm × 3mm DFN packages.
For engineers reviewing the LTC4367CDD#PBF datasheet, LTC4367CDD#PBF pinout, LTC4367CDD#PBF application, or LTC4367CDD#PBF equivalent, this page provides verified functional specifications, validated pin-level circuit roles, confirmed automotive and industrial use cases, and two rigorously cross-checked alternative parts with documented technical and application differences.
Technical Context
The LTC4367CDD#PBF integrates dual fast comparators (1µs propagation delay) with 0.5V thresholds and 25mV hysteresis for UV/OV monitoring, a 400kHz charge pump driving GATE up to 13.1V above VOUT, and reverse-voltage detection that actively clamps GATE to VIN during negative transients. Its internal logic enforces a 32ms turn-on delay after fault clearance to suppress 50Hz/60Hz AC and line noise.
It controls external N-MOSFET pairs using three independent current sinks: 60mA fast pull-down on UV/OV faults, 90µA slow shutdown discharge, and automatic GATE-to-VOUT tracking below 2.2V. The FAULT open-drain output asserts low on any violation of the user-defined voltage window, SHDN deactivation, or VIN < 2.2V UVLO.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Protection Range | –40V to +100V - survives automotive load dump, battery reversal, and AC line coupling without external TVS or input capacitor. |
| Operating Voltage | 2.5V to 60V - supports wide-input industrial and 12V/24V automotive systems with no auxiliary bias required. |
| GATE Drive ΔV | Up to 13.1V above VOUT - ensures full enhancement of standard N-channel MOSFETs even at low VIN (e.g., 2.5V). |
| Quiescent Current | 70µA typical - enables always-on protection in battery-backed instrumentation without significant drain. |
| UV/OV Threshold Accuracy | ±1.5% (500mV ±7.5mV) - allows precise 3.5V–18V or 7V–36V windows using standard 1% resistors with minimal offset error. |
| Turn-On Delay | 32ms after fault clearance - debounces live connections and blocks 50Hz/60Hz AC power by design. |
| Shutdown Current | 5µA maximum - maintains ultra-low standby power during system sleep or disable states. |
Pinout & Package
Package: 8-lead (3mm × 3mm) plastic DFN with exposed pad (optional ground connection). Pin count and layout match MSOP-8 but with reduced footprint and improved thermal performance (θJC = 5.5°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | High-voltage input supply rail | Withstands –40V to 100V; powers internal LDO and charge pump; referenced for all protection thresholds. |
| UV | Undervoltage comparator input | 0.5V falling threshold with 25mV hysteresis; connects to resistor divider to set lower fault limit (e.g., 3.5V). |
| OV | Overvoltage comparator input | 0.5V rising threshold with 25mV hysteresis; connects to resistor divider to set upper fault limit (e.g., 36V). |
| GND | Device ground reference | Return path for internal regulators, comparators, and FAULT output; must be low-impedance for accurate sensing. |
| GATE | Gate drive output | Charge-pump-driven output referenced to VOUT; pulls up to VOUT +13.1V or down to min(VIN,VOUT) −0.2V. |
| VOUT | Output voltage sense | Senses post-MOSFET voltage; serves as charge pump return and GATE reference; tracks load-side rail. |
| FAULT | Open-drain fault indicator | Pulled low on UV/OV fault, SHDN low, or VIN < 2.2V; requires external pull-up for system-level fault signaling. |
| SHDN | Shutdown control input | Active-low enable; 0.75V threshold; places device in 5µA shutdown and initiates controlled GATE ramp-down. |
Key Features
| Feature | Design Value |
|---|---|
| No input TVS or bulk capacitor required | Validated for 100V/–40V transients per JEDEC JESD22-A114 without external clamping - reduces BOM count and board area. |
| Adjustable UV/OV thresholds | Set via two-resistor dividers with sub-1nA input leakage - enables precise 3.5V–18V, 7V–36V, or custom windows using 1% resistors. |
| Reverse supply blocking | Detects VIN < 0V and forces GATE = VIN - turns off M2 body diode to block reverse current while surviving –40V indefinitely. |
| Controlled MOSFET turn-off | 90µA SHDN sink + feedback loop drives GATE to track VOUT decay - limits di/dt, prevents voltage spikes across parasitic inductance. |
| AC power rejection | 32ms turn-on delay inherently blocks 50Hz/60Hz half-cycles - eliminates need for external zero-crossing detection in AC adapter interfaces. |
Applications
| Automotive Load-Dump Protection | Industrial Power Input Conditioning |
|---|---|
Use Scenario: 12V/24V vehicle electronics exposed to ISO 7637-2 Pulse 5a (100V, 400ms) during alternator load dump. IC Role / Device Role / Timing Role: Controller for back-to-back N-MOSFETs; enforces 32ms re-enable delay after overvoltage clears to prevent relay chatter and ECU reset loops. Use Value: Eliminates need for 100V-rated TVS diodes and large input capacitors - reduces cost and PCB area while meeting AEC-Q100 stress requirements. |
Use Scenario: Programmable logic controller (PLC) input module accepting 10–30V DC from diverse field power supplies with polarity and voltage uncertainty. IC Role / Device Role / Timing Role: Fault-tolerant front-end supervisor; monitors for undervoltage (e.g., 10V cutoff) and overvoltage (e.g., 30V clamp) using resistor-programmable thresholds. Use Value: Prevents damage from miswired 24V supplies or degraded batteries; 70µA IQ enables always-on monitoring in energy-constrained edge nodes. |
| Portable Instrumentation Power Gate | Network Equipment DC Input Protection |
Use Scenario: Handheld multimeter powered by replaceable alkaline or Li-ion batteries where reverse insertion or deep discharge must be blocked. IC Role / Device Role / Timing Role: Reverse-polarity and undervoltage protector; uses SHDN to gate power only when battery >3.2V and polarity is correct. Use Value: Blocks –40V reverse connection and disables output below safe operating voltage - protects sensitive ADCs and displays without diode drop loss. |
Use Scenario: Telecom switch/router with redundant 48V DC inputs subject to hot-swap transients, accidental AC coupling, and brownouts. IC Role / Device Role / Timing Role: Dual-supply selector and fault blocker; coordinates with second LTC4367 to isolate faulty input while maintaining uptime. Use Value: Enables seamless failover between PSUs; 5µA shutdown current supports long-term backup operation during mains outage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar overvoltage/undervoltage/reverse supply protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC4367CDD-1#PBF | 500µs GATE turn-on delay vs. 32ms; identical protection range, thresholds, and package. | Required for fast-recovery systems (e.g., motor drives) where 32ms delay causes unacceptable downtime. | Select when fault recovery speed outweighs AC rejection needs; not drop-in - recalibrate timing-critical firmware. |
| TPS26631RGER | Integrated 100V N-channel MOSFET; fixed 15.5V OV/5.5V UV thresholds; no adjustable resistive divider support. | Targeted at simpler 12V/24V systems without custom voltage windows; lacks reverse-voltage blocking capability. | Choose for lowest component count in fixed-threshold designs; avoid if reverse protection or programmable UV/OV is required. |
Compared with LTC4367CDD-1#PBF, the LTC4367CDD#PBF trades faster recovery for superior 50Hz/60Hz AC rejection and noise immunity; compared with TPS26631RGER, it offers full programmability and true reverse-blocking but requires external MOSFETs and layout attention to gate drive routing.
Availability
LTC4367CDD#PBF is available at Aetrix Electronics and suitable for automotive load-dump protection, industrial PLC input conditioning, and portable instrumentation power gating requiring stable component supply across extended temperature and voltage stress conditions.
Supply support for LTC4367CDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management ICs, serving industrial, automotive, communications, and healthcare markets.
The LTC4367CDD#PBF belongs to Linear's high-voltage protection controller family, designed specifically for ruggedized front-end power supervision in environments with unpredictable input sources - including automotive transients, industrial surges, and battery-reversal events.
FAQ
What is the absolute maximum voltage rating for the VIN pin of the LTC4367CDD#PBF?
The VIN pin of the LTC4367CDD#PBF has an absolute maximum rating of –40V to +100V. This rating is validated under transient conditions per JEDEC JESD22-A114 and allows direct connection to automotive battery rails without external clamping components. The device remains functional within its 2.5V to 60V operating range, but survives fault events beyond those limits - a key specification confirmed in the Absolute Maximum Ratings table of the official datasheet.
Does the LTC4367CDD#PBF require external MOSFETs, and what type is supported?
Yes, the LTC4367CDD#PBF requires two external N-channel MOSFETs connected in back-to-back configuration. It is explicitly designed to drive standard logic-level or standard-threshold N-MOSFETs (e.g., Si7942, Si4288) with VGS(max) ≥ 20V and VDS(max) ≥ 100V. The controller provides up to 13.1V of gate enhancement above VOUT and includes dedicated fast/slow pull-down paths - eliminating need for P-channel devices or discrete gate drivers in the LTC4367CDD#PBF application.
How does the LTC4367CDD#PBF handle reverse supply voltage (e.g., –20V at VIN)?
When VIN goes negative, the LTC4367CDD#PBF activates an internal switch that connects the GATE pin directly to VIN. This forces the source-gate voltage of the downstream N-MOSFET (M2) to zero, turning it off and blocking reverse current through its body diode. The device sustains –40V continuously and responds within microseconds - as verified in Figure 8 of the datasheet showing GATE tracking VIN during –20V hot-swap events. No external components are needed for this function in the LTC4367CDD#PBF implementation.
What is the purpose of the 32ms turn-on delay in the LTC4367CDD#PBF, and can it be disabled?
The 32ms turn-on delay in the LTC4367CDD#PBF is a hard-wired timing feature that prevents chattering during noisy or marginal input conditions - especially effective against 50Hz/60Hz AC line coupling and load-dump recovery oscillations. It cannot be disabled or shortened; it resets only after VIN remains within the programmed UV/OV window for the full duration. For applications requiring faster recovery, the pin-compatible LTC4367CDD-1#PBF variant offers a 500µs delay instead - but this is a separate part number, not a configurable option of the LTC4367CDD#PBF.
Can the UV and OV thresholds of the LTC4367CDD#PBF be set independently, and what accuracy is guaranteed?
Yes, the UV and OV thresholds of the LTC4367CDD#PBF are set independently using two separate resistor dividers connected to the UV and OV pins. Each input has a precise 0.5V comparator threshold with ±1.5% tolerance (±7.5mV) over temperature, and 25mV of hysteresis. Leakage current <1nA allows use of high-value resistors (e.g., 1.82MΩ, 243kΩ, 59kΩ) with minimal error - enabling accurate windows like 3.5V–18V or 7V–36V as demonstrated in the datasheet's Figure 4 and Table 1 for the LTC4367CDD#PBF.
LTC4367CDD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Applications:
- Overvoltage, Undervoltage Protection
- Current - Supply:
- 70µA
- Voltage - Supply:
- 2.5V ~ 60V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-DFN (3x3)
LTC4367CDD#PBF FAQ
1.How can I place an order for LTC4367CDD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC4367CDD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC4367CDD#PBF reliable?
The price and inventory of LTC4367CDD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC4367CDD#PBF is usually 5 days.
3.What payment methods are accepted for LTC4367CDD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC4367CDD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC4367CDD#PBF?
LTC4367CDD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC4367CDD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC4367CDD#PBF?
For technical support, including LTC4367CDD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC4367CDD#PBF requirements.
6.How does Aetrix verify that LTC4367CDD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC4367CDD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC4367CDD#PBF meets industry standards.
7.What is the process for return or replacement of LTC4367CDD#PBF?
All LTC4367CDD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC4367CDD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC4367CDD#PBF part is unused and in its original packaging.
Return procedure for LTC4367CDD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC4367CDD#PBF Tags

-
TPS2511DGNR
Texas Instruments

-
UTC2000/MG
Microchip Technology

-
TUSB320HAIRWBR
Texas Instruments

-
TPS61252DSGR
Texas Instruments

-
PI5USB30216CXUAEX
Diodes Incorporated
-
SN6501DBVR
Texas Instruments

-
CYPD3177-24LQXQT
Infineon Technologies
-
SN6501QDBVRQ1
Texas Instruments

-
STUSB1600AQTR
STMicroelectronics

-
SN6505BDBVR
Texas Instruments
-
SN6501DBVT
Texas Instruments

-
TPS65150PWPR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

