Analog Devices Inc. LTC7062EMSE#PBF
- Part No.:
- LTC7062EMSE#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Gate Drivers
- Package:
- 12-TSSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
LTC7062EMSE#PBF.pdf
- Description:
- IC GATE DRVR HIGH-SIDE 12MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC7062EMSE#PBF from Analog Devices is a 100V dual high-side N-channel MOSFET gate driver IC with independent floating supplies, 0.8Ω pull-down / 1.5Ω pull-up drive strength, TTL/CMOS-compatible inputs, and open-drain fault indicator - designed for high-noise industrial and automotive power systems driving synchronous buck, half-bridge, or dual-phase topologies.
For engineers reviewing the LTC7062EMSE#PBF datasheet, LTC7062EMSE#PBF pinout, LTC7062EMSE#PBF application, or LTC7062EMSE#PBF equivalent, key selection criteria include floating supply voltage range (4V–14V per channel), ±10V ground difference tolerance, 21ns max propagation delay, thermal shutdown at ~180°C, and MSOP-12 exposed-pad thermal performance.
Technical Context
The LTC7062EMSE#PBF implements two fully symmetric, isolated high-side gate drivers - each with dedicated level-shifting circuitry referenced to its own return (G1RTN/G2RTN), enabling operation across ±10V ground potential differences relative to SGND. Each channel features independent UVLO monitoring of its floating supply (G1VCC–G1RTN, G2VCC–G2RTN) and internal 1000kΩ pull-down on logic inputs.
Its output stage uses P-channel (1.5Ω RDS(ON)) pull-up and N-channel (0.8Ω RDS(ON)) pull-down devices, delivering up to 6A peak sink current at 10V supply, with rise/fall times of 18ns/14ns into 3.3nF load. Fault detection includes VCC UVLO/OVLO (4.3V/14.6V), floating supply UVLO (3.4V), and thermal shutdown (~180°C).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Max | 100V - supports high-voltage bus applications without external level-shifting or isolation. |
| G1/G2 Drive Strength | 0.8Ω pull-down / 1.5Ω pull-up - enables fast switching of high-QG MOSFETs (e.g., 3nF load in 18ns). |
| VCC Range | 5V to 14V - powers internal logic and generates 4.5V bias rail; independent of floating supplies. |
| Floating Supply Range | 4V to 14V per channel (G1VCC–G1RTN, G2VCC–G2RTN) - accommodates logic-level and high-threshold MOSFETs. |
| Propagation Delay | 20–21ns - ensures tight timing control in high-frequency (>1MHz) power converters. |
| Ground Difference Tolerance | ±10V between G1RTN/G2RTN and SGND - maintains noise immunity in high-dV/dt environments. |
| Operating Temp | –40°C to 125°C (E-grade) - qualified for industrial and under-hood automotive subsystems. |
Pinout & Package
Package: 12-lead plastic MSOP with exposed thermal pad (pin 13 = SGND), θJA = 40°C/W. Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| G1IN | Logic input for Channel 1 | TTL/CMOS-compatible; internal 1000kΩ pull-down holds G1 low if floating. |
| G2IN | Logic input for Channel 2 | Independent of G1IN; enables complementary or non-complementary switching. |
| FLT | Open-drain fault indicator | Pulled low during VCC UVLO/OVLO, floating supply UVLO, or thermal shutdown; requires external pull-up (e.g., 51kΩ). |
| NC | No connect | Pins 4 and 9 are unused; must be left unconnected or tied to SGND per layout guidelines. |
| VCC | IC bias supply | Powers internal logic; generates 4.5V internal rail; bypass with ≥0.1µF capacitor to SGND. |
| G2VCC | Channel 2 gate driver supply | Bias source for G2 output; requires local bypass capacitor to G2RTN. |
| G1VCC | Channel 1 gate driver supply | Bias source for G1 output; requires local bypass capacitor to G1RTN. |
| G1 | Channel 1 gate driver output | Swings between G1VCC and G1RTN; Kelvin-connected to MOSFET gate for noise immunity. |
| G1RTN | Channel 1 return reference | Must be Kelvin-connected to MOSFET source; tolerates –10V to +100V vs SGND. |
| G2 | Channel 2 gate driver output | Swings between G2VCC and G2RTN; Kelvin-connected to MOSFET gate. |
| G2RTN | Channel 2 return reference | Must be Kelvin-connected to MOSFET source; tolerates –10V to +100V vs SGND. |
| SGND | Chip ground / exposed pad | Reference for internal circuitry; exposed pad (pin 13) must be soldered to PCB ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent high-side drivers | Enables asymmetric PWM control, phase-shifted operation, or redundancy without shared ground constraints. |
| ±10V ground difference tolerance | Eliminates need for optocouplers or isolated supplies in noisy high-dV/dt switch-node environments. |
| Integrated floating supply UVLO | Prevents partial turn-on of MOSFETs by disabling G1/G2 when G1VCC–G1RTN or G2VCC–G2RTN drops below 3.4V. |
| Thermal shutdown with auto-recovery | Halts switching at ~180°C junction temperature and resumes at <165°C - protects against sustained overload. |
| Open-drain FLT with 100µs debounce | Provides system-level fault signaling with built-in delay to suppress transient glitches. |
Applications
| Industrial Motor Drives | Automotive DC-DC Converters |
|---|---|
|
Use Scenario: Driving high-side N-channel MOSFETs in 48V–100V industrial motor inverters with fast switching and high EMI immunity. IC Role / Device Role / Timing Role: Dual high-side gate driver providing independent, noise-immune control of upper-leg switches in three-phase or dual-phase configurations. Use Value: Enables use of lower-RDS(on) N-channel MOSFETs instead of P-channel, reducing conduction losses by >30% in 100V bus systems. |
Use Scenario: Controlling high-side switches in 12V/48V bidirectional DC-DC converters for 48V mild-hybrid automotive systems. IC Role / Device Role / Timing Role: Floating gate driver maintaining precise timing and shoot-through prevention despite large ground transients across battery disconnect switches. Use Value: Supports AEC-Q100-compliant designs (I/J/H grades available) with validated thermal performance up to 150°C junction temperature. |
| Telecom Power Supplies | High-Density Server VRMs |
|
Use Scenario: Driving dual high-side MOSFETs in telecom rectifiers and intermediate bus converters operating from –48V or 54V input rails. IC Role / Device Role / Timing Role: Symmetric dual driver enabling interleaved operation with matched propagation delay (<1ns skew) for reduced input ripple. Use Value: Delivers 18ns rise time into 3.3nF loads at 10V supply - supports >2MHz switching for compact magnetics and smaller output capacitors. |
Use Scenario: Gate-driving high-threshold N-channel MOSFETs in multiphase server VRMs where layout-induced ground bounce exceeds ±5V. IC Role / Device Role / Timing Role: High-noise-immunity gate driver with independent floating references, eliminating need for isolated gate drivers in dense PCB layouts. Use Value: Reduces BOM count by replacing two discrete isolated drivers with single monolithic IC while maintaining >100V common-mode transient immunity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual high-side gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC7060EMSE#PBF | Includes programmable dead-time (31–76ns); shoot-through protection enabled; same 100V rating and drive strength. | Required for half-bridge configurations where cross-conduction prevention is mandatory. | Select LTC7060EMSE#PBF when dead-time control is needed; LTC7062EMSE#PBF is preferred for independent dual-channel control without interlock. |
| LTC7063HMSE#WPBF | Rated for 150V absolute max input; same pinout and logic interface; AEC-Q100 qualified (H-grade, –40°C to 150°C). | Suitable for 400V+ EV traction auxiliary supplies or industrial HVDC systems requiring higher voltage margin. | Choose LTC7063HMSE#WPBF only when >100V bus voltage or automotive qualification beyond E-grade is required. |
Compared with LTC7060EMSE#PBF and LTC7063HMSE#WPBF, the LTC7062EMSE#PBF offers optimal cost/performance for dual independent high-side drive in 100V industrial and telecom systems - trading dead-time programmability and extended voltage rating for simplified control and lower gate count.
Availability
LTC7062EMSE#PBF is available at Aetrix Electronics and suitable for industrial motor drives, automotive DC-DC converters, and telecom power supplies requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for LTC7062EMSE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, communications, and automotive markets.
The LTC7062 belongs to Analog Devices' high-voltage gate driver product line, engineered for noise-immune, high-efficiency power conversion in harsh environments - emphasizing floating supply robustness, thermal reliability, and layout-friendly integration.
FAQ
What is the maximum allowable ground potential difference between G1RTN/G2RTN and SGND for LTC7062EMSE#PBF?
The LTC7062EMSE#PBF supports a ground potential difference of –10V to +100V between G1RTN or G2RTN and SGND, enabling reliable operation in high-dV/dt environments such as motor drives and telecom rectifiers where switch-node ringing exceeds ±5V. This specification is verified per Absolute Maximum Ratings and confirmed in the Pin Functions section of the datasheet.
Does LTC7062EMSE#PBF include shoot-through protection?
No, the LTC7062EMSE#PBF does not include shoot-through protection - unlike the LTC7060 and LTC7061 in the same family. Its two channels operate independently with no hardware interlock. System-level shoot-through prevention must be implemented externally via controller logic or timing constraints.
What is the purpose of the exposed pad (pin 13) on the LTC7062EMSE#PBF MSOP package?
The exposed pad (pin 13) on the LTC7062EMSE#PBF is SGND and must be soldered to the PCB ground plane. It serves both electrical (low-impedance return path for internal currents) and thermal functions (θJA = 40°C/W specified only when properly soldered), and failure to connect it degrades thermal performance and may cause premature thermal shutdown.
Can LTC7062EMSE#PBF drive logic-level MOSFETs with 4.5V gate threshold?
Yes, the LTC7062EMSE#PBF supports gate driver supply voltages from 4V to 14V per channel (G1VCC–G1RTN, G2VCC–G2RTN), making it compatible with logic-level MOSFETs requiring ≥4.5V VGS. However, drive strength decreases at lower voltages - e.g., pull-down resistance rises above 0.8Ω below 6V - so 10V is recommended for full 6A peak sink capability.
How does the FLT pin on LTC7062EMSE#PBF behave during fault conditions?
The FLT pin on LTC7062EMSE#PBF is an open-drain output pulled low to SGND within 100µs of any fault: VCC UVLO/OVLO, G1VCC–G1RTN or G2VCC–G2RTN UVLO, or thermal shutdown. After fault clearance, FLT returns high after a fixed 100µs internal delay - requiring an external pull-up resistor (e.g., 51kΩ to VCC) for proper logic-level signaling.
LTC7062EMSE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 12-TSSOP (0.118", 3.00mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- High-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 5V ~ 14V
- Logic Voltage - VIL, VIH:
- -
- Current - Peak Output (Source, Sink):
- -
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- 115 V
- Rise / Fall Time (Typ):
- 18ns, 14ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-MSOP-EP
LTC7062EMSE#PBF FAQ
1.How can I place an order for LTC7062EMSE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC7062EMSE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC7062EMSE#PBF reliable?
The price and inventory of LTC7062EMSE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC7062EMSE#PBF is usually 5 days.
3.What payment methods are accepted for LTC7062EMSE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC7062EMSE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC7062EMSE#PBF?
LTC7062EMSE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC7062EMSE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC7062EMSE#PBF?
For technical support, including LTC7062EMSE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC7062EMSE#PBF requirements.
6.How does Aetrix verify that LTC7062EMSE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC7062EMSE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC7062EMSE#PBF meets industry standards.
7.What is the process for return or replacement of LTC7062EMSE#PBF?
All LTC7062EMSE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC7062EMSE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC7062EMSE#PBF part is unused and in its original packaging.
Return procedure for LTC7062EMSE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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