Analog Devices Inc. LTC7067RMSE#PBF

Overview

LTC7067RMSE#PBF from Analog Devices is a 150V dual high-side N-channel MOSFET gate driver with independent floating supplies, 0.8Ω pull-down / 1.5Ω pull-up drive strength, TTL/CMOS-compatible inputs, and open-drain fault indicator. It operates with VCC = 5–14V and floating gate-driver supplies up to 140V, enabling robust control of high-voltage power stages in isolated or noisy environments such as automotive DC-DC converters and telecom power systems.

For engineers reviewing the LTC7067RMSE#PBF datasheet, LTC7067RMSE#PBF pinout, LTC7067RMSE#PBF application, or LTC7067RMSE#PBF equivalent, key selection criteria include its ±10V ground-difference tolerance, symmetric dual-channel architecture, thermal shutdown at ~180°C, UVLO thresholds (4.3V on VCC, 3.4V on each floating supply), and MSOP-12 thermally enhanced package with exposed pad.

Technical Context

The LTC7067RMSE#PBF implements two fully independent high-side gate drivers, each with dedicated level-shifted logic, floating supply rails (G1VCC/G1RTN and G2VCC/G2RTN), and separate undervoltage lockout monitoring. Its architecture supports complementary or non-complementary switching without shoot-through protection - unlike LTC7060/LTC7061 - making it suitable for asymmetric topologies like dual-output boost or isolated half-bridge configurations.

Each channel delivers fast switching with 18ns rise/14ns fall time into 3nF load, propagation delays under 21ns, and rail-to-rail output swing referenced to its own return (G1RTN/G2RTN). The FLT pin provides consolidated fault reporting for VCC UVLO/OVLO, floating supply UVLO, and thermal shutdown, with 100µs delay before release.

Key Specifications

Pinout & Package

The LTC7067RMSE#PBF is housed in a thermally enhanced 12-lead plastic MSOP package (MSE12) with exposed die pad (Pin 13 = SGND), requiring soldering to PCB for electrical continuity and thermal performance (θJA = 40°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual high-side gate driver applications.

Compared with LTC7063RMSE#PBF, the LTC7067RMSE#PBF omits dead-time programming and shoot-through logic - reducing propagation delay and complexity for asymmetric or non-synchronous use cases. Against LTC7061IMSE#PBF, it delivers 50V higher voltage rating and AEC-Q100 qualification, making it preferable for automotive and high-reliability 135V bus systems.

Availability

LTC7067RMSE#PBF is available at Aetrix Electronics and suitable for automotive DC-DC converters, telecom power supplies, and industrial motor drives requiring stable component supply, AEC-Q100 compliance, and 150V high-side gate drive capability.

Supply support for LTC7067RMSE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, automotive, and communications markets.

The LTC7067RMSE#PBF belongs to Analog Devices' high-voltage gate driver product line, engineered specifically for noise-immune, floating high-side N-MOSFET control in demanding automotive and telecom power conversion systems.

FAQ

What is the maximum allowable voltage difference between G1RTN/G2RTN and SGND for LTC7067RMSE#PBF?

The LTC7067RMSE#PBF supports a voltage difference of −10V to +150V between either G1RTN or G2RTN and SGND. This ±10V negative tolerance enables reliable operation in high-noise environments with large ground transients, such as automotive 48V systems or telecom rectifiers with fast-switching nodes. Exceeding −10V may cause latch-up or damage.

Does LTC7067RMSE#PBF provide shoot-through protection between its two outputs?

No, the LTC7067RMSE#PBF does not include shoot-through protection. Unlike the LTC7060 or LTC7061, it features fully independent, symmetric channels with no inter-channel timing coordination. Users must implement external dead-time control or ensure non-overlapping drive signals to prevent simultaneous conduction in half-bridge configurations.

How is the FLT pin of LTC7067RMSE#PBF configured and what faults does it report?

The FLT pin of LTC7067RMSE#PBF is an open-drain output referenced to SGND and requires an external pull-up resistor (e.g., 51kΩ to VCC). It pulls low during VCC UVLO (≤4.3V) or OVLO (≥14.6V), UVLO on either G1VCC–G1RTN or G2VCC–G2RTN (<3.4V), or thermal shutdown (~180°C). A built-in 100µs delay ensures glitch immunity before FLT releases.

Can LTC7067RMSE#PBF drive logic-level MOSFETs, and what is the minimum floating supply voltage?

Yes, the LTC7067RMSE#PBF supports logic-level MOSFETs with a minimum floating supply voltage of 4V (G1VCC–G1RTN or G2VCC–G2RTN). At 4V, drive strength decreases but remains functional; typical operation uses 10V for optimal 0.8Ω/1.5Ω R_DS(ON). The IC is optimized for high-threshold MOSFETs but accommodates logic-level devices in space-constrained or low-voltage designs.

Is LTC7067RMSE#PBF qualified for automotive applications, and what temperature range does it support?

Yes, the LTC7067RMSE#PBF is AEC-Q100 qualified for automotive applications and specified over a junction temperature range of −40°C to +150°C. Its MSOP-12 package with exposed pad ensures thermal performance up to 150°C, and thermal shutdown activates at ~180°C to protect against sustained overload conditions in engine bay or battery pack environments.