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Analog Devices Inc. LTC9102AUKJ#TRPBF

Part No.:
LTC9102AUKJ#TRPBF
Manufacturer:
Analog Devices Inc.
Category:
Power Over Ethernet (PoE) Controllers
Package:
64-WFQFN Exposed Pad
Datasheet:
AetrixLTC9102AUKJ#TRPBF.pdf
Description:
12-CHANNEL 802.3BT POE PSE
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:3,691

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Product details

Overview

LTC9102AUKJ#TRPBF from Analog Devices is a 64-pin IEEE 802.3bt Type 3/4 and 802.3at Type 2 Power over Ethernet (PoE) power sourcing equipment (PSE) controller, supporting up to 48 ports with one power channel per port or 24 ports with two channels per port. It delivers up to 71.3W per port using external MOSFETs with ≤30mΩ RDS(ON), 100mΩ sense resistance, and integrated 14-bit per-port current/power monitoring. It is used in enterprise PoE midspans and switches powering high-power IP cameras, wireless access points, and PTZ systems.

For engineers reviewing the LTC9102AUKJ#TRPBF datasheet, LTC9102AUKJ#TRPBF pinout, LTC9102AUKJ#TRPBF application, or LTC9102AUKJ#TRPBF equivalent, key selection criteria include IEEE 802.3bt compliance, dual-signature PD detection, transformer-isolated I²C communication, per-port fast shutdown capability, and support for 4-pair or 2-pair power delivery modes.

Technical Context

The LTC9102AUKJ#TRPBF operates as the analog front-end of a chipset with the LTC9101-1 host controller, handling gate drive, current sensing, and isolation-coupled communication via CPA/CNA/DPA/DNA pins. It uses negative supply architecture (VEE referenced to AGND), supports both single- and dual-signature PD classification, and implements IEEE-mandated timing sequences including tDET (≤500ms), tCLASS (6ms), and tDIS (320–400ms).

It integrates 12-channel gate drivers (GATE1–GATE12), 12-channel sense amplifiers (SENSE1–SENSE12), and VSSK-referenced analog circuitry for precise current measurement across up to 12 power channels. Its 64-pin QFN package includes dedicated pins for isolated data/clock transceivers (CPA/CNA/DPA/DNA), power input (PWRIN), and thermal management (exposed VEE pad).

Key Specifications

ParameterValue and Actual Design Meaning
IEEE ComplianceFully compliant with 802.3bt Type 3/4 and 802.3at Type 2 PSE standards - ensures interoperability with Class 1–8 PDs and enables up to 71.3W delivered power per port.
Port ConfigurationSupports up to 48 ports (1 channel/port) or 24 ports (2 channels/port) - enables flexible system scaling in midspan or switch-integrated PSE designs.
Sense Resistance100mΩ per channel - enables accurate current measurement with minimal power loss and thermal rise in high-current PoE applications.
MOSFET RDS(ON)≤30mΩ - reduces conduction losses and heat dissipation in the power path, critical for dense multi-port PSE thermal management.
I²C Interface SpeedUp to 1MHz - allows rapid register read/write for real-time port control, fault logging, and dynamic power budgeting in host-managed systems.
Operating Temperature–40°C to +85°C ambient - qualified for industrial and telecom infrastructure environments including uncontrolled equipment rooms and outdoor cabinets.
Package64-lead 7mm × 11mm plastic QFN with exposed VEE pad - provides low thermal resistance (θJA = 22°C/W) and robust mechanical mounting for high-power PoE board layouts.

Pinout & Package

Package: 64-lead (7mm × 11mm) plastic QFN with exposed pad connected to VEE; θJC = 1°C/W, θJA = 22°C/W; exposed pad must be soldered to PCB for thermal and electrical integrity.

Pin/TerminalCircuit RoleDesign Meaning
CAP3Internal 3.3V regulator supply inputProvides regulated 3.3V rail for internal analog circuitry; requires external bypass capacitor to VEE.
GATE1–GATE12High-side gate drive outputsDrive external N-channel MOSFETs; each supports fast pull-down (65mA) and on-voltage ≥11V for reliable FET enhancement.
SENSE1–SENSE12Current sense amplifier inputsDifferential inputs referenced to VSSKx; interface with 0.1Ω sense resistors for 14-bit per-port current monitoring.
OUT1–OUT12Power output terminalsConnect to PoE transformer primary side; support 4-pair or 2-pair delivery depending on port configuration and PD signature.
CPA/CNA/DPA/DNATransformer-isolated data/clock I/OEnable optocoupler-free communication with LTC9101-1 host; eliminate isolated 3.3V supply and reduce BOM cost and complexity.
VEENegative power supply referenceSystem ground reference for analog section; exposed pad must be connected to PCB ground plane for thermal and noise performance.

Key Features

FeatureDesign Value
Transformer-isolated communicationEliminates optocouplers and isolated 3.3V supply - reduces BOM count by ≥5 components and improves long-term reliability vs. opto-based isolation.
Per-port 14-bit current/power monitoringEnables real-time power budgeting and fault diagnostics at ≤1% full-scale accuracy - supports IEEE-compliant power allocation and dynamic load shedding.
Proprietary multipoint PD detectionPrevents false identification under noisy line conditions - ensures robust operation in electrically harsh environments like factory floors or outdoor deployments.
Programmable current/power limitsAllows fine-grained per-port power capping (Class 1–8) - essential for managing total system power in constrained AC-fed midspans or PoE switches.
Versatile fast shutdownEnables selective port disable within microseconds - critical for safety-critical applications such as emergency lighting or security camera failover.

Applications

IP Surveillance SystemsEnterprise Wireless Access Points

Use Scenario: Powering 4-pair PoE++ PTZ cameras with heater/blower modules requiring >60W sustained delivery.

IC Role / Device Role / Timing Role: LTC9102AUKJ#TRPBF serves as the channel-level PSE analog controller, executing IEEE 802.3bt detection, classification, and inrush control per port under LTC9101-1 host coordination.

Use Value: Enables single-cable deployment of high-power imaging systems while maintaining strict thermal limits via low-RDS(ON) MOSFET drive and 100mΩ sense precision.

Use Scenario: Deploying dual-radio 802.11ax APs with integrated Bluetooth mesh and USB peripherals in dense office environments.

IC Role / Device Role / Timing Role: LTC9102AUKJ#TRPBF manages dual-signature classification and 4-pair power negotiation, ensuring compatibility with legacy and next-gen PDs on shared infrastructure.

Use Value: Delivers deterministic 71.3W per port with autoclass support, enabling full feature activation without oversizing upstream power supplies.

Smart Building Lighting ControllersIndustrial IoT Gateways

Use Scenario: Powering DALI-2+PoE LED drivers with embedded sensors and edge compute in commercial retrofit installations.

IC Role / Device Role / Timing Role: LTC9102AUKJ#TRPBF executes connection check, classification, and maintain-power-signature (MPS) maintenance per IEEE 802.3 Clause 33.

Use Value: Guarantees uninterrupted operation during brownouts via tDIS = 320–400ms dropout tolerance and robust MPS pulse width sensitivity (tMPS ≥ 6ms).

Use Scenario: Supplying power and data to ruggedized gateways with cellular modems, CAN interfaces, and multiple sensor buses in manufacturing plants.

IC Role / Device Role / Timing Role: LTC9102AUKJ#TRPBF provides isolated, noise-immune communication to LTC9101-1 host via CPA/CNA/DPA/DNA pins - eliminating ground loop risks in mixed-signal industrial settings.

Use Value: Achieves >99.9% uptime through ECC-protected eFlash, continuous per-port monitoring, and fast fault recovery (<50µs gate pull-down).

Equivalent & Alternatives

The following parts are listed as comparable options for similar PoE PSE controller applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
MAX5984AEUI+48-port 802.3bt PSE controller with integrated 12-channel gate drivers and 100mΩ sense; lacks transformer-isolated I²C - requires optocouplers or digital isolators.Requires additional isolation components and isolated 3.3V supply; higher BOM cost and layout complexity than LTC9102AUKJ#TRPBF.Select when existing design uses MAXIM ecosystem or requires pin-compatible upgrade from MAX5982/MAX5983.
TPS23882RTQT48-port 802.3bt PSE controller with integrated 12-channel gate drivers and 100mΩ sense; supports I²C but no transformer-isolated interface - relies on standard bidirectional I²C bus.No native isolation; requires external digital isolators for host-to-PSE separation - adds latency and component count versus LTC9102AUKJ#TRPBF's CPA/CNA architecture.Select for cost-sensitive designs where galvanic isolation is handled at system level, not chip level.

Compared with MAX5984AEUI+ and TPS23882RTQT, the LTC9102AUKJ#TRPBF uniquely eliminates optocouplers and isolated supplies via its transformer-coupled CPA/CNA/DPA/DNA interface, reducing BOM count by ≥5 components while maintaining full IEEE 802.3bt compliance and per-port diagnostic resolution.

Availability

LTC9102AUKJ#TRPBF is available at Aetrix Electronics and suitable for enterprise networking infrastructure, industrial PoE midspans, and smart building power systems requiring stable component supply, long lifecycle support, and guaranteed IEEE 802.3bt compliance.

Supply support for LTC9102AUKJ#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets with precision power, signal chain, and timing solutions.

The LTC9102AUKJ#TRPBF belongs to Analog Devices' Power over Ethernet (PoE) PSE controller product line, designed specifically for high-density, thermally constrained IEEE 802.3bt infrastructure equipment requiring ultra-low power path dissipation and transformer-isolated host communication.

FAQ

What is the maximum number of PoE ports supported by the LTC9102AUKJ#TRPBF?

The LTC9102AUKJ#TRPBF supports up to 48 PoE ports when configured with one power channel per port, or up to 24 ports when configured with two power channels per port. This flexibility is achieved in conjunction with the LTC9101-1 host controller, which manages system-level arbitration and register configuration. Port count is determined by external configuration pins (CFG[2:0]) and I²C programming of the LTC9101-1.

Does the LTC9102AUKJ#TRPBF require external optocouplers for isolation?

No, the LTC9102AUKJ#TRPBF does not require external optocouplers. It uses transformer-isolated communication via dedicated CPA/CNA/DPA/DNA pins to interface with the LTC9101-1 host controller, eliminating the need for optocouplers and an isolated 3.3V supply. This architecture reduces BOM cost, board space, and long-term reliability risks associated with LED aging in optocouplers.

What is the role of the VEE pin on the LTC9102AUKJ#TRPBF?

The VEE pin on the LTC9102AUKJ#TRPBF serves as the negative supply reference for the analog power section and is tied to the exposed thermal pad. It operates at a negative potential relative to AGND (up to –80V), enabling high-side sensing and gate drive for external N-channel MOSFETs. Proper soldering of the exposed VEE pad to the PCB ground plane is mandatory for thermal performance (θJA = 22°C/W) and electrical stability.

How does the LTC9102AUKJ#TRPBF support IEEE 802.3bt dual-signature PDs?

The LTC9102AUKJ#TRPBF supports dual-signature PDs through independent detection, classification, and power application on two pairsets per port. It implements IEEE-mandated connection check, 5-event physical classification, and autoclass functionality - distinguishing single- and dual-signature devices using ID0/ID1 pins and applying appropriate power limits (e.g., VLIM-2P thresholds) based on signature type and class.

What is the purpose of the SENSEn and VSSKn pins on the LTC9102AUKJ#TRPBF?

The SENSEn and VSSKn pins form a differential current sense input pair for each power channel. SENSEn connects to the high-side of the 0.1Ω sense resistor, while VSSKn references the low-side; their voltage difference (typically 24.98μV/LSB) is digitized internally to provide 14-bit per-port current readback. This architecture enables precise, temperature-stable current measurement without external amplification or calibration.

LTC9102AUKJ#TRPBF Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
64-WFQFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Type:
Controller (PSE)
Number of Channels:
48
Power - Max:
71.3 W
Internal Switch(s):
Yes
Auxiliary Sense:
No
Standards:
802.3at (PoE+), 802.3af (PoE), 802.3bt
Voltage - Supply:
3V ~ 3.6V
Current - Supply:
11mA
Operating Temperature:
-40°C ~ 85°C (TA)
Mounting Type:
Surface Mount
Supplier Device Package:
64-QFN (7x11)

LTC9102AUKJ#TRPBF FAQ

1.How can I place an order for LTC9102AUKJ#TRPBF through Aetrix?

Please submit a Request for Quotation (RFQ) for LTC9102AUKJ#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LTC9102AUKJ#TRPBF reliable?

The price and inventory of LTC9102AUKJ#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC9102AUKJ#TRPBF is usually 5 days.

3.What payment methods are accepted for LTC9102AUKJ#TRPBF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC9102AUKJ#TRPBF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LTC9102AUKJ#TRPBF?

LTC9102AUKJ#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LTC9102AUKJ#TRPBF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LTC9102AUKJ#TRPBF?

For technical support, including LTC9102AUKJ#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC9102AUKJ#TRPBF requirements.

6.How does Aetrix verify that LTC9102AUKJ#TRPBF is sourced from the original manufacturer or authorized distributors?

All LTC9102AUKJ#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC9102AUKJ#TRPBF meets industry standards.

7.What is the process for return or replacement of LTC9102AUKJ#TRPBF?

All LTC9102AUKJ#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC9102AUKJ#TRPBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC9102AUKJ#TRPBF part is unused and in its original packaging.

Return procedure for LTC9102AUKJ#TRPBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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