STMicroelectronics MASTERGAN2
- Part No.:
- MASTERGAN2
- Manufacturer:
- STMicroelectronics
- Category:
- Power Management - Specialized
- Package:
- 31-VQFN Exposed Pad
- Datasheet:
-
MASTERGAN2.pdf
- Description:
- HIGH PWR DENS GAN 600V HALF BRI
- Quantity:
- Payment:

- Shipping:

Inventory:179
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Product details
Overview
MASTERGAN2 from STMicroelectronics is a 600 V system-in-package integrating an asymmetrical half-bridge gate driver with two enhancement-mode GaN HEMTs - low-side RDS(on) = 150 mΩ (10 A), high-side RDS(on) = 225 mΩ (6.5 A) - in a single 9 × 9 mm QFN package. It enables high-frequency, high-efficiency switch-mode power supplies with integrated bootstrap diode, interlocking, UVLO on both sides, and thermal shutdown.
For engineers reviewing the MASTERGAN2 datasheet, MASTERGAN2 pinout, MASTERGAN2 application, or MASTERGAN2 equivalent, this device supports fast design of compact, high-power-density PFC and DC-DC converters where GaN's zero reverse recovery, precise timing match, and 3.3–15 V logic-compatible inputs simplify controller interfacing and layout.
Technical Context
The MASTERGAN2 implements a fully integrated half-bridge driver with independent logic-level inputs (HIN/LIN/SD/OD), internal level-shifting, and matched propagation delays (~46 ns each) to prevent cross-conduction. Its bootstrap architecture uses an integrated high-voltage DMOS diode referenced to OUTb, eliminating external bootstrap diodes for ≤500 kHz operation.
UVLO protection operates independently on VCC (4.2–4.5 V turn-on) and VBO (3.6–4.0 V turn-on), while thermal shutdown latches at 175 °C with 20 °C hysteresis and forces SD/OD low. The device supports industrial temperature range (−40 °C to +125 °C) and features dedicated gate resistors (RONL = 52 Ω, ROFFL = 2 Ω; RONH = 77 Ω, ROFFH = 2 Ω) for controlled switching.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS Rating | 650 V - Enables direct use in 400 V AC-input PFC and 520 V DC bus systems without derating. |
| RDS(on) LS / HS | 150 mΩ / 225 mΩ @ 25 °C - Defines conduction loss in high-side/low-side legs; increases to 330 mΩ / 495 mΩ at 125 °C. |
| ID (DC) LS / HS | 9.7 A / 6.5 A @ TCB = 25 °C - Sets maximum continuous current capability per leg under case-cooled conditions. |
| Switching Slew Rate | 100 V/ns - Enables >1 MHz operation with minimal EMI risk when layout-controlled. |
| Logic Input Range | 3.3–15 V with hysteresis - Allows direct interface with MCU GPIOs, DSPs, or Hall sensors without level-shifting. |
| Thermal Shutdown | 175 °C latch + 20 °C hysteresis - Protects GaN transistors from thermal runaway; signals fault via open-drain SD/OD pin. |
| Package | QFN 9 × 9 × 1 mm with exposed pads EP1–EP3 - Provides low Rth(J-CB) (1.9 °C/W LS, 2.8 °C/W HS) for high-power dissipation. |
Pinout & Package
MASTERGAN2 is housed in a thermally enhanced 31-pin QFN package (9 × 9 × 1 mm) with three exposed thermal pads (EP1: GND, EP2: SENSE, EP3: OUT) for optimized heat transfer to PCB copper planes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 15–19 (VS) | High-side drain supply | Connects directly to HV bus (up to 520 V); forms high-side GaN drain node. |
| 12–14, EP3 (OUT) | Half-bridge output | Common source/drain node between GaN transistors; connects to transformer primary or LC filter. |
| 4–11, EP2 (SENSE) | Low-side source reference | Provides PGND reference for low-side driver; internally tied to PGND and used for current sensing. |
| 22 (BOOT) | High-side floating supply | Charged via internal bootstrap diode; supplies high-side driver during HS conduction. |
| 21 (OUTb) | Bootstrap return | Internally connected to OUT; serves as reference for BOOT voltage (VBO = VBOOT − VOUTb). |
| 27 (VCC) | Logic supply | Powers level shifters and logic; UVLO threshold 4.2–4.5 V ensures robust startup. |
| 1 (PVCC) | Low-side buffer supply | Drives GL output; decoupled separately to minimize noise coupling into gate drive path. |
| 28, EP1 (GND) | Logic ground | Reference for VCC, LIN, HIN, SD/OD; must be star-connected to avoid ground bounce. |
| 3 (PGND) | Low-side buffer ground | Internally tied to SENSE; separates power ground from logic ground to reduce noise injection. |
| 26 (HIN) | High-side input | Active-high logic input; minimum pulse width 120 ns prevents spurious switching. |
| 24 (LIN) | Low-side input | Active-high logic input; includes internal 90–220 kΩ pull-down for fail-safe off-state. |
| 25 (SD/OD) | Shutdown/fault output | Open-drain fault indicator; pulled low during thermal shutdown or UVLO fault. |
| 20 (GH) | High-side gate driver | Outputs to high-side GaN gate; includes 77 Ω turn-on / 2 Ω turn-off resistance for controlled dV/dt. |
| 2 (GL) | Low-side gate driver | Outputs to low-side GaN gate; includes 52 Ω turn-on / 2 Ω turn-off resistance for clean switching. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated bootstrap diode | Eliminates external diode up to 500 kHz, reducing BOM count and PCB area by ~3 components. |
| Interlocking logic | Hardware-enforced deadtime prevents shoot-through even with overlapping HIN/LIN pulses. |
| Matched propagation delay | 46 ns (typ) for both HIN→GH and LIN→GL ensures symmetrical timing and minimizes duty-cycle distortion. |
| Dual UVLO protection | Independent monitoring of VCC (logic) and VBO (bootstrap) avoids erratic switching during supply sag or bootstrap depletion. |
| Reverse current capability | Enables synchronous rectification in LLC or active clamp topologies without body diode conduction loss. |
Applications
| Server PSU PFC Stage | Laptop Adapter Primary Side |
|---|---|
Use Scenario: 3.3 kW continuous boost PFC stage operating at 200–300 kHz with digital controller. IC Role / Device Role / Timing Role: Asymmetrical half-bridge GaN driver providing isolated gate drive for 650 V GaN switches in interleaved boost configuration. Use Value: Zero reverse recovery eliminates snubber losses; 150/225 mΩ RDS(on) reduces conduction loss by 40% vs. Si MOSFET equivalents at 100 kHz. | Use Scenario: 100 W ultra-compact USB-C PD adapter using active-clamp flyback topology. IC Role / Device Role / Timing Role: Integrated half-bridge driver controlling high-side and low-side GaN switches with precise timing match and interlock. Use Value: Compact 9×9 mm footprint enables <15 mm² board area for power stage; internal bootstrap diode removes discrete component. |
| Industrial DC-DC Converter | EV Onboard Charger Auxiliary Supply |
Use Scenario: 1.5 kW isolated DC-DC converter for factory automation, operating at 500 kHz with SiC/GaN hybrid control. IC Role / Device Role / Timing Role: High-voltage half-bridge driver managing asymmetric switching in phase-shifted full-bridge auxiliary stage. Use Value: −40 °C to +125 °C junction rating ensures reliability in uncooled enclosures; thermal shutdown protects against overload faults. | Use Scenario: 600 V auxiliary power supply inside 11 kW OBC, powering gate drivers and MCU during charging cycles. IC Role / Device Role / Timing Role: GaN-based half-bridge driving resonant tank in LLC converter, leveraging reverse conduction for ZVS. Use Value: Reverse current capability enables soft-switching across full load range; 100 V/ns slew rate supports >300 kHz operation with low EMI. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage GaN half-bridge driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| GaNSystems GS66508T | Discrete GaN FET + external driver; no integrated gate driver or bootstrap diode. | Requires separate level-shifter, UVLO, and bootstrap circuit; higher layout complexity and BOM count. | Select when custom gate drive timing or higher voltage margin (>650 V) is required. |
| TI UCC27611 | Standalone dual-channel GaN driver (no integrated FETs); 5–20 V supply, 1.8 ns delay matching. | Must pair with discrete GaN transistors; lacks thermal shutdown, UVLO on bootstrap, and interlock logic. | Select when maximum flexibility in FET selection and independent driver optimization is prioritized. |
Compared with MASTERGAN2, GS66508T offers higher voltage headroom but demands full external driver design, while UCC27611 delivers superior timing precision but requires discrete GaN pairing and adds 5+ passive components - making MASTERGAN2 optimal for rapid, space-constrained, high-efficiency designs where integration reduces risk and accelerates time-to-market.
Availability
MASTERGAN2 is available at Aetrix Electronics and suitable for server power supplies, laptop adapters, industrial DC-DC converters, and EV onboard charger auxiliary supplies requiring stable component supply and long-term production continuity.
Supply support for MASTERGAN2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering intelligent power, microcontrollers, sensors, and analog solutions for industrial, automotive, and consumer markets.
MASTERGAN2 belongs to ST's MASTERGAN family of system-in-package GaN solutions, designed specifically to accelerate adoption of gallium nitride in high-efficiency, high-power-density AC-DC and DC-DC conversion systems.
FAQ
What is the maximum recommended operating frequency for MASTERGAN2?
MASTERGAN2 is characterized for reliable operation up to 500 kHz with its integrated bootstrap diode. Above this frequency, an external bootstrap diode is recommended to maintain sufficient charge replenishment. Switching performance (100 V/ns slew rate, 70 ns ton/toff) supports designs targeting 1 MHz, but thermal and gate drive stability must be validated per layout and heatsinking.
Can MASTERGAN2 drive external GaN FETs instead of its internal ones?
No - MASTERGAN2 integrates fixed, non-bypassable GaN transistors; its gate drivers (GL/GH) are internally connected only to the on-die low-side and high-side GaN HEMTs. It does not provide isolated, configurable gate outputs for driving external devices. For external FET control, standalone drivers like UCC27611 or IRS2092S are appropriate alternatives.
How is thermal shutdown signaled, and can it be reset automatically?
Thermal shutdown pulls the SD/OD pin low (open-drain) and disables both GaN transistors. Recovery requires junction temperature to fall below (175 °C − 20 °C) = 155 °C AND SD/OD pin voltage to rise above 2.7 V (Vih). No external reset signal is needed - the device resumes normal operation automatically once both conditions are met and valid input transitions occur.
Is the BOOT pin capable of sustaining 600 V during operation?
Yes - the BOOT pin is rated for −0.3 V to 620 V (absolute max), and the recommended operating range extends to 530 V. This allows direct use in 400 V AC-input systems with 1.5× safety margin. The internal bootstrap diode and level-shifter are qualified for continuous 600 V blocking, verified per DS13597 Rev 2.0 electrical characteristics.
MASTERGAN2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 31-VQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Applications:
- Power Supplies
- Current - Supply:
- -
- Voltage - Supply:
- 3.3V ~ 15V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 31-QFN (9x9)
MASTERGAN2 FAQ
1.How can I place an order for MASTERGAN2 through Aetrix?
Please submit a Request for Quotation (RFQ) for MASTERGAN2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MASTERGAN2 reliable?
The price and inventory of MASTERGAN2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MASTERGAN2 is usually 5 days.
3.What payment methods are accepted for MASTERGAN2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MASTERGAN2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MASTERGAN2?
MASTERGAN2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MASTERGAN2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MASTERGAN2?
For technical support, including MASTERGAN2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MASTERGAN2 requirements.
6.How does Aetrix verify that MASTERGAN2 is sourced from the original manufacturer or authorized distributors?
All MASTERGAN2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MASTERGAN2 meets industry standards.
7.What is the process for return or replacement of MASTERGAN2?
All MASTERGAN2 units undergo pre-shipment inspection (PSI). If there is an issue with MASTERGAN2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MASTERGAN2 part is unused and in its original packaging.
Return procedure for MASTERGAN2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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