Analog Devices Inc./Maxim Integrated MAX17562AUD+
- Part No.:
- MAX17562AUD+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Power Management - Specialized
- Package:
- 14-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
MAX17562AUD+.pdf
- Description:
- IC OVERVOLTAGE PROTECTOR 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,657
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
The MAX17562AUD+ from Maxim Integrated is a latch-off overvoltage and overcurrent protection IC designed for industrial power rail supervision. It features 100mΩ (typ) internal FETs, adjustable OVLO (6V–36V) and UVLO (4.5V–24V), programmable current limit up to 4.2A, and thermal shutdown at +150°C. It protects systems against ±40V input faults in battery-powered and marine equipment.
For engineers reviewing the MAX17562AUD+ datasheet, MAX17562AUD+ pinout, MAX17562AUD+ application, or MAX17562AUD+ equivalent, key selection criteria include latch-off fault response, reverse-current blocking threshold (30–70mV), HVEN enable compatibility with 36V inputs, and TSSOP-14 thermal performance (θJA = 39°C/W).
Technical Context
The MAX17562AUD+ implements a latch-off overcurrent response: after 20.7ms (typ) blanking time, it permanently disables the internal FETs until EN or HVEN is cycled. Its dual enable architecture supports high-voltage (HVEN) and logic-level (EN) control, with independent reverse-current enable (RIEN) and open-drain FLAG assertion on OVLO, UVLO, thermal trip, or SETI <1V.
It integrates precision bandgap reference (1.210V typ), external resistor-programmable thresholds via OVLO/UVLO pins, and reverse-blocking response within 0.9–2.0µs. The device operates across -40°C to +125°C with ±15% current-limit accuracy and 3% OVLO hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| OVLO Range | 6V–36V adjustable; factory preset 33V (typ) - sets maximum safe input voltage before FET turn-off |
| UVLO Range | 4.5V–24V adjustable; factory preset 19.2V (typ) - prevents operation below minimum system supply |
| Current Limit | 0.7A–4.2A programmable via SETI resistor; ±15% accuracy ensures predictable short-circuit energy handling |
| FET RON | 100mΩ (typ) at 100mA, VIN ≥8V - minimizes conduction loss and self-heating during normal operation |
| Reverse Blocking | 30–70mV VRIB threshold; blocks reverse current flow from OUT to IN to protect upstream sources |
| Thermal Shutdown | +150°C (typ) junction temperature; latches off permanently until reset - prevents irreversible silicon damage |
| Input Voltage Range | -40V to +40V on IN pin - withstands negative transients and hot-swap surges without external clamping |
Pinout & Package
Package: 14-pin TSSOP with exposed pad (5mm × 6.5mm); RoHS-compliant, thermally enhanced for industrial ambient conditions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–3, IN | Input voltage terminal | Accepts -40V to +40V; requires 0.47µF ceramic bypass for ESD and transient immunity |
| 4, UVLO | Undervoltage lockout programming input | Connect to GND for 19.2V internal threshold; external resistor divider enables custom UVLO setting |
| 5, OVLO | Overvoltage lockout programming input | Connect to GND for 33V internal threshold; external resistor divider enables custom OVLO setting |
| 6, SETI | Current limit programming input | Resistor to GND sets 0.7A–4.2A limit; <1V asserts FLAG and disables output |
| 7, GND | Power ground reference | Common return for all signals; must connect exposed pad (EP) directly to this node |
| 8, HVEN | High-voltage active-low enable | Valid from 0V to 36V; toggling resets latch-off fault condition |
| 9, RIEN | Reverse-current enable control | Low = enable reverse blocking; high = disable - critical for inductive load applications |
| 10, EN | Active-high enable input | Logic-level (1.4V VIH) control; toggling resets latch-off state alongside HVEN |
| 11, FLAG | Open-drain fault indicator | Pulled low on OVLO, UVLO, thermal trip, reverse current, or SETI under-voltage - requires external pull-up |
| 12–14, OUT | Protected output terminal | Delivers regulated power to load; requires 1µF ceramic bypass near pin for stability |
Key Features
| Feature | Design Value |
|---|---|
| Latch-off overcurrent response | Permanently disables FETs after blanking time - eliminates autoretry cycling in persistent faults |
| Dual enable inputs (EN/HVEN) | HVEN tolerates 36V; EN accepts logic levels - enables flexible system-level reset strategies |
| Reverse-current blocking | 30–70mV detection threshold with sub-2µs response - prevents backfeed into source during load disconnect |
| ±40V input fault tolerance | Withstands industrial transients and hot-plug surges without external TVS - reduces BOM count |
| Thermal shutdown with hysteresis | +150°C trip / +120°C recovery - prevents thermal runaway while allowing safe cooldown before manual reset |
Applications
| Industrial Power Supply Protection | Marine DC Distribution System |
|---|---|
Use Scenario: Protecting PLC I/O modules from 24V rail overvoltage due to regenerative braking or wiring faults. IC Role / Device Role / Timing Role: Primary overvoltage and overcurrent supervisor; latched-off state prevents repeated stress on downstream regulators during sustained fault. Use Value: Eliminates need for manual intervention after fault; maintains system integrity until maintenance crew resets EN/HVEN. | Use Scenario: Securing navigation electronics powered from 36V shipboard battery banks subject to alternator spikes and polarity reversal. IC Role / Device Role / Timing Role: Bidirectional fault detector - blocks reverse current during battery swap and shuts down on >36V surge. Use Value: Prevents catastrophic failure of GPS/radar units during accidental reverse connection or alternator regulator failure. |
| Battery-Powered Test Equipment | Consumer Audio Amplifier Input Stage |
Use Scenario: Safeguarding portable oscilloscopes and multimeters connected to unknown field voltages. IC Role / Device Role / Timing Role: First-line defense against user-induced overvoltage; latch-off behavior avoids repeated power cycling during probe misapplication. Use Value: Extends product lifetime by preventing cumulative stress on internal LDOs and ADC front-ends during misuse. | Use Scenario: Protecting Class-D amplifier inputs from speaker wire shorts or ESD events during live performance setup. IC Role / Device Role / Timing Role: Fast-acting current limiter with reverse-blocking - suppresses inductive kickback from shorted speaker cables. Use Value: Avoids audible pop/distortion and MOSFET destruction by limiting fault energy to <100mJ per event. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar overvoltage and overcurrent protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX17561AUD+ | Autoretry overcurrent response (600ms retry period) vs. latch-off; identical pinout, OVLO/UVLO/SETI programming | Suitable for transient faults where automatic recovery is preferred; not appropriate for persistent short-circuit safety-critical systems | Select MAX17561AUD+ when system must self-recover after brief overload without operator action |
| TPS26631RGER | Fixed 36V OVLO, no UVLO adjustment; 4.5A current limit; integrated 120mΩ FET; thermal foldback instead of latch-off | Designed for USB PD and PoE applications; lacks reverse-current enable and HVEN high-voltage input | Choose TPS26631RGER for cost-sensitive designs requiring only basic 36V OVP and no reverse blocking or dual-enable flexibility |
Compared with MAX17561AUD+, the MAX17562AUD+ provides deterministic fault containment via latch-off, eliminating uncontrolled cycling. Against TPS26631RGER, it offers wider design flexibility through programmable thresholds, reverse-current control, and 36V-tolerant HVEN - critical for ruggedized industrial deployment.
Availability
The MAX17562AUD+ is available at Aetrix Electronics and suitable for industrial equipment, marine DC distribution systems, and battery-powered test instrumentation requiring stable component supply across extended temperature and high-reliability environments.
Supply support for MAX17562AUD+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs high-performance analog and mixed-signal ICs for industrial, automotive, and communications applications.
The MAX1756x family targets robust front-end power protection in harsh environments, emphasizing fault containment, wide input tolerance, and programmable supervision for mission-critical power rails.
FAQ
What fault conditions cause the MAX17562AUD+ to latch off permanently?
The MAX17562AUD+ latches off permanently when an overcurrent condition persists beyond its 20.7ms (typ) blanking time, or when junction temperature exceeds +150°C. Unlike autoretry versions, it remains disabled until EN or HVEN is actively toggled. This behavior also activates if SETI voltage drops below 1V (typ) or if reverse current exceeds the 30–70mV blocking threshold. The MAX17562AUD+ does not auto-recover - manual reset is mandatory for safety-critical systems.
How do I configure the MAX17562AUD+ for a 28V overvoltage lockout threshold?
To set a 28V OVLO threshold on the MAX17562AUD+, connect a resistor divider from IN to GND with the OVLO pin tied to the midpoint. Using the formula VOVLO = VBG × (1 + R3/R4) and VBG = 1.210V (typ), select R3 = 2.2MΩ and R4 ≈ 95.3kΩ. Ensure OVLO pin voltage stays between 0.3V–0.5V for valid sensing. The MAX17562AUD+ will ignore the internal 33V preset when the external voltage exceeds 0.5V, enabling precise 28V protection.
Can the MAX17562AUD+ protect against negative input voltage transients?
Yes, the MAX17562AUD+ supports -40V on the IN pin, making it suitable for systems exposed to negative transients such as automotive load dump reversal or marine battery polarity errors. Its internal FETs block reverse conduction when RIEN is low, and the device remains functional down to -40V without damage. However, reverse-current protection only activates when RIEN is grounded - leaving RIEN floating or high disables this feature. The MAX17562AUD+ does not require external components to withstand these conditions.
What is the role of the exposed pad (EP) on the MAX17562AUD+ TSSOP package?
The exposed pad (EP) on the MAX17562AUD+ must be soldered directly to the PCB ground plane using multiple thermal vias. It serves as the primary thermal path - reducing θJA from 39°C/W to ~25°C/W in a four-layer board. EP is electrically connected to GND internally, so improper grounding causes thermal runaway during overcurrent faults. Maxim specifies that EP connection is mandatory for reliable operation above 2A continuous load. The MAX17562AUD+ datasheet explicitly states EP must not be left floating or connected to any net other than GND.
How does the MAX17562AUD+ differ from the MAX17563AUD+ in overcurrent handling?
The MAX17562AUD+ latches off after the 20.7ms blanking time upon overcurrent detection, requiring manual EN/HVEN reset. In contrast, the MAX17563AUD+ enters continuous current-limit mode - maintaining output at the programmed limit (e.g., 4.2A) indefinitely while asserting FLAG. Both share identical OVLO/UVLO programming and reverse-current blocking, but their fault responses are mutually exclusive: MAX17562AUD+ prioritizes absolute fault isolation, while MAX17563AUD+ sustains partial functionality. Neither device recovers automatically.
MAX17562AUD+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Applications:
- Overvoltage, Undervoltage Protection
- Current - Supply:
- 490µA
- Voltage - Supply:
- 4.5V ~ 36V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP-EP
MAX17562AUD+ FAQ
1.How can I place an order for MAX17562AUD+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX17562AUD+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX17562AUD+ reliable?
The price and inventory of MAX17562AUD+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX17562AUD+ is usually 5 days.
3.What payment methods are accepted for MAX17562AUD+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX17562AUD+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX17562AUD+?
MAX17562AUD+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX17562AUD+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX17562AUD+?
For technical support, including MAX17562AUD+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX17562AUD+ requirements.
6.How does Aetrix verify that MAX17562AUD+ is sourced from the original manufacturer or authorized distributors?
All MAX17562AUD+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX17562AUD+ meets industry standards.
7.What is the process for return or replacement of MAX17562AUD+?
All MAX17562AUD+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX17562AUD+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX17562AUD+ part is unused and in its original packaging.
Return procedure for MAX17562AUD+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX17562AUD+ Tags

-
TPS2511DGNR
Texas Instruments

-
UTC2000/MG
Microchip Technology

-
TUSB320HAIRWBR
Texas Instruments

-
TPS61252DSGR
Texas Instruments

-
PI5USB30216CXUAEX
Diodes Incorporated
-
SN6501DBVR
Texas Instruments

-
CYPD3177-24LQXQT
Infineon Technologies
-
SN6501QDBVRQ1
Texas Instruments

-
STUSB1600AQTR
STMicroelectronics

-
SN6505BDBVR
Texas Instruments
-
SN6501DBVT
Texas Instruments

-
TPS65150PWPR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

