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Analog Devices Inc./Maxim Integrated MAX5940AESA+T
- Part No.:
- MAX5940AESA+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
MAX5940AESA+T.pdf
- Description:
- IC POE CNTRL 1 CHANNEL 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,894
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Product details
Overview
The MAX5940AESA+T from Maxim Integrated is an IEEE 802.3af-compliant powered device (PD) interface controller for Power-over-Ethernet systems. It provides detection signature, classification signature, and integrated isolation switch with programmable inrush current control. It features fixed UVLO threshold (35.4V turn-on), active-high open-drain PGOOD output referenced to OUT, and operates over –40°C to +85°C in 8-pin SO package. Used in IP phones and security cameras.
For engineers reviewing the MAX5940AESA+T datasheet, MAX5940AESA+T pinout, MAX5940AESA+T application, or MAX5940AESA+T equivalent, this page delivers verified technical context, exact pin functions, real-world use scenarios, confirmed alternatives, and supply support tailored for PoE PD design validation and BOM sourcing.
Technical Context
The MAX5940AESA+T implements a three-phase PD front-end: detection (1.4–10.1V input, <10µA offset current), classification (12.6–20V, resistor-programmable class 0–3 via RCLASS), and power mode (UVLO turn-on at 35.4V, wide 4.2V hysteresis). It uses an internal N-channel MOSFET (RON = 1.5Ω max at +85°C) with gate-driven inrush limiting via external CGATE capacitor.
It supports operation with or without an external diode bridge, includes deglitch time (0.32ms) to reject cable-induced voltage transients, and asserts PGOOD when VOUT is within 1.2V of VEE and VGATE exceeds 5V above VEE - enabling reliable sequencing of downstream DC-DC converters.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Detection Offset Current | <10µA - ensures valid 25.5kΩ signature resistance measurement by PSE during discovery phase |
| Classification Voltage Threshold | 21.8V typ - defines class turn-off point per IEEE 802.3af; sets upper limit for classification mode entry |
| UVLO Turn-On Voltage | 35.4V - fixed threshold initiating power mode; avoids premature activation due to cable drop |
| UVLO Hysteresis | 4.2V - prevents oscillation during marginal input conditions caused by twisted-pair IR drop |
| MOSFET On-Resistance | 1.5Ω max at +85°C - limits conduction loss and thermal rise under 300mA load current |
| PGOOD Assertion Condition | VOUT within 1.2V of VEE AND VGATE ≥5V above VEE - precise sequencing signal for DC-DC enable |
| Operating Temperature | –40°C to +85°C - supports industrial-grade PoE endpoint deployment in uncontrolled environments |
Pinout & Package
MAX5940AESA+T is housed in an 8-pin SOIC (SO) package, 3.9mm × 4.9mm body, 1.27mm pitch, JEDEC MS-012 compliant. Pin 1 is top-left corner with notch or dot marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | No Connection (N.C.) | Not internally bonded; must be left floating or tied to GND per layout best practice |
| 2 | RCLASS | Sets PD classification current (class 0–3) via resistor to VEE; determines power budget allocation by PSE |
| 3 | GATE | Drives internal N-MOSFET gate; constant-current charging (10µA typ) enables programmable inrush control with CGATE |
| 4 | VEE | Negative supply input (–48V return); source terminal of internal isolation MOSFET |
| 5 | OUT | Power output node; drain of internal MOSFET; supplies downstream DC-DC converter after power-up |
| 6 | PGOOD | Active-high open-drain output referenced to OUT; signals valid VOUT and gate bias for system enable |
| 7 | N.C. | No Connection (N.C.); not internally connected; no electrical function |
| 8 | GND | Positive input terminal; connects to Ethernet cable's positive rail (e.g., spare pair + or signal pair center tap) |
Key Features
| Feature | Design Value |
|---|---|
| Fully integrated 802.3af PD interface | Eliminates need for discrete detection/classification circuitry and external isolation FET |
| Programmable classification signature | Resistor-selectable class 0–3 compliance without firmware or configuration registers |
| Integrated MOSFET with inrush control | On-chip 1.5Ω N-MOSFET + gate-charge current source enables soft-start via CGATE capacitor |
| Fixed UVLO with wide hysteresis | 35.4V turn-on / 30V turn-off (4.2V hysteresis) accommodates up to 5.4V cable IR drop |
| PGOOD referenced to OUT | Enables direct connection to DC-DC ON pin without level-shifting; simplifies power sequencing |
Applications
| IP Phones | Security Cameras |
|---|---|
Use Scenario: Powered via Ethernet cabling in office or enterprise VoIP deployments with centralized PoE switches. IC Role / Device Role / Timing Role: PD interface controller managing detection, classification, and power handoff to internal DC-DC and codec subsystems. Use Value: Enables single-cable deployment, eliminates local AC adapters, and guarantees interoperability with IEEE 802.3af PSEs. | Use Scenario: Outdoor or indoor surveillance camera powered over Cat5e/6 cabling with remote mounting and limited access to mains power. IC Role / Device Role / Timing Role: Front-end PD controller establishing valid signature, negotiating class 3 power (up to 12.95W), and enabling clean power-up of image sensor and video processor. Use Value: Delivers stable 48V-to-low-voltage conversion start-up while meeting strict PSE handshake timing requirements (≤75ms classification). |
| Wireless Access Nodes | Computer Telephony |
Use Scenario: Wall- or ceiling-mounted Wi-Fi access point deployed in legacy building infrastructure where only Ethernet drops are available. IC Role / Device Role / Timing Role: IEEE 802.3af-compliant PD controller providing detection signature, class 2/3 negotiation, and controlled inrush to avoid PSE shutdown. Use Value: Ensures reliable power delivery under variable cable lengths (up to 100m), supporting full RF transmit power without brownout. | Use Scenario: USB or analog telephony adapter connecting PC-based softphones to PSTN via Ethernet-powered gateway hardware. IC Role / Device Role / Timing Role: PD interface handling discovery and classification before enabling low-noise LDOs and audio codec power rails. Use Value: Guarantees deterministic power-up sequence and meets jitter-sensitive analog audio timing requirements post-PoE handoff. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PD interface controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX5940CESA+T | Same pinout, same fixed UVLO (35.4V), but rated for 90V absolute max vs. 80V for MAX5940AESA+T | Supports higher transient tolerance in harsher PoE environments (e.g., industrial Ethernet with >80V surges) | Select MAX5940CESA+T if system-level surge testing requires >80V withstand capability |
| LT4275IMS#PBF | IEEE 802.3af/at-compliant; adjustable UVLO; includes I2C interface for class reconfiguration and fault reporting | Enables dynamic class change and telemetry in managed PoE endpoints; adds complexity vs. fixed-function MAX5940AESA+T | Choose LT4275IMS#PBF when firmware-controlled classification or diagnostics are required |
Compared with MAX5940CESA+T, MAX5940AESA+T offers lower cost and simpler layout but reduced voltage margin; versus LT4275IMS#PBF, it trades configurability and dual-standard support for minimal BOM count and zero software dependency.
Availability
MAX5940AESA+T is available at Aetrix Electronics and suitable for IP phones, security cameras, wireless access nodes, and computer telephony systems requiring stable component supply across production lifecycles.
Supply support for MAX5940AESA+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, communications, and computing applications.
The MAX5940AESA+T belongs to Maxim's Power-over-Ethernet PD controller product line, engineered specifically to simplify IEEE 802.3af-compliant endpoint design with minimal external components and guaranteed interoperability.
FAQ
What is the UVLO threshold of the MAX5940AESA+T?
The MAX5940AESA+T has a fixed undervoltage lockout (UVLO) turn-on threshold of 35.4V and turn-off threshold of 30V, yielding 4.2V hysteresis. This is factory-trimmed and non-adjustable - unlike MAX5940B/MAX5940D variants. The threshold accommodates up to 5.4V of resistive drop across 100m of twisted-pair cable, ensuring robust transition into power mode. MAX5940AESA+T does not support external UVLO programming via the UVLO pin.
Does the MAX5940AESA+T support IEEE 802.3at (PoE+)?
No, the MAX5940AESA+T is certified only for IEEE 802.3af (Type 1) compliance. It lacks the higher-power classification logic, extended voltage range, and dual-signature detection required for 802.3at. Its absolute maximum rating is 80V, and its classification current range (0–41.4mA) aligns strictly with 802.3af classes 0–4. For 802.3at support, consider alternatives like the MAX5969 or LT4275, which explicitly list 802.3at compatibility in their datasheets.
How is inrush current controlled in the MAX5940AESA+T?
The MAX5940AESA+T controls inrush current by charging the gate of its internal N-channel MOSFET with a constant 10µA current source. The resulting dV/dt at the OUT pin is limited by the MOSFET's intrinsic drain-to-gate capacitance. To further reduce peak inrush, an external ceramic capacitor (CGATE) is connected between GATE and OUT - increasing effective gate capacitance and slowing turn-on. Typical CGATE values range from 1nF to 10nF depending on desired inrush profile and cable impedance.
What is the function of the PGOOD pin on the MAX5940AESA+T?
The PGOOD pin on the MAX5940AESA+T is an active-high, open-drain output referenced to the OUT node. It goes high-impedance only when both conditions are met: VOUT is within 1.2V of VEE (i.e., MOSFET is fully enhanced), and VGATE is ≥5V above VEE. Otherwise, it pulls OUT low. This provides a precise, self-referenced power-good signal ideal for enabling downstream DC-DC converters without level-shifting circuitry - a key differentiator from PGOOD pins referenced to GND or VEE.
Can the MAX5940AESA+T operate without an external diode bridge?
Yes, the MAX5940AESA+T is designed to operate with or without an external diode bridge. Its detection and classification circuitry functions correctly regardless of bridge presence, maintaining full IEEE 802.3af compliance in both configurations. When used without a bridge, the device connects directly across the powered pairs (e.g., spare pairs or signal pairs). When used with a bridge, polarity insensitivity is preserved - critical for field-deployed PoE endpoints where cable wiring orientation is uncontrolled.
MAX5940AESA+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Controller (PD)
- Number of Channels:
- 1
- Power - Max:
- 12.95 W
- Internal Switch(s):
- Yes
- Auxiliary Sense:
- No
- Standards:
- 802.3af (PoE)
- Voltage - Supply:
- 36.6V ~ 67V
- Current - Supply:
- 400µA
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
MAX5940AESA+T FAQ
1.How can I place an order for MAX5940AESA+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX5940AESA+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX5940AESA+T reliable?
The price and inventory of MAX5940AESA+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX5940AESA+T is usually 5 days.
3.What payment methods are accepted for MAX5940AESA+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX5940AESA+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX5940AESA+T?
MAX5940AESA+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX5940AESA+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX5940AESA+T?
For technical support, including MAX5940AESA+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX5940AESA+T requirements.
6.How does Aetrix verify that MAX5940AESA+T is sourced from the original manufacturer or authorized distributors?
All MAX5940AESA+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX5940AESA+T meets industry standards.
7.What is the process for return or replacement of MAX5940AESA+T?
All MAX5940AESA+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX5940AESA+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX5940AESA+T part is unused and in its original packaging.
Return procedure for MAX5940AESA+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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