Analog Devices Inc./Maxim Integrated MAX5940BESA+T
- Part No.:
- MAX5940BESA+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
MAX5940BESA+T.pdf
- Description:
- IC POE CNTRL 1 CHANNEL 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,570
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
The MAX5940BESA+T from Maxim Integrated is an IEEE 802.3af-compliant powered device (PD) interface controller for Power-over-Ethernet systems, integrating detection signature, programmable classification, and an isolation N-channel MOSFET with 0.8Ω on-resistance at +85°C. It features adjustable undervoltage lockout (UVLO) with 7.4V hysteresis, dual PGOOD/PGOOD outputs, and supports -40°C to +85°C operation in 8-pin SO package. Used in IP phones and security cameras to manage PoE power handshaking and inrush control.
For engineers reviewing the MAX5940BESA+T datasheet, MAX5940BESA+T pinout, MAX5940BESA+T application, or MAX5940BESA+T equivalent, this page delivers verified technical context, exact pin functions, real-world timing behavior under twisted-pair voltage drop, confirmed UVLO adjustability via external resistor-divider, and validated alternatives for PoE PD design continuity.
Technical Context
The MAX5940BESA+T operates in three distinct modes-detection (1.4V–10.1V), classification (12.6V–20V), and power mode-with leakage current <10µA during detection and programmable classification current up to 41.4mA (Class 4). Its internal N-channel MOSFET enables isolation and inrush limiting via GATE-controlled gate-charge current (10µA typ) and external CGATE capacitor.
UVLO threshold is adjustable from 12V to 67V using a 25.5kΩ ±1% resistor-divider on the UVLO pin, with 20% hysteresis referenced to 2.46V internal reference; power-mode transition includes 0.32ms deglitch time to reject cable-induced glitches and ensure stable detection→classification→power-on sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| IEEE Compliance | Fully compliant with IEEE 802.3af PD interface requirements including detection signature, classification, and power-mode sequencing. |
| UVLO Threshold | Adjustable 12V–67V (default 39V turn-on / 30V turn-off); enables custom power-up behavior across varying PoE source tolerances. |
| MOSFET RON | 0.8Ω (typ) at +85°C, 300mA load; ensures low conduction loss and thermal stability in sustained power delivery. |
| Leakage Current | <10µA during detection phase; guarantees reliable PSE recognition without false-negative signature rejection. |
| PGOOD/PGOOD Outputs | Active-high open-drain (PGOOD, referenced to OUT) and active-low open-drain (PGOOD, referenced to VEE); directly enable downstream DC-DC converters with dual-sense logic. |
| Operating Temp | -40°C to +85°C extended range; qualified for industrial and outdoor PoE endpoints including security cameras and wireless access nodes. |
| Package | 8-pin SO (SOIC-N), 3.9mm × 4.9mm footprint; compatible with standard reflow assembly and IPC-7351B land patterns. |
Pinout & Package
MAX5940BESA+T is housed in an 8-pin SOIC-N package (JEDEC MS-012) with 1.27mm pitch, 3.9mm body width, and exposed pad not present. Pin 1 is located at top-left per standard SO marking convention.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | UVLO | Undervoltage lockout programming input; sets adjustable power-mode entry threshold via external resistor-divider (25.5kΩ total). |
| 2 | RCLASS | Classification current setting node; connects to VEE through precision resistor (e.g., 255Ω for Class 3) to define IEEE 802.3af power class. |
| 3 | GATE | Gate drive output for internal N-MOSFET; sources 10µA constant current to control inrush via external CGATE capacitor. |
| 4 | VEE | Negative supply rail (–48V return); source terminal of integrated isolation MOSFET and reference for all internal biasing. |
| 5 | OUT | Power output (drain of internal MOSFET); delivers regulated PoE power to downstream DC-DC converter after successful handshaking. |
| 6 | PGOOD | Active-high open-drain power-good signal referenced to OUT; asserts high-Z when VOUT ≥ VEE + 1.2V and VGATE ≥ VEE + 5V. |
| 7 | PGOOD | Active-low open-drain power-good signal referenced to VEE; pulls to VEE under same valid-power conditions as PGOOD. |
| 8 | GND | Positive input terminal (GND = +48V side); forms VIN = GND – VEE differential input with VEE, enabling bridgeless or bridged PoE front-end designs. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable UVLO | External resistor-divider (25.5kΩ ±1%) sets custom turn-on/turn-off thresholds from 12V to 67V - critical for legacy PSE compatibility and brown-out resilience. |
| Dual PGOOD Outputs | Simultaneous active-high (OUT-referenced) and active-low (VEE-referenced) signals eliminate need for level-shifting or inverters when enabling diverse DC-DC controllers. |
| Inrush Current Control | GATE pin drives external CGATE capacitor to linearly ramp MOSFET VGS, limiting peak inrush to safe levels without external FET drivers or complex timing circuits. |
| Twisted-Pair Voltage Drop Compensation | 7.4V UVLO hysteresis and 0.32ms deglitch time prevent spurious power-mode exit due to IR drop across long Ethernet cables. |
| Bridgeless Operation Support | Functional across both signal-pair and spare-pair PoE delivery topologies without requiring external diode bridge - reduces BOM count and forward-voltage loss. |
Applications
| IP Phones | Security Cameras |
|---|---|
Use Scenario: Powered via IEEE 802.3af PoE switch in enterprise VoIP deployments with limited AC outlet access. IC Role / Device Role / Timing Role: PD interface controller managing detection, classification, and power-mode handshaking; provides PGOOD/PGOOD to enable audio codec and DSP power rails. Use Value: Enables single-cable deployment with guaranteed interoperability, while adjustable UVLO prevents dropout during cable-length-induced voltage sag. |
Use Scenario: Outdoor PTZ camera powered over 100m Cat5e cable with variable ambient temperature (-20°C to +60°C). IC Role / Device Role / Timing Role: Isolation switch and power sequencer; controls inrush into imaging sensor and video encoder power domains via GATE-driven soft-start. Use Value: 0.8Ω RON minimizes self-heating at full load; -40°C to +85°C rating ensures reliability in uncontrolled enclosures. |
| Wireless Access Nodes | Computer Telephony |
Use Scenario: Dual-band 802.11ac AP mounted in ceiling plenum with PoE+ backward compatibility required. IC Role / Device Role / Timing Role: Classification signature generator (Class 3 or 4) and power-good enabler for RF PA and baseband SoC. Use Value: Programmable classification current (26.45–41.4mA) allows precise power budgeting per IEEE 802.3af table; dual PGOOD outputs simplify multi-rail sequencing. |
Use Scenario: USB-to-telephone adapter with integrated headset amplifier, powered exclusively via PoE in call-center cubicles. IC Role / Device Role / Timing Role: Detection signature provider and isolation switch; coordinates power-up of analog audio path and digital USB interface. Use Value: <10µA detection leakage ensures PSE recognition even with aging cabling; bridgeless operation avoids 1.2V diode drop in low-voltage audio rails. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PD interface controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX5940DESA+ | Same pinout, adjustable UVLO, but rated for 90V absolute max (vs. 80V for MAX5940BESA+T); identical electrical specs otherwise. | Suitable where higher input transient immunity is required (e.g., industrial PoE with >67V surges). | Select MAX5940DESA+ only if system-level surge testing exceeds IEC 61000-4-5 Level 4 (4kV) on PoE lines. |
| LT4275IMS#PBF | Pin-compatible 8-pin MSOP; offers wider UVLO range (10.5V–60V), lower 0.5Ω RON, and integrated hot-swap FET driver - no external CGATE needed. | Better suited for high-efficiency, space-constrained designs where gate-drive complexity must be minimized. | Choose LT4275IMS#PBF when reducing external components and improving thermal margin are primary goals. |
Compared with MAX5940DESA+, the MAX5940BESA+T trades 10V absolute max rating for tighter cost control and identical 80V operational headroom; versus LT4275IMS#PBF, it retains external CGATE flexibility for fine-grained inrush tuning but requires one extra capacitor.
Availability
MAX5940BESA+T is available at Aetrix Electronics and suitable for IP phones, security cameras, wireless access nodes, and computer telephony systems requiring stable component supply across multi-year production cycles and PoE infrastructure upgrades.
Supply support for MAX5940BESA+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power-management ICs for industrial, communications, and computing applications, with emphasis on high-reliability, low-power, and integration-rich solutions.
The MAX5940BESA+T belongs to Maxim's Power-over-Ethernet PD interface controller family, engineered specifically to simplify IEEE 802.3af compliance in endpoint devices by integrating detection, classification, isolation switching, and power sequencing in a single SOIC package.
FAQ
What is the absolute maximum voltage rating for MAX5940BESA+T?
The MAX5940BESA+T has an absolute maximum rating of 80V on the GND pin relative to VEE. This is specified in the Absolute Maximum Ratings table and distinguishes it from the MAX5940D variant (90V). Exceeding 80V may cause permanent damage, even briefly, and the device is designed to operate continuously up to 67V input (VIN = GND – VEE).
Does MAX5940BESA+T support bridgeless PoE front-end configurations?
Yes, MAX5940BESA+T is explicitly designed to work with or without an external diode bridge. Its detection and classification circuitry operates correctly across both signal-pair and spare-pair PoE delivery methods, eliminating forward-voltage loss and thermal stress associated with bridge rectifiers in space- or efficiency-sensitive designs.
How is the UVLO threshold adjusted on MAX5940BESA+T?
The UVLO threshold on MAX5940BESA+T is adjusted using an external resistor-divider connected between GND and VEE, with the UVLO pin tied to the midpoint. The total resistance must equal 25.5kΩ ±1%; the threshold voltage is set by the divider ratio relative to the internal 2.46V reference, enabling precise turn-on/turn-off points from 12V to 67V.
What is the function of the GATE pin on MAX5940BESA+T?
The GATE pin on MAX5940BESA+T sources a constant 10µA current to charge the gate of the internal N-channel MOSFET, controlling the rate of VDS rise and thus limiting inrush current. An external capacitor (CGATE) from GATE to OUT sets the soft-start time; pulling GATE to VEE disables the MOSFET while preserving detection/classification functionality.
Can MAX5940BESA+T be used in Class 4 PoE applications?
Yes, MAX5940BESA+T supports Class 4 classification with RCL = 178Ω, delivering 36.6–41.4mA classification current per IEEE 802.3af Table 2. However, Class 4 is reserved for future use in the standard and requires PSE support; the device itself fully implements the required signature and timing behavior.
MAX5940BESA+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Controller (PD)
- Number of Channels:
- 1
- Power - Max:
- 12.95 W
- Internal Switch(s):
- Yes
- Auxiliary Sense:
- No
- Standards:
- 802.3af (PoE)
- Voltage - Supply:
- 39.9V ~ 67V
- Current - Supply:
- 400µA
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
MAX5940BESA+T FAQ
1.How can I place an order for MAX5940BESA+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX5940BESA+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX5940BESA+T reliable?
The price and inventory of MAX5940BESA+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX5940BESA+T is usually 5 days.
3.What payment methods are accepted for MAX5940BESA+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX5940BESA+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX5940BESA+T?
MAX5940BESA+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX5940BESA+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX5940BESA+T?
For technical support, including MAX5940BESA+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX5940BESA+T requirements.
6.How does Aetrix verify that MAX5940BESA+T is sourced from the original manufacturer or authorized distributors?
All MAX5940BESA+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX5940BESA+T meets industry standards.
7.What is the process for return or replacement of MAX5940BESA+T?
All MAX5940BESA+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX5940BESA+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX5940BESA+T part is unused and in its original packaging.
Return procedure for MAX5940BESA+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX5940BESA+T Tags

-
TPS2378DDAR
Texas Instruments

-
TPS23753APWR
Texas Instruments

-
TPS23756PWPR
Texas Instruments

-
TPS23750PWPR
Texas Instruments

-
MP8007GV-Z
Monolithic Power Systems Inc.

-
TPS23861PWR
Texas Instruments

-
TPS23753PWR
Texas Instruments

-
PD69201ILD-TR
Microchip Technology

-
SI3402-B-GM
Skyworks Solutions Inc.

-
SI3402-B-GMR
Skyworks Solutions Inc.

-
SI34071-A01-GMR
Skyworks Solutions Inc.

-
SI3404-A-GMR
Skyworks Solutions Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
